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From: Christian Marangi <ansuelsmth@gmail.com>
To: "Ryder Lee" <ryder.lee@mediatek.com>,
	"Jianjun Wang" <jianjun.wang@mediatek.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>,
	"Russell King" <linux@armlinux.org.uk>,
	"Andrew Lunn" <andrew@lunn.ch>,
	"Heiner Kallweit" <hkallweit1@gmail.com>,
	"David S. Miller" <davem@davemloft.net>,
	"Eric Dumazet" <edumazet@google.com>,
	"Jakub Kicinski" <kuba@kernel.org>,
	"Paolo Abeni" <pabeni@redhat.com>,
	"Christian Marangi" <ansuelsmth@gmail.com>,
	linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org,
	upstream@airoha.com
Subject: [PATCH v6 4/5] PCI: mediatek: Use generic MACRO for TPVPERL delay
Date: Mon, 20 Oct 2025 13:11:08 +0200	[thread overview]
Message-ID: <20251020111121.31779-5-ansuelsmth@gmail.com> (raw)
In-Reply-To: <20251020111121.31779-1-ansuelsmth@gmail.com>

Use the generic PCIe MACRO for TPVPERL delay to wait for clock and power
stabilization after PERST# Signal instead of the raw value of 100 ms.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
 drivers/pci/controller/pcie-mediatek.c | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c
index cbffa3156da1..313da61a0b8a 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -697,12 +697,7 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port)
 	 */
 	writel(PCIE_LINKDOWN_RST_EN, port->base + PCIE_RST_CTRL);
 
-	/*
-	 * Described in PCIe CEM specification sections 2.2 (PERST# Signal) and
-	 * 2.2.1 (Initial Power-Up (G3 to S0)). The deassertion of PERST# should
-	 * be delayed 100ms (TPVPERL) for the power and clock to become stable.
-	 */
-	msleep(100);
+	msleep(PCIE_T_PVPERL_MS);
 
 	/* De-assert PHY, PE, PIPE, MAC and configuration reset	*/
 	val = readl(port->base + PCIE_RST_CTRL);
-- 
2.51.0


  parent reply	other threads:[~2025-10-20 11:11 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-20 11:11 [PATCH v6 0/5] PCI: mediatek: add support AN7583 + YAML rework Christian Marangi
2025-10-20 11:11 ` [PATCH v6 1/5] dt-bindings: PCI: mediatek: Convert to YAML schema Christian Marangi
2025-10-20 11:11 ` [PATCH v6 2/5] dt-bindings: PCI: mediatek: Add support for Airoha AN7583 Christian Marangi
2025-10-20 11:11 ` [PATCH v6 3/5] PCI: mediatek: Convert bool to single quirks entry and bitmap Christian Marangi
2025-10-20 11:23   ` AngeloGioacchino Del Regno
2025-10-20 11:11 ` Christian Marangi [this message]
2025-10-20 11:23   ` [PATCH v6 4/5] PCI: mediatek: Use generic MACRO for TPVPERL delay AngeloGioacchino Del Regno
2025-10-20 11:11 ` [PATCH v6 5/5] PCI: mediatek: Add support for Airoha AN7583 SoC Christian Marangi
2025-10-20 11:23   ` AngeloGioacchino Del Regno
2025-10-21  2:02 ` [PATCH v6 0/5] PCI: mediatek: add support AN7583 + YAML rework Manivannan Sadhasivam

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