From: Conor Dooley <conor@kernel.org>
To: linus.walleij@linaro.org
Cc: conor@kernel.org, Conor Dooley <conor.dooley@microchip.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org,
Valentina.FernandezAlanis@microchip.com
Subject: [PATCH v3 0/5] Microchip mpfs/pic64gx pinctrl
Date: Wed, 22 Oct 2025 11:09:08 +0100 [thread overview]
Message-ID: <20251022-dash-refinance-ac3387657ae4@spud> (raw)
From: Conor Dooley <conor.dooley@microchip.com>
Hey Linus,
Here's a v3, with the COMPILE_TEST added, and a select that the lkp bot
told me that I was missing when I pushed it yesterday for testing.
There's a tag below for you to pull that has the syscon binding that
gets edited in this series, since that's not in mainline yet.
Cheers,
Conor.
Changes in v3:
- Add COMPILE_TEST to drivers
- Drop a TODO
- Add select for GENERIC_PINCONF
The binding dep mentioned above is available here:
https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ tags/mpfs-pinctrl-binding-base
for you to fetch changes up to feaa716adc514fb5fbcb60b3e1620ac5dcf8505a:
dt-bindings: soc: microchip: document the simple-mfd syscon on PolarFire SoC (2025-10-21 14:29:34 +0100)
----------------------------------------------------------------
mpfs pinctrl binding base
The pinctrl binding patch for iomux0 mpfs adds a ref to itself to the
syscon/mfd mss-top-sysreg binding, and therefore needs that file to
exist.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
----------------------------------------------------------------
CC: Linus Walleij <linus.walleij@linaro.org>
CC: Rob Herring <robh@kernel.org>
CC: Krzysztof Kozlowski <krzk+dt@kernel.org>
CC: linux-kernel@vger.kernel.org
CC: linux-gpio@vger.kernel.org
CC: devicetree@vger.kernel.org
CC: Valentina.FernandezAlanis@microchip.com
Conor Dooley (5):
dt-bindings: pinctrl: document pic64gx "gpio2" pinmux
pinctrl: add pic64gx "gpio2" pinmux driver
dt-bindings: pinctrl: document polarfire soc iomux0 pinmux
pinctrl: add polarfire soc iomux0 pinmux driver
MAINTAINERS: add Microchip RISC-V pinctrl drivers/bindings to entry
.../microchip,mpfs-pinctrl-iomux0.yaml | 88 +++++
.../microchip,pic64gx-pinctrl-gpio2.yaml | 73 ++++
.../microchip,mpfs-mss-top-sysreg.yaml | 13 +-
MAINTAINERS | 4 +
drivers/pinctrl/Kconfig | 16 +
drivers/pinctrl/Makefile | 2 +
drivers/pinctrl/pinctrl-mpfs-iomux0.c | 278 ++++++++++++++
drivers/pinctrl/pinctrl-pic64gx-gpio2.c | 356 ++++++++++++++++++
8 files changed, 829 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/pinctrl/microchip,mpfs-pinctrl-iomux0.yaml
create mode 100644 Documentation/devicetree/bindings/pinctrl/microchip,pic64gx-pinctrl-gpio2.yaml
create mode 100644 drivers/pinctrl/pinctrl-mpfs-iomux0.c
create mode 100644 drivers/pinctrl/pinctrl-pic64gx-gpio2.c
--
2.51.0
next reply other threads:[~2025-10-22 10:10 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-22 10:09 Conor Dooley [this message]
2025-10-22 10:09 ` [PATCH v3 1/5] dt-bindings: pinctrl: document pic64gx "gpio2" pinmux Conor Dooley
2025-10-22 10:09 ` [PATCH v3 2/5] pinctrl: add pic64gx "gpio2" pinmux driver Conor Dooley
2025-10-22 10:09 ` [PATCH v3 3/5] dt-bindings: pinctrl: document polarfire soc iomux0 pinmux Conor Dooley
2025-10-22 17:12 ` Conor Dooley
2025-10-22 10:09 ` [PATCH v3 4/5] pinctrl: add polarfire soc iomux0 pinmux driver Conor Dooley
2025-10-22 10:09 ` [PATCH v3 5/5] MAINTAINERS: add Microchip RISC-V pinctrl drivers/bindings to entry Conor Dooley
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