From: Conor Dooley <conor@kernel.org>
To: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Cc: Conor Dooley <conor.dooley@microchip.com>,
Daire McNamara <daire.mcnamara@microchip.com>,
pierre-henry.moussay@microchip.com,
valentina.fernandezalanis@microchip.com,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 2/9] soc: microchip: add mfd drivers for two syscon regions on PolarFire SoC
Date: Thu, 23 Oct 2025 10:12:00 +0100 [thread overview]
Message-ID: <20251023-lard-browbeat-daade890b4df@spud> (raw)
In-Reply-To: <41dbea85-8aa1-4034-8106-e28c37e398b8@tuxon.dev>
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On Thu, Oct 23, 2025 at 07:04:33AM +0300, Claudiu Beznea wrote:
> On 10/13/25 20:45, Conor Dooley wrote:
> > +}
> > +
> > +static const struct of_device_id mpfs_control_scb_of_match[] = {
> > + {.compatible = "microchip,mpfs-control-scb", },
>
> This looks un-documented.
It is actually documented, this stuff all took so long to get done that
parts got applied piecemeal along the way, including any of the MFD
bits.
I'll fix these things up separately, cos I already applied the first two
patches here and just squash it in.
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next prev parent reply other threads:[~2025-10-23 9:12 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-13 17:45 [PATCH v5 0/9] Redo PolarFire SoC's mailbox/clock devicestrees and related code Conor Dooley
2025-10-13 17:45 ` [PATCH v5 1/9] dt-bindings: soc: microchip: document the simple-mfd syscon on PolarFire SoC Conor Dooley
2025-10-13 17:45 ` [PATCH v5 2/9] soc: microchip: add mfd drivers for two syscon regions " Conor Dooley
2025-10-23 4:04 ` Claudiu Beznea
2025-10-23 9:12 ` Conor Dooley [this message]
2025-10-23 10:15 ` Conor Dooley
2025-10-13 17:45 ` [PATCH v5 3/9] reset: mpfs: add non-auxiliary bus probing Conor Dooley
2025-10-23 4:06 ` Claudiu Beznea
2025-10-24 10:07 ` Conor Dooley
2025-10-13 17:45 ` [PATCH v5 4/9] dt-bindings: clk: microchip: mpfs: remove first reg region Conor Dooley
2025-10-13 17:45 ` [PATCH v5 5/9] clk: microchip: mpfs: use regmap for clocks Conor Dooley
2025-10-23 4:06 ` Claudiu Beznea
2025-10-23 14:42 ` Brian Masney
2025-10-24 10:20 ` Conor Dooley
2025-10-24 10:30 ` Conor Dooley
2025-10-13 17:45 ` [PATCH v5 6/9] riscv: dts: microchip: fix mailbox description Conor Dooley
2025-10-13 17:45 ` [PATCH v5 7/9] riscv: dts: microchip: convert clock and reset to use syscon Conor Dooley
2025-10-13 17:45 ` [PATCH v5 8/9] MAINTAINERS: add new soc drivers to Microchip RISC-V entry Conor Dooley
2025-10-13 17:45 ` [PATCH v5 9/9] MAINTAINERS: rename " Conor Dooley
2025-10-21 13:31 ` (subset) [PATCH v5 0/9] Redo PolarFire SoC's mailbox/clock devicestrees and related code Conor Dooley
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