From: Antonio Borneo <antonio.borneo@foss.st.com>
To: Linus Walleij <linus.walleij@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Bartosz Golaszewski <brgl@bgdev.pl>, <linux-gpio@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-stm32@st-md-mailman.stormreply.com>,
<linux-arm-kernel@lists.infradead.org>
Cc: Antonio Borneo <antonio.borneo@foss.st.com>,
Christophe Roullier <christophe.roullier@foss.st.com>,
Fabien Dessenne <fabien.dessenne@foss.st.com>,
Valentin Caron <valentin.caron@foss.st.com>
Subject: [PATCH v4 07/12] pinctrl: stm32: Drop useless spinlock save and restore
Date: Thu, 23 Oct 2025 15:26:55 +0200 [thread overview]
Message-ID: <20251023132700.1199871-8-antonio.borneo@foss.st.com> (raw)
In-Reply-To: <20251023132700.1199871-1-antonio.borneo@foss.st.com>
There is no need to acquire a spinlock to only read a register for
debugfs reporting.
Drop such useless spinlock save and restore.
Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
---
drivers/pinctrl/stm32/pinctrl-stm32.c | 25 -------------------------
1 file changed, 25 deletions(-)
diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c
index 66f9783fce862..7175328d0df0c 100644
--- a/drivers/pinctrl/stm32/pinctrl-stm32.c
+++ b/drivers/pinctrl/stm32/pinctrl-stm32.c
@@ -920,9 +920,6 @@ static void stm32_pmx_get_mode(struct stm32_gpio_bank *bank, int pin, u32 *mode,
u32 val;
int alt_shift = (pin % 8) * 4;
int alt_offset = STM32_GPIO_AFRL + (pin / 8) * 4;
- unsigned long flags;
-
- spin_lock_irqsave(&bank->lock, flags);
val = readl_relaxed(bank->base + alt_offset);
val &= GENMASK(alt_shift + 3, alt_shift);
@@ -931,8 +928,6 @@ static void stm32_pmx_get_mode(struct stm32_gpio_bank *bank, int pin, u32 *mode,
val = readl_relaxed(bank->base + STM32_GPIO_MODER);
val &= GENMASK(pin * 2 + 1, pin * 2);
*mode = val >> (pin * 2);
-
- spin_unlock_irqrestore(&bank->lock, flags);
}
static int stm32_pmx_set_mux(struct pinctrl_dev *pctldev,
@@ -1050,16 +1045,11 @@ static int stm32_pconf_set_driving(struct stm32_gpio_bank *bank,
static u32 stm32_pconf_get_driving(struct stm32_gpio_bank *bank,
unsigned int offset)
{
- unsigned long flags;
u32 val;
- spin_lock_irqsave(&bank->lock, flags);
-
val = readl_relaxed(bank->base + STM32_GPIO_TYPER);
val &= BIT(offset);
- spin_unlock_irqrestore(&bank->lock, flags);
-
return (val >> offset);
}
@@ -1101,16 +1091,11 @@ static int stm32_pconf_set_speed(struct stm32_gpio_bank *bank,
static u32 stm32_pconf_get_speed(struct stm32_gpio_bank *bank,
unsigned int offset)
{
- unsigned long flags;
u32 val;
- spin_lock_irqsave(&bank->lock, flags);
-
val = readl_relaxed(bank->base + STM32_GPIO_SPEEDR);
val &= GENMASK(offset * 2 + 1, offset * 2);
- spin_unlock_irqrestore(&bank->lock, flags);
-
return (val >> (offset * 2));
}
@@ -1152,27 +1137,19 @@ static int stm32_pconf_set_bias(struct stm32_gpio_bank *bank,
static u32 stm32_pconf_get_bias(struct stm32_gpio_bank *bank,
unsigned int offset)
{
- unsigned long flags;
u32 val;
- spin_lock_irqsave(&bank->lock, flags);
-
val = readl_relaxed(bank->base + STM32_GPIO_PUPDR);
val &= GENMASK(offset * 2 + 1, offset * 2);
- spin_unlock_irqrestore(&bank->lock, flags);
-
return (val >> (offset * 2));
}
static bool stm32_pconf_get(struct stm32_gpio_bank *bank,
unsigned int offset, bool dir)
{
- unsigned long flags;
u32 val;
- spin_lock_irqsave(&bank->lock, flags);
-
if (dir)
val = !!(readl_relaxed(bank->base + STM32_GPIO_IDR) &
BIT(offset));
@@ -1180,8 +1157,6 @@ static bool stm32_pconf_get(struct stm32_gpio_bank *bank,
val = !!(readl_relaxed(bank->base + STM32_GPIO_ODR) &
BIT(offset));
- spin_unlock_irqrestore(&bank->lock, flags);
-
return val;
}
--
2.34.1
next prev parent reply other threads:[~2025-10-23 13:27 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-23 13:26 [PATCH v4 00/12] pinctrl: stm32: Support I/O synchronization Antonio Borneo
2025-10-23 13:26 ` [PATCH v4 01/12] pinctrl: pinconf-generic: Fix minor typos in comments Antonio Borneo
2025-10-27 22:04 ` Linus Walleij
2025-10-23 13:26 ` [PATCH v4 02/12] pinctrl: pinconf-generic: Handle string values for generic properties Antonio Borneo
2025-10-27 22:10 ` Linus Walleij
2025-10-23 13:26 ` [PATCH v4 03/12] pinctrl: pinconf-generic: Add properties 'skew-delay-{in,out}put-ps' Antonio Borneo
2025-10-27 22:10 ` Linus Walleij
2025-10-23 13:26 ` [PATCH v4 04/12] dt-bindings: pincfg-node: " Antonio Borneo
2025-10-23 18:51 ` Conor Dooley
2025-10-27 22:11 ` Linus Walleij
2025-10-23 13:26 ` [PATCH v4 05/12] pinctrl: stm32: Rework stm32_pconf_parse_conf() Antonio Borneo
2025-10-27 22:12 ` Linus Walleij
2025-10-23 13:26 ` [PATCH v4 06/12] pinctrl: stm32: Simplify handling of backup pin status Antonio Borneo
2025-10-27 22:12 ` Linus Walleij
2025-10-23 13:26 ` Antonio Borneo [this message]
2025-10-27 22:13 ` [PATCH v4 07/12] pinctrl: stm32: Drop useless spinlock save and restore Linus Walleij
2025-10-23 13:26 ` [PATCH v4 08/12] pinctrl: stm32: Avoid keeping a bool value in a u32 variable Antonio Borneo
2025-10-27 22:13 ` Linus Walleij
2025-10-23 13:26 ` [PATCH v4 09/12] pinctrl: stm32: Support I/O synchronization parameters Antonio Borneo
2025-10-27 22:14 ` Linus Walleij
2025-10-23 13:26 ` [PATCH v4 10/12] dt-bindings: pinctrl: stm32: Use properties from pincfg-node.yaml Antonio Borneo
2025-10-23 18:42 ` Conor Dooley
2025-10-27 22:15 ` Linus Walleij
2025-10-23 13:26 ` [PATCH v4 11/12] dt-bindings: pinctrl: stm32: Support I/O synchronization parameters Antonio Borneo
2025-10-23 18:50 ` Conor Dooley
2025-10-27 22:16 ` Linus Walleij
2025-10-23 13:27 ` [PATCH v4 12/12] arm64: dts: st: Add I/O sync to eth pinctrl in stm32mp25-pinctrl.dtsi Antonio Borneo
2025-10-27 22:17 ` Linus Walleij
2025-11-14 8:35 ` Alexandre TORGUE
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