Re: [PATCH v3 03/24] dt-bindings: ufs: mediatek,ufs: Add mt8196 variant

Conor Dooley
2025-10-24T17:13:43Z

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On Thu, Oct 23, 2025 at 09:49:21PM +0200, Nicolas Frattaroli wrote:

> };
> + - |
> + #include <dt-bindings/reset/mediatek,mt8196-resets.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> + ufshci@16810000 {
> + compatible = "mediatek,mt8196-ufshci";
> + reg = <0x16810000 0x2a00>;
> + interrupts = <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>;
> +
> + clocks = <&ufs_ao_clk 6>,
> + <&ufs_ao_clk 7>,
> + <&clk26m>,
> + <&ufs_ao_clk 3>,
> + <&clk26m>,
> + <&ufs_ao_clk 4>,
> + <&ufs_ao_clk 0>,
> + <&topckgen 7>,
> + <&topckgen 41>,
> + <&topckgen 105>,
> + <&topckgen 83>,
> + <&ufs_ao_clk 1>,
> + <&ufs_ao_clk 2>,
> + <&topckgen 42>,
> + <&topckgen 84>,
> + <&topckgen 102>;

This is absolutely a nitpick thing, but if you end up resubmitting, can
you pick a consistent format between the two examples your series adds
for the clocks/clock names?
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable

> + clock-names = "ufs",
> + "ufs_aes",
> + "ufs_tick",
> + "unipro_sysclk",
> + "unipro_tick",
> + "unipro_mp_bclk",
> + "ufs_tx_symbol",
> + "ufs_mem_sub",
> + "crypt_mux",
> + "crypt_lp",
> + "crypt_perf",
> + "ufs_rx_symbol0",
> + "ufs_rx_symbol1",
> + "ufs_sel",
> + "ufs_sel_min_src",
> + "ufs_sel_max_src";
> +
> + operating-points-v2 = <&ufs_opp_table>;
> +
> + phys = <&ufsphy>;
> +
> + avdd09-supply = <&mt6363_vsram_modem>;
> + vcc-supply = <&mt6363_vemc>;
> + vcc-supply-1p8;
> + vccq-supply = <&mt6363_va12_2>;
> + vccq2-supply = <&mt6363_vufs12>;
> +
> + resets = <&ufs_ao_clk MT8196_UFSAO_RST1_UFS_UNIPRO>,
> + <&ufs_ao_clk MT8196_UFSAO_RST1_UFS_CRYPTO>,
> + <&ufs_ao_clk MT8196_UFSAO_RST1_UFSHCI>;
> + reset-names = "unipro", "crypto", "hci";
> + mediatek,ufs-disable-mcq;
> + };
>
> --
> 2.51.1.dirty
>

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