[PATCH v3 15/24] scsi: ufs: mediatek: Rework _ufs_mtk_clk_scale error paths

Nicolas Frattaroli
2025-10-23T19:55:21Z

Errors should be printed at the correct log level. Additionally, it
looks like some "goto out"'s were omitted in the scale up case, which
looks like a mistake, as the scale down branch of the code does use
them.

Rework the error messages to make them nicer and at the correct
verbosity, and add the missing gotos.

Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
drivers/ufs/host/ufs-mediatek.c | 41 +++++++++++++++++++----------------------
1 file changed, 19 insertions(+), 22 deletions(-)

diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 44676ba4c392..7a890302c240 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -1948,16 +1948,16 @@ static void _ufs_mtk_clk_scale(struct ufs_hba *hba, bool scale_up)

ret = clk_prepare_enable(clki->clk);
if (ret) {
- dev_info(hba->dev,
- "clk_prepare_enable() fail, ret: %d\n", ret);
+ dev_err(hba->dev, "%s: Failed to enable clock: %pe\n", __func__, ERR_PTR(ret));
return;
}

if (clk_fde_scale) {
ret = clk_prepare_enable(fde_clki->clk);
if (ret) {
- dev_info(hba->dev,
- "fde clk_prepare_enable() fail, ret: %d\n", ret);
+ dev_err(hba->dev, "%s: Failed to enable FDE clock: %pe\n",
+ __func__, ERR_PTR(ret));
+ clk_disable_unprepare(clki->clk);
return;
}
}
@@ -1966,51 +1966,48 @@ static void _ufs_mtk_clk_scale(struct ufs_hba *hba, bool scale_up)
if (clk_bind_vcore) {
ret = regulator_set_voltage(reg, volt, INT_MAX);
if (ret) {
- dev_info(hba->dev,
- "Failed to set vcore to %d\n", volt);
+ dev_err(hba->dev, "Failed to set vcore to %d\n", volt);
goto out;
}
}

ret = clk_set_parent(clki->clk, mclk->ufs_sel_max_clki->clk);
if (ret) {
- dev_info(hba->dev, "Failed to set clk mux, ret = %d\n",
- ret);
+ dev_err(hba->dev, "%s: Failed to set clock mux: %pe\n",
+ __func__, ERR_PTR(ret));
+ goto out;
}

if (clk_fde_scale) {
- ret = clk_set_parent(fde_clki->clk,
- mclk->ufs_fde_max_clki->clk);
+ ret = clk_set_parent(fde_clki->clk, mclk->ufs_fde_max_clki->clk);
if (ret) {
- dev_info(hba->dev,
- "Failed to set fde clk mux, ret = %d\n",
- ret);
+ dev_err(hba->dev, "%s: Failed to set fde clock mux: %pe\n",
+ __func__, ERR_PTR(ret));
+ goto out;
}
}
} else {
if (clk_fde_scale) {
- ret = clk_set_parent(fde_clki->clk,
- mclk->ufs_fde_min_clki->clk);
+ ret = clk_set_parent(fde_clki->clk, mclk->ufs_fde_min_clki->clk);
if (ret) {
- dev_info(hba->dev,
- "Failed to set fde clk mux, ret = %d\n",
- ret);
+ dev_err(hba->dev, "%s: Failed to set fde clock mux: %pe\n",
+ __func__, ERR_PTR(ret));
goto out;
}
}

ret = clk_set_parent(clki->clk, mclk->ufs_sel_min_clki->clk);
if (ret) {
- dev_info(hba->dev, "Failed to set clk mux, ret = %d\n",
- ret);
+ dev_err(hba->dev, "%s: Failed to set clock mux: %pe\n",
+ __func__, ERR_PTR(ret));
goto out;
}

if (clk_bind_vcore) {
ret = regulator_set_voltage(reg, 0, INT_MAX);
if (ret) {
- dev_info(hba->dev,
- "failed to set vcore to MIN\n");
+ dev_err(hba->dev, "%s: Failed to set vcore to minimum: %pe\n",
+ __func__, ERR_PTR(ret));
}
}
}

--
2.51.1.dirty