[PATCH 0/3] media: nxp: imx8-isi: Add ISI support for i.MX95

[PATCH 0/3] media: nxp: imx8-isi: Add ISI support for i.MX95

[Guoniu Zhou]

The series add ISI support for i.MX95.

The ISI in i.MX95 supports eight channels and interface up to 4 pixel
link sources to obtain the image data for processing in its pipelines.

Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com>
---
Guoniu Zhou (3):
      media: dt-bindings: nxp,imx8-isi: Add i.MX95 ISI compatible string
      media: nxp: imx8-isi: Keep the default value for BLANK_PXL field
      media: nxp: imx8-isi: Add ISI support for i.MX95

 .../devicetree/bindings/media/nxp,imx8-isi.yaml    | 26 ++++++++++++-
 .../media/platform/nxp/imx8-isi/imx8-isi-core.c    | 13 +++++++
 .../media/platform/nxp/imx8-isi/imx8-isi-core.h    |  2 +
 .../media/platform/nxp/imx8-isi/imx8-isi-gasket.c  | 44 ++++++++++++++++++++++
 drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c  |  6 +--
 5 files changed, 86 insertions(+), 5 deletions(-)
---
base-commit: 1fdb55ed40fa5ebe6934bd6b93036c714ebb5ef8
change-id: 20250915-isi_imx95-1e3163fde962

Best regards,
-- 
Guoniu Zhou <guoniu.zhou@nxp.com>

[PATCH 1/3] media: dt-bindings: nxp,imx8-isi: Add i.MX95 ISI compatible string

[Guoniu Zhou]

From: Guoniu Zhou <guoniu.zhou@nxp.com>

The ISI module on i.MX95 supports up to eight channels and four link
sources to obtain the image data for processing in its pipelines. It
can process up to eight image sources at the same time.

Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com>
---
 .../devicetree/bindings/media/nxp,imx8-isi.yaml    | 26 +++++++++++++++++++++-
 1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
index f43b91984f0152fbbcf80db3b3bbad7e8ad6c11e..eaab98ecf343a2cd3620f7469c016c3955d37406 100644
--- a/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
+++ b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
@@ -23,6 +23,7 @@ properties:
       - fsl,imx8mp-isi
       - fsl,imx8ulp-isi
       - fsl,imx93-isi
+      - fsl,imx95-isi
 
   reg:
     maxItems: 1
@@ -49,7 +50,7 @@ properties:
   interrupts:
     description: Processing pipeline interrupts, one per pipeline
     minItems: 1
-    maxItems: 2
+    maxItems: 8
 
   power-domains:
     maxItems: 1
@@ -109,6 +110,29 @@ allOf:
             - port@0
             - port@1
 
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: fsl,imx95-isi
+    then:
+      properties:
+        interrupts:
+          maxItems: 8
+        ports:
+          properties:
+            port@0:
+              description: Pixel Link Slave 0
+            port@1:
+              description: Pixel Link Slave 1
+            port@2:
+              description: MIPI CSI-2 RX 0
+            port@3:
+              description: MIPI CSI-2 RX 1
+          required:
+            - port@2
+            - port@3
+
 additionalProperties: false
 
 examples:

-- 
2.34.1

Re: [PATCH 1/3] media: dt-bindings: nxp,imx8-isi: Add i.MX95 ISI compatible string

[Frank Li]

On Fri, Oct 24, 2025 at 05:46:52PM +0800, Guoniu Zhou wrote:
> From: Guoniu Zhou <guoniu.zhou@nxp.com>
>
> The ISI module on i.MX95 supports up to eight channels and four link
> sources to obtain the image data for processing in its pipelines. It
> can process up to eight image sources at the same time.
>
> Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com>
> ---
>  .../devicetree/bindings/media/nxp,imx8-isi.yaml    | 26 +++++++++++++++++++++-
>  1 file changed, 25 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
> index f43b91984f0152fbbcf80db3b3bbad7e8ad6c11e..eaab98ecf343a2cd3620f7469c016c3955d37406 100644
> --- a/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
> +++ b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
> @@ -23,6 +23,7 @@ properties:
>        - fsl,imx8mp-isi
>        - fsl,imx8ulp-isi
>        - fsl,imx93-isi
> +      - fsl,imx95-isi
>
>    reg:
>      maxItems: 1
> @@ -49,7 +50,7 @@ properties:
>    interrupts:
>      description: Processing pipeline interrupts, one per pipeline
>      minItems: 1
> -    maxItems: 2
> +    maxItems: 8
>
>    power-domains:
>      maxItems: 1
> @@ -109,6 +110,29 @@ allOf:
>              - port@0
>              - port@1
>
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: fsl,imx95-isi
> +    then:
> +      properties:
> +        interrupts:
> +          maxItems: 8

should minItems: 8 because you already limit maxItems at top;

> +        ports:
> +          properties:
> +            port@0:
> +              description: Pixel Link Slave 0
> +            port@1:
> +              description: Pixel Link Slave 1
> +            port@2:
> +              description: MIPI CSI-2 RX 0
> +            port@3:
> +              description: MIPI CSI-2 RX 1
> +          required:
> +            - port@2
> +            - port@3
> +

     else
       properties:
         interrupts:
           maxItem: 2

to keep the same restriction for existed compatible string.

Frank


>  additionalProperties: false
>
>  examples:
>
> --
> 2.34.1
>

Re: [PATCH 1/3] media: dt-bindings: nxp,imx8-isi: Add i.MX95 ISI compatible string

[Laurent Pinchart]

On Fri, Oct 24, 2025 at 09:34:14AM -0400, Frank Li wrote:
> On Fri, Oct 24, 2025 at 05:46:52PM +0800, Guoniu Zhou wrote:
> > From: Guoniu Zhou <guoniu.zhou@nxp.com>
> >
> > The ISI module on i.MX95 supports up to eight channels and four link
> > sources to obtain the image data for processing in its pipelines. It
> > can process up to eight image sources at the same time.
> >
> > Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com>
> > ---
> >  .../devicetree/bindings/media/nxp,imx8-isi.yaml    | 26 +++++++++++++++++++++-
> >  1 file changed, 25 insertions(+), 1 deletion(-)
> >
> > diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
> > index f43b91984f0152fbbcf80db3b3bbad7e8ad6c11e..eaab98ecf343a2cd3620f7469c016c3955d37406 100644
> > --- a/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
> > +++ b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
> > @@ -23,6 +23,7 @@ properties:
> >        - fsl,imx8mp-isi
> >        - fsl,imx8ulp-isi
> >        - fsl,imx93-isi
> > +      - fsl,imx95-isi
> >
> >    reg:
> >      maxItems: 1
> > @@ -49,7 +50,7 @@ properties:
> >    interrupts:
> >      description: Processing pipeline interrupts, one per pipeline
> >      minItems: 1
> > -    maxItems: 2
> > +    maxItems: 8
> >
> >    power-domains:
> >      maxItems: 1
> > @@ -109,6 +110,29 @@ allOf:
> >              - port@0
> >              - port@1
> >
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            const: fsl,imx95-isi
> > +    then:
> > +      properties:
> > +        interrupts:
> > +          maxItems: 8
> 
> should minItems: 8 because you already limit maxItems at top;

As far as I understand, when no "items" are specified, minItems defaults
to 1, and maxItems defaults to minItems (if specified) or 0 (if minItems
is not specified). This is implemented in dtschema/lib.py of
https://github.com/devicetree-org/dt-schema.git.

Then, in dtschema/fixups.py, if only one of minItems or maxItems is
specified, the other one is set to the same value. I believe relying on
this is frowned upon by the DT maintainers.

We could specify minItems only here, as the top-level constraint will
ensure we don't go over 8. That's not very future-proof though, so I
think specifying both minItems and maxItems would be best. Confirmation
from a DT maintainer would be appreciated.

The fsl,imx8mp-isi block above should then be fixed. It currently only
has maxItems set, minItems should be set to 2 as well.

> > +        ports:
> > +          properties:
> > +            port@0:
> > +              description: Pixel Link Slave 0
> > +            port@1:
> > +              description: Pixel Link Slave 1
> > +            port@2:
> > +              description: MIPI CSI-2 RX 0
> > +            port@3:
> > +              description: MIPI CSI-2 RX 1
> > +          required:
> > +            - port@2
> > +            - port@3
> > +
> 
>      else
>        properties:
>          interrupts:
>            maxItem: 2
> 
> to keep the same restriction for existed compatible string.

We already specify the number of interrupts in two separate conditional
blocks above, with any else statement (for all but fsl,imx8mp-isi first,
and then for fsl,imx8mp-isi). Both specify maxItems, so I think we're
fine.

> >  additionalProperties: false
> >
> >  examples:

-- 
Regards,

Laurent Pinchart

Re: [PATCH 1/3] media: dt-bindings: nxp,imx8-isi: Add i.MX95 ISI compatible string

[Frank Li]

On Mon, Oct 27, 2025 at 12:04:38AM +0200, Laurent Pinchart wrote:
> On Fri, Oct 24, 2025 at 09:34:14AM -0400, Frank Li wrote:
> > On Fri, Oct 24, 2025 at 05:46:52PM +0800, Guoniu Zhou wrote:
> > > From: Guoniu Zhou <guoniu.zhou@nxp.com>
> > >
> > > The ISI module on i.MX95 supports up to eight channels and four link
> > > sources to obtain the image data for processing in its pipelines. It
> > > can process up to eight image sources at the same time.
> > >
> > > Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com>
> > > ---
> > >  .../devicetree/bindings/media/nxp,imx8-isi.yaml    | 26 +++++++++++++++++++++-
> > >  1 file changed, 25 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
> > > index f43b91984f0152fbbcf80db3b3bbad7e8ad6c11e..eaab98ecf343a2cd3620f7469c016c3955d37406 100644
> > > --- a/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
> > > +++ b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
> > > @@ -23,6 +23,7 @@ properties:
> > >        - fsl,imx8mp-isi
> > >        - fsl,imx8ulp-isi
> > >        - fsl,imx93-isi
> > > +      - fsl,imx95-isi
> > >
> > >    reg:
> > >      maxItems: 1
> > > @@ -49,7 +50,7 @@ properties:
> > >    interrupts:
> > >      description: Processing pipeline interrupts, one per pipeline
> > >      minItems: 1
> > > -    maxItems: 2
> > > +    maxItems: 8
> > >
> > >    power-domains:
> > >      maxItems: 1
> > > @@ -109,6 +110,29 @@ allOf:
> > >              - port@0
> > >              - port@1
> > >
> > > +  - if:
> > > +      properties:
> > > +        compatible:
> > > +          contains:
> > > +            const: fsl,imx95-isi
> > > +    then:
> > > +      properties:
> > > +        interrupts:
> > > +          maxItems: 8
> >
> > should minItems: 8 because you already limit maxItems at top;
>
> As far as I understand, when no "items" are specified, minItems defaults
> to 1, and maxItems defaults to minItems (if specified) or 0 (if minItems
> is not specified). This is implemented in dtschema/lib.py of
> https://github.com/devicetree-org/dt-schema.git.
>
> Then, in dtschema/fixups.py, if only one of minItems or maxItems is
> specified, the other one is set to the same value. I believe relying on
> this is frowned upon by the DT maintainers.
>
> We could specify minItems only here, as the top-level constraint will
> ensure we don't go over 8. That's not very future-proof though, so I
> think specifying both minItems and maxItems would be best. Confirmation
> from a DT maintainer would be appreciated.

I pretty sure I am correct. please below thread, I met many similar cases
before.
https://lore.kernel.org/imx/72c29785-eb7a-4cc8-a74c-3aad50129a23@kernel.org/

Frank

>
> The fsl,imx8mp-isi block above should then be fixed. It currently only
> has maxItems set, minItems should be set to 2 as well.
>
> > > +        ports:
> > > +          properties:
> > > +            port@0:
> > > +              description: Pixel Link Slave 0
> > > +            port@1:
> > > +              description: Pixel Link Slave 1
> > > +            port@2:
> > > +              description: MIPI CSI-2 RX 0
> > > +            port@3:
> > > +              description: MIPI CSI-2 RX 1
> > > +          required:
> > > +            - port@2
> > > +            - port@3
> > > +
> >
> >      else
> >        properties:
> >          interrupts:
> >            maxItem: 2
> >
> > to keep the same restriction for existed compatible string.
>
> We already specify the number of interrupts in two separate conditional
> blocks above, with any else statement (for all but fsl,imx8mp-isi first,
> and then for fsl,imx8mp-isi). Both specify maxItems, so I think we're
> fine.
>
> > >  additionalProperties: false
> > >
> > >  examples:
>
> --
> Regards,
>
> Laurent Pinchart

Re: [PATCH 1/3] media: dt-bindings: nxp,imx8-isi: Add i.MX95 ISI compatible string

[Laurent Pinchart]

On Mon, Oct 27, 2025 at 03:19:58PM -0400, Frank Li wrote:
> On Mon, Oct 27, 2025 at 12:04:38AM +0200, Laurent Pinchart wrote:
> > On Fri, Oct 24, 2025 at 09:34:14AM -0400, Frank Li wrote:
> > > On Fri, Oct 24, 2025 at 05:46:52PM +0800, Guoniu Zhou wrote:
> > > > From: Guoniu Zhou <guoniu.zhou@nxp.com>
> > > >
> > > > The ISI module on i.MX95 supports up to eight channels and four link
> > > > sources to obtain the image data for processing in its pipelines. It
> > > > can process up to eight image sources at the same time.
> > > >
> > > > Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com>
> > > > ---
> > > >  .../devicetree/bindings/media/nxp,imx8-isi.yaml    | 26 +++++++++++++++++++++-
> > > >  1 file changed, 25 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
> > > > index f43b91984f0152fbbcf80db3b3bbad7e8ad6c11e..eaab98ecf343a2cd3620f7469c016c3955d37406 100644
> > > > --- a/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
> > > > +++ b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
> > > > @@ -23,6 +23,7 @@ properties:
> > > >        - fsl,imx8mp-isi
> > > >        - fsl,imx8ulp-isi
> > > >        - fsl,imx93-isi
> > > > +      - fsl,imx95-isi
> > > >
> > > >    reg:
> > > >      maxItems: 1
> > > > @@ -49,7 +50,7 @@ properties:
> > > >    interrupts:
> > > >      description: Processing pipeline interrupts, one per pipeline
> > > >      minItems: 1
> > > > -    maxItems: 2
> > > > +    maxItems: 8
> > > >
> > > >    power-domains:
> > > >      maxItems: 1
> > > > @@ -109,6 +110,29 @@ allOf:
> > > >              - port@0
> > > >              - port@1
> > > >
> > > > +  - if:
> > > > +      properties:
> > > > +        compatible:
> > > > +          contains:
> > > > +            const: fsl,imx95-isi
> > > > +    then:
> > > > +      properties:
> > > > +        interrupts:
> > > > +          maxItems: 8
> > >
> > > should minItems: 8 because you already limit maxItems at top;
> >
> > As far as I understand, when no "items" are specified, minItems defaults
> > to 1, and maxItems defaults to minItems (if specified) or 0 (if minItems
> > is not specified). This is implemented in dtschema/lib.py of
> > https://github.com/devicetree-org/dt-schema.git.
> >
> > Then, in dtschema/fixups.py, if only one of minItems or maxItems is
> > specified, the other one is set to the same value. I believe relying on
> > this is frowned upon by the DT maintainers.
> >
> > We could specify minItems only here, as the top-level constraint will
> > ensure we don't go over 8. That's not very future-proof though, so I
> > think specifying both minItems and maxItems would be best. Confirmation
> > from a DT maintainer would be appreciated.
> 
> I pretty sure I am correct. please below thread, I met many similar cases
> before.
> https://lore.kernel.org/imx/72c29785-eb7a-4cc8-a74c-3aad50129a23@kernel.org/

I discussed this with Krzysztof on IRC last week. He said that in
conditional statements, both minItems and maxItems should be set, except
when one of them is a border constraint (being the same as the top-level
constraint). In that case it can be omitted.

So in this particular case you're right, we should specify minItems
here, not maxItems.

> > The fsl,imx8mp-isi block above should then be fixed. It currently only
> > has maxItems set, minItems should be set to 2 as well.

The fsl,imx8mp-isi conditional block should specify both minItems and
maxItems, and set both to 2.

> >
> > > > +        ports:
> > > > +          properties:
> > > > +            port@0:
> > > > +              description: Pixel Link Slave 0
> > > > +            port@1:
> > > > +              description: Pixel Link Slave 1
> > > > +            port@2:
> > > > +              description: MIPI CSI-2 RX 0
> > > > +            port@3:
> > > > +              description: MIPI CSI-2 RX 1
> > > > +          required:
> > > > +            - port@2
> > > > +            - port@3
> > > > +
> > >
> > >      else
> > >        properties:
> > >          interrupts:
> > >            maxItem: 2
> > >
> > > to keep the same restriction for existed compatible string.
> >
> > We already specify the number of interrupts in two separate conditional
> > blocks above, with any else statement (for all but fsl,imx8mp-isi first,
> > and then for fsl,imx8mp-isi). Both specify maxItems, so I think we're
> > fine.
> >
> > > >  additionalProperties: false
> > > >
> > > >  examples:

-- 
Regards,

Laurent Pinchart

[PATCH 2/3] media: nxp: imx8-isi: Keep the default value for BLANK_PXL field

[Guoniu Zhou]

From: Guoniu Zhou <guoniu.zhou@nxp.com>

The field provides the value of the blank pixel to be inserted in the
image in case an overflow error occurs in the output buffers of the
channel. Its default value is 0xff, so no need to set again.

Besides, the field only exist in i.MX8QM/XP ISI version. Other versions
like mscale series, remove the field since it won't send data to AXI bus
when overflow error occurs and set the field as reserved. i.MX9 series
use the field as other purposes.

Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com>
---
 drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
index 9225a7ac1c3ee7e42e64983982eb4b6c27e356fe..0187d4ab97e8e28fca9013f6864a094e08f2c570 100644
--- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
+++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
@@ -309,8 +309,8 @@ static void mxc_isi_channel_set_control(struct mxc_isi_pipe *pipe,
 
 	val = mxc_isi_read(pipe, CHNL_CTRL);
 	val &= ~(CHNL_CTRL_CHNL_BYPASS | CHNL_CTRL_CHAIN_BUF_MASK |
-		 CHNL_CTRL_BLANK_PXL_MASK | CHNL_CTRL_SRC_TYPE_MASK |
-		 CHNL_CTRL_MIPI_VC_ID_MASK | CHNL_CTRL_SRC_INPUT_MASK);
+		 CHNL_CTRL_SRC_TYPE_MASK | CHNL_CTRL_MIPI_VC_ID_MASK |
+		 CHNL_CTRL_SRC_INPUT_MASK);
 
 	/*
 	 * If no scaling or color space conversion is needed, bypass the
@@ -323,8 +323,6 @@ static void mxc_isi_channel_set_control(struct mxc_isi_pipe *pipe,
 	if (pipe->chained)
 		val |= CHNL_CTRL_CHAIN_BUF(CHNL_CTRL_CHAIN_BUF_2_CHAIN);
 
-	val |= CHNL_CTRL_BLANK_PXL(0xff);
-
 	/* Input source (including VC configuration for CSI-2) */
 	if (input == MXC_ISI_INPUT_MEM) {
 		/*

-- 
2.34.1

Re: [PATCH 2/3] media: nxp: imx8-isi: Keep the default value for BLANK_PXL field

[Frank Li]

On Fri, Oct 24, 2025 at 05:46:53PM +0800, Guoniu Zhou wrote:
> From: Guoniu Zhou <guoniu.zhou@nxp.com>
>
> The field provides the value of the blank pixel to be inserted in the

The field BLANK_PXL provides

> image in case an overflow error occurs in the output buffers of the
> channel. Its default value is 0xff, so no need to set again.
>
> Besides, the field only exist in i.MX8QM/XP ISI version. Other versions
> like mscale series, remove the field since it won't send data to AXI bus
> when overflow error occurs and set the field as reserved. i.MX9 series

mark BLANK_PXL as reserved. i.MX9 series use it for other purposes.

Reviewed-by: Frank Li <Frank.Li@nxp.com>

> use the field as other purposes.
>
> Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com>
> ---
>  drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c | 6 ++----
>  1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> index 9225a7ac1c3ee7e42e64983982eb4b6c27e356fe..0187d4ab97e8e28fca9013f6864a094e08f2c570 100644
> --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> @@ -309,8 +309,8 @@ static void mxc_isi_channel_set_control(struct mxc_isi_pipe *pipe,
>
>  	val = mxc_isi_read(pipe, CHNL_CTRL);
>  	val &= ~(CHNL_CTRL_CHNL_BYPASS | CHNL_CTRL_CHAIN_BUF_MASK |
> -		 CHNL_CTRL_BLANK_PXL_MASK | CHNL_CTRL_SRC_TYPE_MASK |
> -		 CHNL_CTRL_MIPI_VC_ID_MASK | CHNL_CTRL_SRC_INPUT_MASK);
> +		 CHNL_CTRL_SRC_TYPE_MASK | CHNL_CTRL_MIPI_VC_ID_MASK |
> +		 CHNL_CTRL_SRC_INPUT_MASK);
>
>  	/*
>  	 * If no scaling or color space conversion is needed, bypass the
> @@ -323,8 +323,6 @@ static void mxc_isi_channel_set_control(struct mxc_isi_pipe *pipe,
>  	if (pipe->chained)
>  		val |= CHNL_CTRL_CHAIN_BUF(CHNL_CTRL_CHAIN_BUF_2_CHAIN);
>
> -	val |= CHNL_CTRL_BLANK_PXL(0xff);
> -
>  	/* Input source (including VC configuration for CSI-2) */
>  	if (input == MXC_ISI_INPUT_MEM) {
>  		/*
>
> --
> 2.34.1
>

Re: [PATCH 2/3] media: nxp: imx8-isi: Keep the default value for BLANK_PXL field

[Laurent Pinchart]

On Fri, Oct 24, 2025 at 09:41:50AM -0400, Frank Li wrote:
> On Fri, Oct 24, 2025 at 05:46:53PM +0800, Guoniu Zhou wrote:
> > From: Guoniu Zhou <guoniu.zhou@nxp.com>
> >
> > The field provides the value of the blank pixel to be inserted in the
> 
> The field BLANK_PXL provides
> 
> > image in case an overflow error occurs in the output buffers of the
> > channel. Its default value is 0xff, so no need to set again.
> >
> > Besides, the field only exist in i.MX8QM/XP ISI version. Other versions
> > like mscale series, remove the field since it won't send data to AXI bus

What's the mscale series ? Is that i.MX 8M ?

> > when overflow error occurs and set the field as reserved. i.MX9 series
> 
> mark BLANK_PXL as reserved. i.MX9 series use it for other purposes.
> 
> Reviewed-by: Frank Li <Frank.Li@nxp.com>
> 
> > use the field as other purposes.
> >
> > Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com>

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

> > ---
> >  drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c | 6 ++----
> >  1 file changed, 2 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> > index 9225a7ac1c3ee7e42e64983982eb4b6c27e356fe..0187d4ab97e8e28fca9013f6864a094e08f2c570 100644
> > --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> > +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> > @@ -309,8 +309,8 @@ static void mxc_isi_channel_set_control(struct mxc_isi_pipe *pipe,
> >
> >  	val = mxc_isi_read(pipe, CHNL_CTRL);
> >  	val &= ~(CHNL_CTRL_CHNL_BYPASS | CHNL_CTRL_CHAIN_BUF_MASK |
> > -		 CHNL_CTRL_BLANK_PXL_MASK | CHNL_CTRL_SRC_TYPE_MASK |
> > -		 CHNL_CTRL_MIPI_VC_ID_MASK | CHNL_CTRL_SRC_INPUT_MASK);
> > +		 CHNL_CTRL_SRC_TYPE_MASK | CHNL_CTRL_MIPI_VC_ID_MASK |
> > +		 CHNL_CTRL_SRC_INPUT_MASK);
> >
> >  	/*
> >  	 * If no scaling or color space conversion is needed, bypass the
> > @@ -323,8 +323,6 @@ static void mxc_isi_channel_set_control(struct mxc_isi_pipe *pipe,
> >  	if (pipe->chained)
> >  		val |= CHNL_CTRL_CHAIN_BUF(CHNL_CTRL_CHAIN_BUF_2_CHAIN);
> >
> > -	val |= CHNL_CTRL_BLANK_PXL(0xff);
> > -
> >  	/* Input source (including VC configuration for CSI-2) */
> >  	if (input == MXC_ISI_INPUT_MEM) {
> >  		/*

-- 
Regards,

Laurent Pinchart

RE: [PATCH 2/3] media: nxp: imx8-isi: Keep the default value for BLANK_PXL field

[G.N. Zhou (OSS)]

Hi Laurent,

> -----Original Message-----
> From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Sent: Monday, October 27, 2025 6:12 AM
> To: Frank Li <frank.li@nxp.com>
> Cc: G.N. Zhou (OSS) <guoniu.zhou@oss.nxp.com>; Mauro Carvalho Chehab
> <mchehab@kernel.org>; Rob Herring <robh@kernel.org>; Krzysztof Kozlowski
> <krzk+dt@kernel.org>; Conor Dooley <conor+dt@kernel.org>; Shawn Guo
> <shawnguo@kernel.org>; Sascha Hauer <s.hauer@pengutronix.de>;
> Pengutronix Kernel Team <kernel@pengutronix.de>; Fabio Estevam
> <festevam@gmail.com>; linux-media@vger.kernel.org;
> devicetree@vger.kernel.org; imx@lists.linux.dev; linux-arm-
> kernel@lists.infradead.org; linux-kernel@vger.kernel.org; G.N. Zhou
> <guoniu.zhou@nxp.com>
> Subject: Re: [PATCH 2/3] media: nxp: imx8-isi: Keep the default value for
> BLANK_PXL field
> 
> On Fri, Oct 24, 2025 at 09:41:50AM -0400, Frank Li wrote:
> > On Fri, Oct 24, 2025 at 05:46:53PM +0800, Guoniu Zhou wrote:
> > > From: Guoniu Zhou <guoniu.zhou@nxp.com>
> > >
> > > The field provides the value of the blank pixel to be inserted in
> > > the
> >
> > The field BLANK_PXL provides
> >
> > > image in case an overflow error occurs in the output buffers of the
> > > channel. Its default value is 0xff, so no need to set again.
> > >
> > > Besides, the field only exist in i.MX8QM/XP ISI version. Other
> > > versions like mscale series, remove the field since it won't send
> > > data to AXI bus
> 
> What's the mscale series ? Is that i.MX 8M ?

Yes, will update the commit log to make it clear. Thanks for your review.

> 
> > > when overflow error occurs and set the field as reserved. i.MX9
> > > series
> >
> > mark BLANK_PXL as reserved. i.MX9 series use it for other purposes.
> >
> > Reviewed-by: Frank Li <Frank.Li@nxp.com>
> >
> > > use the field as other purposes.
> > >
> > > Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com>
> 
> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> 
> > > ---
> > >  drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c | 6 ++----
> > >  1 file changed, 2 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> > > b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> > > index
> > >
> 9225a7ac1c3ee7e42e64983982eb4b6c27e356fe..0187d4ab97e8e28fca9013f6
> 86
> > > 4a094e08f2c570 100644
> > > --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> > > +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> > > @@ -309,8 +309,8 @@ static void mxc_isi_channel_set_control(struct
> > > mxc_isi_pipe *pipe,
> > >
> > >  	val = mxc_isi_read(pipe, CHNL_CTRL);
> > >  	val &= ~(CHNL_CTRL_CHNL_BYPASS | CHNL_CTRL_CHAIN_BUF_MASK
> |
> > > -		 CHNL_CTRL_BLANK_PXL_MASK |
> CHNL_CTRL_SRC_TYPE_MASK |
> > > -		 CHNL_CTRL_MIPI_VC_ID_MASK |
> CHNL_CTRL_SRC_INPUT_MASK);
> > > +		 CHNL_CTRL_SRC_TYPE_MASK |
> CHNL_CTRL_MIPI_VC_ID_MASK |
> > > +		 CHNL_CTRL_SRC_INPUT_MASK);
> > >
> > >  	/*
> > >  	 * If no scaling or color space conversion is needed, bypass the
> > > @@ -323,8 +323,6 @@ static void mxc_isi_channel_set_control(struct
> mxc_isi_pipe *pipe,
> > >  	if (pipe->chained)
> > >  		val |=
> CHNL_CTRL_CHAIN_BUF(CHNL_CTRL_CHAIN_BUF_2_CHAIN);
> > >
> > > -	val |= CHNL_CTRL_BLANK_PXL(0xff);
> > > -
> > >  	/* Input source (including VC configuration for CSI-2) */
> > >  	if (input == MXC_ISI_INPUT_MEM) {
> > >  		/*
> 
> --
> Regards,
> 
> Laurent Pinchart

[PATCH 3/3] media: nxp: imx8-isi: Add ISI support for i.MX95

[Guoniu Zhou]

From: Guoniu Zhou <guoniu.zhou@nxp.com>

The ISI module on i.MX95 supports up to eight channels and four link
sources to obtain the image data for processing in its pipelines. It
can process up to eight image sources at the same time.

In i.MX95, the gasket callbacks set ISI QoS which decide the priority
to access system memory when there are multiple masters access memory
simultaneously in camera domain.

Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com>
---
 .../media/platform/nxp/imx8-isi/imx8-isi-core.c    | 13 +++++++
 .../media/platform/nxp/imx8-isi/imx8-isi-core.h    |  2 +
 .../media/platform/nxp/imx8-isi/imx8-isi-gasket.c  | 44 ++++++++++++++++++++++
 3 files changed, 59 insertions(+)

diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
index adc8d9960bf0df87d4e475661a3439beaf5ce9f6..ea9cc6d72bd4605000c6cbac2fa8cb9806e3cd3b 100644
--- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
+++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
@@ -337,6 +337,18 @@ static const struct mxc_isi_plat_data mxc_imx93_data = {
 	.has_36bit_dma		= false,
 };
 
+static const struct mxc_isi_plat_data mxc_imx95_data = {
+	.model			= MXC_ISI_IMX95,
+	.num_ports		= 4,
+	.num_channels		= 8,
+	.reg_offset		= 0x10000,
+	.ier_reg		= &mxc_imx8_isi_ier_v2,
+	.set_thd		= &mxc_imx8_isi_thd_v1,
+	.buf_active_reverse	= true,
+	.gasket_ops		= &mxc_imx95_gasket_ops,
+	.has_36bit_dma		= true,
+};
+
 static const struct mxc_isi_plat_data mxc_imx8qm_data = {
 	.model			= MXC_ISI_IMX8QM,
 	.num_ports		= 5,
@@ -548,6 +560,7 @@ static const struct of_device_id mxc_isi_of_match[] = {
 	{ .compatible = "fsl,imx8qxp-isi", .data = &mxc_imx8qxp_data },
 	{ .compatible = "fsl,imx8ulp-isi", .data = &mxc_imx8ulp_data },
 	{ .compatible = "fsl,imx93-isi", .data = &mxc_imx93_data },
+	{ .compatible = "fsl,imx95-isi", .data = &mxc_imx95_data },
 	{ /* sentinel */ },
 };
 MODULE_DEVICE_TABLE(of, mxc_isi_of_match);
diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
index e84af5127e4e7938e55e31b7063bee5e2cd4cb11..d1297ac26c56bdd97e4dd325b2a7394430a7adb9 100644
--- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
+++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
@@ -161,6 +161,7 @@ enum model {
 	MXC_ISI_IMX8QXP,
 	MXC_ISI_IMX8ULP,
 	MXC_ISI_IMX93,
+	MXC_ISI_IMX95,
 };
 
 struct mxc_isi_plat_data {
@@ -297,6 +298,7 @@ struct mxc_isi_dev {
 
 extern const struct mxc_gasket_ops mxc_imx8_gasket_ops;
 extern const struct mxc_gasket_ops mxc_imx93_gasket_ops;
+extern const struct mxc_gasket_ops mxc_imx95_gasket_ops;
 
 int mxc_isi_crossbar_init(struct mxc_isi_dev *isi);
 void mxc_isi_crossbar_cleanup(struct mxc_isi_crossbar *xbar);
diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c
index f69c3b5d478209c083738477edf380e3f280c471..6418ee1aabdad3cb92e84f2ef6406c5503987401 100644
--- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c
+++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c
@@ -3,6 +3,7 @@
  * Copyright 2019-2023 NXP
  */
 
+#include <linux/bits.h>
 #include <linux/regmap.h>
 
 #include <media/mipi-csi2.h>
@@ -83,3 +84,46 @@ const struct mxc_gasket_ops mxc_imx93_gasket_ops = {
 	.enable = mxc_imx93_gasket_enable,
 	.disable = mxc_imx93_gasket_disable,
 };
+
+/* -----------------------------------------------------------------------------
+ * i.MX95 gasket
+ */
+#define ISI_QOS						0x10
+#define ISI_QOS_AWQOS(x)				FIELD_PREP(GENMASK(2, 0), (x))
+
+#define ISI_PANIC_QOS					0x14
+#define ISI_PANIC_QOS_HURRY_AWQOS(x)			FIELD_PREP(GENMASK(2, 0), (x))
+
+static void mxc_imx95_set_qos(struct mxc_isi_dev *isi, unsigned int val)
+{
+	/* Config QoS */
+	regmap_write(isi->gasket, ISI_QOS, ISI_QOS_AWQOS(val));
+
+	/* Config Panic QoS */
+	regmap_write(isi->gasket, ISI_PANIC_QOS, ISI_PANIC_QOS_HURRY_AWQOS(val));
+}
+
+static void mxc_imx95_clear_qos(struct mxc_isi_dev *isi)
+{
+	regmap_write(isi->gasket, ISI_QOS, 0x0);
+	regmap_write(isi->gasket, ISI_PANIC_QOS, 0x0);
+}
+
+static void mxc_imx95_gasket_enable(struct mxc_isi_dev *isi,
+				    const struct v4l2_mbus_frame_desc *fd,
+				    const struct v4l2_mbus_framefmt *fmt,
+				    const unsigned int port)
+{
+	mxc_imx95_set_qos(isi, 0x3);
+}
+
+static void mxc_imx95_gasket_disable(struct mxc_isi_dev *isi,
+				     unsigned int port)
+{
+	mxc_imx95_clear_qos(isi);
+}
+
+const struct mxc_gasket_ops mxc_imx95_gasket_ops = {
+	.enable = mxc_imx95_gasket_enable,
+	.disable = mxc_imx95_gasket_disable,
+};

-- 
2.34.1

Re: [PATCH 3/3] media: nxp: imx8-isi: Add ISI support for i.MX95

[Frank Li]

On Fri, Oct 24, 2025 at 05:46:54PM +0800, Guoniu Zhou wrote:
> From: Guoniu Zhou <guoniu.zhou@nxp.com>
>
> The ISI module on i.MX95 supports up to eight channels and four link
> sources to obtain the image data for processing in its pipelines. It
> can process up to eight image sources at the same time.
>
> In i.MX95, the gasket callbacks set ISI QoS which decide the priority
> to access system memory when there are multiple masters access memory
> simultaneously in camera domain.
>
> Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com>
> ---
>  .../media/platform/nxp/imx8-isi/imx8-isi-core.c    | 13 +++++++
>  .../media/platform/nxp/imx8-isi/imx8-isi-core.h    |  2 +
>  .../media/platform/nxp/imx8-isi/imx8-isi-gasket.c  | 44 ++++++++++++++++++++++
>  3 files changed, 59 insertions(+)
>
> diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> index adc8d9960bf0df87d4e475661a3439beaf5ce9f6..ea9cc6d72bd4605000c6cbac2fa8cb9806e3cd3b 100644
> --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> @@ -337,6 +337,18 @@ static const struct mxc_isi_plat_data mxc_imx93_data = {
>  	.has_36bit_dma		= false,
>  };
>
> +static const struct mxc_isi_plat_data mxc_imx95_data = {
> +	.model			= MXC_ISI_IMX95,
> +	.num_ports		= 4,
> +	.num_channels		= 8,
> +	.reg_offset		= 0x10000,
> +	.ier_reg		= &mxc_imx8_isi_ier_v2,
> +	.set_thd		= &mxc_imx8_isi_thd_v1,
> +	.buf_active_reverse	= true,
> +	.gasket_ops		= &mxc_imx95_gasket_ops,
> +	.has_36bit_dma		= true,
> +};
> +
>  static const struct mxc_isi_plat_data mxc_imx8qm_data = {
>  	.model			= MXC_ISI_IMX8QM,
>  	.num_ports		= 5,
> @@ -548,6 +560,7 @@ static const struct of_device_id mxc_isi_of_match[] = {
>  	{ .compatible = "fsl,imx8qxp-isi", .data = &mxc_imx8qxp_data },
>  	{ .compatible = "fsl,imx8ulp-isi", .data = &mxc_imx8ulp_data },
>  	{ .compatible = "fsl,imx93-isi", .data = &mxc_imx93_data },
> +	{ .compatible = "fsl,imx95-isi", .data = &mxc_imx95_data },
>  	{ /* sentinel */ },
>  };
>  MODULE_DEVICE_TABLE(of, mxc_isi_of_match);
> diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
> index e84af5127e4e7938e55e31b7063bee5e2cd4cb11..d1297ac26c56bdd97e4dd325b2a7394430a7adb9 100644
> --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
> +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
> @@ -161,6 +161,7 @@ enum model {
>  	MXC_ISI_IMX8QXP,
>  	MXC_ISI_IMX8ULP,
>  	MXC_ISI_IMX93,
> +	MXC_ISI_IMX95,
>  };
>
>  struct mxc_isi_plat_data {
> @@ -297,6 +298,7 @@ struct mxc_isi_dev {
>
>  extern const struct mxc_gasket_ops mxc_imx8_gasket_ops;
>  extern const struct mxc_gasket_ops mxc_imx93_gasket_ops;
> +extern const struct mxc_gasket_ops mxc_imx95_gasket_ops;
>
>  int mxc_isi_crossbar_init(struct mxc_isi_dev *isi);
>  void mxc_isi_crossbar_cleanup(struct mxc_isi_crossbar *xbar);
> diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c
> index f69c3b5d478209c083738477edf380e3f280c471..6418ee1aabdad3cb92e84f2ef6406c5503987401 100644
> --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c
> +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c
> @@ -3,6 +3,7 @@
>   * Copyright 2019-2023 NXP
>   */
>
> +#include <linux/bits.h>
>  #include <linux/regmap.h>
>
>  #include <media/mipi-csi2.h>
> @@ -83,3 +84,46 @@ const struct mxc_gasket_ops mxc_imx93_gasket_ops = {
>  	.enable = mxc_imx93_gasket_enable,
>  	.disable = mxc_imx93_gasket_disable,
>  };
> +
> +/* -----------------------------------------------------------------------------
> + * i.MX95 gasket
> + */
> +#define ISI_QOS						0x10
> +#define ISI_QOS_AWQOS(x)				FIELD_PREP(GENMASK(2, 0), (x))
> +
> +#define ISI_PANIC_QOS					0x14
> +#define ISI_PANIC_QOS_HURRY_AWQOS(x)			FIELD_PREP(GENMASK(2, 0), (x))
> +
> +static void mxc_imx95_set_qos(struct mxc_isi_dev *isi, unsigned int val)
> +{
> +	/* Config QoS */
> +	regmap_write(isi->gasket, ISI_QOS, ISI_QOS_AWQOS(val));
> +
> +	/* Config Panic QoS */
> +	regmap_write(isi->gasket, ISI_PANIC_QOS, ISI_PANIC_QOS_HURRY_AWQOS(val));
> +}
> +
> +static void mxc_imx95_clear_qos(struct mxc_isi_dev *isi)
> +{
> +	regmap_write(isi->gasket, ISI_QOS, 0x0);
> +	regmap_write(isi->gasket, ISI_PANIC_QOS, 0x0);
> +}
> +
> +static void mxc_imx95_gasket_enable(struct mxc_isi_dev *isi,
> +				    const struct v4l2_mbus_frame_desc *fd,
> +				    const struct v4l2_mbus_framefmt *fmt,
> +				    const unsigned int port)
> +{
> +	mxc_imx95_set_qos(isi, 0x3);
> +}

can we use standard interconnects standard interface to config Qos stuff.
https://elixir.bootlin.com/linux/v6.17.4/source/include/linux/interconnect.h

Frank Li
> +
> +static void mxc_imx95_gasket_disable(struct mxc_isi_dev *isi,
> +				     unsigned int port)
> +{
> +	mxc_imx95_clear_qos(isi);
> +}
> +
> +const struct mxc_gasket_ops mxc_imx95_gasket_ops = {
> +	.enable = mxc_imx95_gasket_enable,
> +	.disable = mxc_imx95_gasket_disable,
> +};
>
> --
> 2.34.1
>

Re: [PATCH 3/3] media: nxp: imx8-isi: Add ISI support for i.MX95

[Laurent Pinchart]

On Fri, Oct 24, 2025 at 09:50:08AM -0400, Frank Li wrote:
> On Fri, Oct 24, 2025 at 05:46:54PM +0800, Guoniu Zhou wrote:
> > From: Guoniu Zhou <guoniu.zhou@nxp.com>
> >
> > The ISI module on i.MX95 supports up to eight channels and four link
> > sources to obtain the image data for processing in its pipelines. It
> > can process up to eight image sources at the same time.
> >
> > In i.MX95, the gasket callbacks set ISI QoS which decide the priority
> > to access system memory when there are multiple masters access memory
> > simultaneously in camera domain.
> >
> > Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com>
> > ---
> >  .../media/platform/nxp/imx8-isi/imx8-isi-core.c    | 13 +++++++
> >  .../media/platform/nxp/imx8-isi/imx8-isi-core.h    |  2 +
> >  .../media/platform/nxp/imx8-isi/imx8-isi-gasket.c  | 44 ++++++++++++++++++++++
> >  3 files changed, 59 insertions(+)
> >
> > diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> > index adc8d9960bf0df87d4e475661a3439beaf5ce9f6..ea9cc6d72bd4605000c6cbac2fa8cb9806e3cd3b 100644
> > --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> > +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> > @@ -337,6 +337,18 @@ static const struct mxc_isi_plat_data mxc_imx93_data = {
> >  	.has_36bit_dma		= false,
> >  };
> >
> > +static const struct mxc_isi_plat_data mxc_imx95_data = {
> > +	.model			= MXC_ISI_IMX95,
> > +	.num_ports		= 4,
> > +	.num_channels		= 8,
> > +	.reg_offset		= 0x10000,
> > +	.ier_reg		= &mxc_imx8_isi_ier_v2,
> > +	.set_thd		= &mxc_imx8_isi_thd_v1,
> > +	.buf_active_reverse	= true,
> > +	.gasket_ops		= &mxc_imx95_gasket_ops,
> > +	.has_36bit_dma		= true,
> > +};
> > +
> >  static const struct mxc_isi_plat_data mxc_imx8qm_data = {
> >  	.model			= MXC_ISI_IMX8QM,
> >  	.num_ports		= 5,
> > @@ -548,6 +560,7 @@ static const struct of_device_id mxc_isi_of_match[] = {
> >  	{ .compatible = "fsl,imx8qxp-isi", .data = &mxc_imx8qxp_data },
> >  	{ .compatible = "fsl,imx8ulp-isi", .data = &mxc_imx8ulp_data },
> >  	{ .compatible = "fsl,imx93-isi", .data = &mxc_imx93_data },
> > +	{ .compatible = "fsl,imx95-isi", .data = &mxc_imx95_data },
> >  	{ /* sentinel */ },
> >  };
> >  MODULE_DEVICE_TABLE(of, mxc_isi_of_match);
> > diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
> > index e84af5127e4e7938e55e31b7063bee5e2cd4cb11..d1297ac26c56bdd97e4dd325b2a7394430a7adb9 100644
> > --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
> > +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
> > @@ -161,6 +161,7 @@ enum model {
> >  	MXC_ISI_IMX8QXP,
> >  	MXC_ISI_IMX8ULP,
> >  	MXC_ISI_IMX93,
> > +	MXC_ISI_IMX95,
> >  };
> >
> >  struct mxc_isi_plat_data {
> > @@ -297,6 +298,7 @@ struct mxc_isi_dev {
> >
> >  extern const struct mxc_gasket_ops mxc_imx8_gasket_ops;
> >  extern const struct mxc_gasket_ops mxc_imx93_gasket_ops;
> > +extern const struct mxc_gasket_ops mxc_imx95_gasket_ops;
> >
> >  int mxc_isi_crossbar_init(struct mxc_isi_dev *isi);
> >  void mxc_isi_crossbar_cleanup(struct mxc_isi_crossbar *xbar);
> > diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c
> > index f69c3b5d478209c083738477edf380e3f280c471..6418ee1aabdad3cb92e84f2ef6406c5503987401 100644
> > --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c
> > +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c
> > @@ -3,6 +3,7 @@
> >   * Copyright 2019-2023 NXP
> >   */
> >
> > +#include <linux/bits.h>
> >  #include <linux/regmap.h>
> >
> >  #include <media/mipi-csi2.h>
> > @@ -83,3 +84,46 @@ const struct mxc_gasket_ops mxc_imx93_gasket_ops = {
> >  	.enable = mxc_imx93_gasket_enable,
> >  	.disable = mxc_imx93_gasket_disable,
> >  };
> > +
> > +/* -----------------------------------------------------------------------------
> > + * i.MX95 gasket
> > + */
> > +#define ISI_QOS						0x10
> > +#define ISI_QOS_AWQOS(x)				FIELD_PREP(GENMASK(2, 0), (x))
> > +
> > +#define ISI_PANIC_QOS					0x14
> > +#define ISI_PANIC_QOS_HURRY_AWQOS(x)			FIELD_PREP(GENMASK(2, 0), (x))
> > +
> > +static void mxc_imx95_set_qos(struct mxc_isi_dev *isi, unsigned int val)
> > +{
> > +	/* Config QoS */
> > +	regmap_write(isi->gasket, ISI_QOS, ISI_QOS_AWQOS(val));
> > +
> > +	/* Config Panic QoS */
> > +	regmap_write(isi->gasket, ISI_PANIC_QOS, ISI_PANIC_QOS_HURRY_AWQOS(val));
> > +}
> > +
> > +static void mxc_imx95_clear_qos(struct mxc_isi_dev *isi)
> > +{
> > +	regmap_write(isi->gasket, ISI_QOS, 0x0);
> > +	regmap_write(isi->gasket, ISI_PANIC_QOS, 0x0);
> > +}
> > +
> > +static void mxc_imx95_gasket_enable(struct mxc_isi_dev *isi,
> > +				    const struct v4l2_mbus_frame_desc *fd,
> > +				    const struct v4l2_mbus_framefmt *fmt,
> > +				    const unsigned int port)
> > +{
> > +	mxc_imx95_set_qos(isi, 0x3);
> > +}
> 
> can we use standard interconnects standard interface to config Qos stuff.
> https://elixir.bootlin.com/linux/v6.17.4/source/include/linux/interconnect.h

Good suggestion, that would be my preference too. Otherwise we'll end up
hardcoding parameters here, which doesn't feel right. I assume the
values above would need to be tweaked based on use cases.

> > +
> > +static void mxc_imx95_gasket_disable(struct mxc_isi_dev *isi,
> > +				     unsigned int port)
> > +{
> > +	mxc_imx95_clear_qos(isi);
> > +}
> > +
> > +const struct mxc_gasket_ops mxc_imx95_gasket_ops = {
> > +	.enable = mxc_imx95_gasket_enable,
> > +	.disable = mxc_imx95_gasket_disable,
> > +};

-- 
Regards,

Laurent Pinchart