From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4FEE5325710; Wed, 29 Oct 2025 14:47:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761749233; cv=none; b=NkneH+WPMZnPIKXzG9A9sXdO99vChIEDD2jE5oHo9exTDELWvZJwIuBS3Bloc9ZlDIZjOzVvZMwrGupzlAJPVJ5VZw8R3XlAihu1YkzjIywZ4hNaX9RC5QhXOLrgUi7PILxqm0VOfJL/xXwcAOyPebZYeX7IWByyKmbr3aJNw0s= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761749233; c=relaxed/simple; bh=SJYleUZaoyn5JK4o33oSWeOEvviFeuT9HgdwPb4wSrE=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=NQuqwBI7Ytr2eZLyoHIlo/Z74j2X495KsHMAx4C/AGtyRQMTOn+y5tPJxFMiW3gyRsPhonsq02YqG0+dZT4NDBHY8nZlZWVZIHz40BaBX56J7M+qAur/dHHg13/AEfWtYJTLEGg4Vzwenqe1K0uyyezAQhtOYkgjT1siPBrpVeI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=e94+/JS3; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="e94+/JS3" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id B30021A1745; Wed, 29 Oct 2025 14:47:09 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 848DD606E8; Wed, 29 Oct 2025 14:47:09 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 817CA102F24F9; Wed, 29 Oct 2025 15:47:02 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1761749228; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding; bh=lhxyx3v6DA24a57QwH/fHNlyw7nDkFupsKGcsioXRTY=; b=e94+/JS3+oQoYVE4PqzSqK/Wh07gs4jkbQwVJXJHXrm+8vfcCxDlMiqv1/UN0gSeab1NHt 37p3lLDyFvqP6KnxZGz2EKFNbBlW+ym+T5ptJ3EGa1NZqVe2RMEAZdNiO9r5RBIIdhjtuY PBq6IuMOUmhvk9JAsTODUTgNEy/3PuFlL8zNFvQbdgfnCZwUcx9cqP8pdlkKW5vKv8zKkp ZWcRjgc0AhmRCw7L5p4NhRsfm0r+P2M12I5kJllOA12usJ3M/zdkjHgYbjSjxCJTsQ9Wg2 M/c9kiLj64s014GyNTsYEWI3Sp/jezYcyYhbg536cpwUtkHCC1GSdWY31JwE6Q== From: "Herve Codina (Schneider Electric)" To: Wolfram Sang , Herve Codina , Jonathan Cameron , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Liam Girdwood , Mark Brown Cc: linux-iio@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Pascal Eberhard , Miquel Raynal , Thomas Petazzoni Subject: [PATCH v2 0/4] Add support for the Renesas RZ/N1 ADC Date: Wed, 29 Oct 2025 15:46:40 +0100 Message-ID: <20251029144644.667561-1-herve.codina@bootlin.com> X-Mailer: git-send-email 2.51.0 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Last-TLS-Session-Version: TLSv1.3 Hi, The Renesas RZ/N1 ADC controller is the ADC controller available in the Renesas RZ/N1 SoCs family. It can use up to two internal ADC cores (ADC1 and ADC2) those internal cores are handled through ADC controller virtual channels. Best regards, Herve Codina Changes v1 -> v2: v1: https://lore.kernel.org/lkml/20251015142816.1274605-1-herve.codina@bootlin.com/ Rebase on top of v6.18-rc3 to have commit db82b8dbf5f0 ("PM: runtime: Fix conditional guard definitions") Patch 1: - Remove unneeded 'dependencies' part. - Rename "adc-clk" clock to "adc". - Move 'additionalProperties: false' just before the example. - Use const instead of enum for the "renesas,r9a06g032-adc" compatible string. - Fix the ACD typo. Patch 2: - Fix the ACD typo. - Rename "adc-clk" clock to "adc". - Update included headers and sort them. - Align register definitions at the same column. - Inline the FIELD_GET() instead of having macros. - Introduce RZN1_ADC_NO_CHANNEL - Get Vref voltage value at probe(). - Remove the bitmap in rzn1_adc_set_iio_dev_channels(). - Use dev_err_probe() in rzn1_adc_set_iio_dev_channels(). - Use auto-cleanup variant for PM runtime "resume and get". - Use scoped_guard() for mutex. - Use devm_mutex_init(). - Use the fixed "rzn1-adc" string for indio_dev->name. - Use DEFINE_RUNTIME_DEV_PM_OPS(). - Fix rzn1_adc_of_match table and remove of_match_ptr(). - Add a comment related to decoupling between IIO chans and ADC1 or ADC2 core chans - Update and add several comments related to ADC core usage and the relationship with ADC core regulator presence. - Remove clocks and regulators handling from PM runtime suspend()/remove(). - Simplify the driver removing the no more relevant struct rzn1_adc_core. Patch 3: - Rename "adc-clk" clock to "adc". - Add 'Reviewed-by: Wolfram Sang' Patch 4 - Removed the linux-iio list Herve Codina (Schneider Electric) (4): dt-bindings: iio: adc: Add the Renesas RZ/N1 ADC iio: adc: Add support for the Renesas RZ/N1 ADC ARM: dts: renesas: r9a06g032: Add the ADC device MAINTAINERS: Add the Renesas RZ/N1 ADC driver entry .../bindings/iio/adc/renesas,rzn1-adc.yaml | 111 ++++ MAINTAINERS | 7 + arch/arm/boot/dts/renesas/r9a06g032.dtsi | 10 + drivers/iio/adc/Kconfig | 10 + drivers/iio/adc/Makefile | 1 + drivers/iio/adc/rzn1-adc.c | 493 ++++++++++++++++++ 6 files changed, 632 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/renesas,rzn1-adc.yaml create mode 100644 drivers/iio/adc/rzn1-adc.c -- 2.51.0