[PATCH V1 2/3] ALSA: hda: add bus callback for address translation

[joakim.zhang@cixtech.com]

From: Joakim Zhang <joakim.zhang@cixtech.com>

This patch adds bus callback for address translation, for some
SoCs such as CIX SKY1 which is ARM64, HOST and HDAC has different
memory view, so need to do address translation between HOST and HDAC.

Signed-off-by: Joakim Zhang <joakim.zhang@cixtech.com>
---
 include/sound/hdaudio.h     |  3 +++
 sound/hda/core/controller.c | 25 +++++++++++++++++++------
 sound/hda/core/stream.c     | 17 ++++++++++++++---
 3 files changed, 36 insertions(+), 9 deletions(-)

diff --git a/include/sound/hdaudio.h b/include/sound/hdaudio.h
index 4e0c1d8af09f..61b41a014f4a 100644
--- a/include/sound/hdaudio.h
+++ b/include/sound/hdaudio.h
@@ -293,6 +293,9 @@ struct hdac_bus {
 	const struct hdac_bus_ops *ops;
 	const struct hdac_ext_bus_ops *ext_ops;
 
+	/* address translation from host to hdac */
+	dma_addr_t (*addr_host_to_hdac)(struct hdac_bus *bus, dma_addr_t addr);
+
 	/* h/w resources */
 	unsigned long addr;
 	void __iomem *remap_addr;
diff --git a/sound/hda/core/controller.c b/sound/hda/core/controller.c
index a7c00ad80117..070f05a7eafa 100644
--- a/sound/hda/core/controller.c
+++ b/sound/hda/core/controller.c
@@ -42,14 +42,19 @@ static void azx_clear_corbrp(struct hdac_bus *bus)
  */
 void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus)
 {
+	dma_addr_t corb_addr, rirb_addr;
+
 	WARN_ON_ONCE(!bus->rb.area);
 
 	guard(spinlock_irq)(&bus->reg_lock);
 	/* CORB set up */
 	bus->corb.addr = bus->rb.addr;
 	bus->corb.buf = (__le32 *)bus->rb.area;
-	snd_hdac_chip_writel(bus, CORBLBASE, (u32)bus->corb.addr);
-	snd_hdac_chip_writel(bus, CORBUBASE, upper_32_bits(bus->corb.addr));
+	corb_addr = bus->corb.addr;
+	if (bus->addr_host_to_hdac)
+		corb_addr = bus->addr_host_to_hdac(bus, bus->corb.addr);
+	snd_hdac_chip_writel(bus, CORBLBASE, (u32)corb_addr);
+	snd_hdac_chip_writel(bus, CORBUBASE, upper_32_bits(corb_addr));
 
 	/* set the corb size to 256 entries (ULI requires explicitly) */
 	snd_hdac_chip_writeb(bus, CORBSIZE, 0x02);
@@ -70,8 +75,11 @@ void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus)
 	bus->rirb.buf = (__le32 *)(bus->rb.area + 2048);
 	bus->rirb.wp = bus->rirb.rp = 0;
 	memset(bus->rirb.cmds, 0, sizeof(bus->rirb.cmds));
-	snd_hdac_chip_writel(bus, RIRBLBASE, (u32)bus->rirb.addr);
-	snd_hdac_chip_writel(bus, RIRBUBASE, upper_32_bits(bus->rirb.addr));
+	rirb_addr = bus->rirb.addr;
+	if (bus->addr_host_to_hdac)
+		rirb_addr = bus->addr_host_to_hdac(bus, bus->rirb.addr);
+	snd_hdac_chip_writel(bus, RIRBLBASE, (u32)rirb_addr);
+	snd_hdac_chip_writel(bus, RIRBUBASE, upper_32_bits(rirb_addr));
 
 	/* set the rirb size to 256 entries (ULI requires explicitly) */
 	snd_hdac_chip_writeb(bus, RIRBSIZE, 0x02);
@@ -608,6 +616,8 @@ static void azx_int_clear(struct hdac_bus *bus)
  */
 bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset)
 {
+	dma_addr_t posbuf_addr;
+
 	if (bus->chip_init)
 		return false;
 
@@ -625,8 +635,11 @@ bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset)
 
 	/* program the position buffer */
 	if (bus->use_posbuf && bus->posbuf.addr) {
-		snd_hdac_chip_writel(bus, DPLBASE, (u32)bus->posbuf.addr);
-		snd_hdac_chip_writel(bus, DPUBASE, upper_32_bits(bus->posbuf.addr));
+		posbuf_addr = bus->posbuf.addr;
+		if (bus->addr_host_to_hdac)
+			posbuf_addr = bus->addr_host_to_hdac(bus, bus->posbuf.addr);
+		snd_hdac_chip_writel(bus, DPLBASE, (u32)posbuf_addr);
+		snd_hdac_chip_writel(bus, DPUBASE, upper_32_bits(posbuf_addr));
 	}
 
 	bus->chip_init = true;
diff --git a/sound/hda/core/stream.c b/sound/hda/core/stream.c
index 579ec544ef4a..0bf181f83b6e 100644
--- a/sound/hda/core/stream.c
+++ b/sound/hda/core/stream.c
@@ -258,6 +258,7 @@ int snd_hdac_stream_setup(struct hdac_stream *azx_dev, bool code_loading)
 {
 	struct hdac_bus *bus = azx_dev->bus;
 	struct snd_pcm_runtime *runtime;
+	dma_addr_t bdl_addr, posbuf_addr;
 	unsigned int val;
 	u16 reg;
 	int ret;
@@ -287,17 +288,24 @@ int snd_hdac_stream_setup(struct hdac_stream *azx_dev, bool code_loading)
 	snd_hdac_stream_writew(azx_dev, SD_LVI, azx_dev->frags - 1);
 
 	/* program the BDL address */
+	bdl_addr = azx_dev->bdl.addr;
+	if (bus->addr_host_to_hdac)
+		bdl_addr = bus->addr_host_to_hdac(bus, azx_dev->bdl.addr);
 	/* lower BDL address */
-	snd_hdac_stream_writel(azx_dev, SD_BDLPL, (u32)azx_dev->bdl.addr);
+	snd_hdac_stream_writel(azx_dev, SD_BDLPL, (u32)bdl_addr);
 	/* upper BDL address */
 	snd_hdac_stream_writel(azx_dev, SD_BDLPU,
-			       upper_32_bits(azx_dev->bdl.addr));
+			       upper_32_bits(bdl_addr));
 
 	/* enable the position buffer */
 	if (bus->use_posbuf && bus->posbuf.addr) {
+		posbuf_addr = bus->posbuf.addr;
+		if (bus->addr_host_to_hdac)
+			posbuf_addr = bus->addr_host_to_hdac(bus, bus->posbuf.addr);
+
 		if (!(snd_hdac_chip_readl(bus, DPLBASE) & AZX_DPLBASE_ENABLE))
 			snd_hdac_chip_writel(bus, DPLBASE,
-				(u32)bus->posbuf.addr | AZX_DPLBASE_ENABLE);
+				(u32)posbuf_addr | AZX_DPLBASE_ENABLE);
 	}
 
 	/* set the interrupt enable bits in the descriptor control register */
@@ -463,6 +471,9 @@ static int setup_bdle(struct hdac_bus *bus,
 			return -EINVAL;
 
 		addr = snd_sgbuf_get_addr(dmab, ofs);
+		if (bus->addr_host_to_hdac)
+			addr = bus->addr_host_to_hdac(bus, addr);
+
 		/* program the address field of the BDL entry */
 		bdl[0] = cpu_to_le32((u32)addr);
 		bdl[1] = cpu_to_le32(upper_32_bits(addr));
-- 
2.49.0