From: Anup Patel <apatel@ventanamicro.com>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Greg KH <gregkh@linuxfoundation.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Ian Rogers <irogers@google.com>
Cc: Alexandre Ghiti <alex@ghiti.fr>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Namhyung Kim <namhyung@kernel.org>,
Mark Rutland <mark.rutland@arm.com>, Jiri Olsa <jolsa@kernel.org>,
Adrian Hunter <adrian.hunter@intel.com>,
Liang Kan <kan.liang@linux.intel.com>,
Mayuresh Chitale <mchitale@gmail.com>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atish.patra@linux.dev>,
Andrew Jones <ajones@ventanamicro.com>,
Sunil V L <sunilvl@ventanamicro.com>,
linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Anup Patel <apatel@ventanamicro.com>
Subject: [PATCH v2 08/12] riscv: Enable DMA_RESTRICTED_POOL in defconfig
Date: Sat, 1 Nov 2025 21:12:41 +0530 [thread overview]
Message-ID: <20251101154245.162492-9-apatel@ventanamicro.com> (raw)
In-Reply-To: <20251101154245.162492-1-apatel@ventanamicro.com>
The RISC-V ramsink trace component may have implementation specific
restrictions such that the component can only write trace data in
particular parts of DRAM.
Enable DMA_RESTRICTED_POOL in the defconfig so that dma_alloc_*()
and dma_free_*() APIs work for devices with DMA address restrictions.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
arch/riscv/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index d2c1ea2a866c..4e870b8f2220 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -305,6 +305,7 @@ CONFIG_SECURITY_APPARMOR=y
CONFIG_DEFAULT_SECURITY_DAC=y
CONFIG_CRYPTO_USER_API_HASH=y
CONFIG_CRYPTO_DEV_VIRTIO=y
+CONFIG_DMA_RESTRICTED_POOL=y
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_FS=y
--
2.43.0
next prev parent reply other threads:[~2025-11-01 15:44 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-01 15:42 [PATCH v2 00/12] Linux RISC-V trace framework and drivers Anup Patel
2025-11-01 15:42 ` [PATCH v2 01/12] dt-bindings: Add RISC-V trace component bindings Anup Patel
2025-11-20 16:39 ` Rob Herring
2026-01-02 3:38 ` Anup Patel
2025-11-01 15:42 ` [PATCH v2 02/12] rvtrace: Initial implementation of driver framework Anup Patel
2025-11-21 7:49 ` Nutty.Liu
2025-12-02 10:41 ` Bo Gan
2025-11-01 15:42 ` [PATCH v2 03/12] rvtrace: Add functions to create/destroy a trace component path Anup Patel
2025-11-01 15:42 ` [PATCH v2 04/12] rvtrace: Add functions to start/stop tracing on a " Anup Patel
2025-11-01 15:42 ` [PATCH v2 05/12] rvtrace: Add trace encoder driver Anup Patel
2025-11-01 15:42 ` [PATCH v2 06/12] rvtrace: Add function to copy into perf AUX buffer Anup Patel
2025-11-01 15:42 ` [PATCH v2 07/12] rvtrace: Add trace ramsink driver Anup Patel
2025-11-30 7:45 ` Bo Gan
2025-12-02 11:47 ` Mayuresh Chitale
2025-12-03 1:10 ` Bo Gan
2025-12-06 17:59 ` Mayuresh Chitale
2025-11-01 15:42 ` Anup Patel [this message]
2025-11-01 15:42 ` [PATCH v2 09/12] rvtrace: Add perf driver for tracing using perf tool Anup Patel
2025-11-01 15:42 ` [PATCH v2 10/12] perf tools: Add RISC-V trace PMU record capabilities Anup Patel
2025-11-21 8:09 ` Nutty.Liu
2026-01-02 3:52 ` Anup Patel
2025-11-01 15:42 ` [PATCH v2 11/12] perf tools: Initial support for RISC-V trace decoder Anup Patel
2025-11-01 15:42 ` [PATCH v2 12/12] MAINTAINERS: Add entry for RISC-V trace framework and drivers Anup Patel
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