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From: Conor Dooley <conor.dooley@microchip.com>
To: Prajna Rajendra Kumar <prajna.rajendrakumar@microchip.com>
Cc: Mark Brown <broonie@kernel.org>, Rob Herring <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	<linux-riscv@lists.infradead.org>, <linux-spi@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
	Daire McNamara <daire.mcnamara@microchip.com>,
	Valentina Fernandez Alanis
	<valentina.fernandezalanis@microchip.com>,
	"Cyril Jean" <cyril.jean@microchip.com>
Subject: Re: [PATCH v1 1/3] spi: microchip: rename driver file and internal identifiers
Date: Tue, 4 Nov 2025 08:46:23 +0000	[thread overview]
Message-ID: <20251104-paralyze-creature-d2ab0ce2566a@wendy> (raw)
In-Reply-To: <20251103160515.412706-2-prajna.rajendrakumar@microchip.com>

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On Mon, Nov 03, 2025 at 04:05:13PM +0000, Prajna Rajendra Kumar wrote:
> The spi-microchip-core.c driver provides support for the Microchip
> PolarFire SoC (MPFS) "hard" SPI controller. It was originally named
> "core" with the expectation that it might also cover Microchip's
> CoreSPI "soft" IP, but that never materialized.
> 
> The CoreSPI IP cannot be supported by this driver because its register
> layout differs substantially from the MPFS SPI controller. In practice
> most of the code would need to be replaced to handle those differences
> so keeping the drivers separate is the simpler approach.
> 
> The file and internal symbols are renamed to reflect MPFS support and
> to free up "spi-microchip-core.c" for CoreSPI driver.
> 
> Fixes: 9ac8d17694b6 ("spi: add support for microchip fpga spi controllers")
> Signed-off-by: Prajna Rajendra Kumar <prajna.rajendrakumar@microchip.com>

Renaming the driver from spi-mpfs to spi-microchip-core was my mistake,
based on the knowledge that the coreSPI IP is what had been hardened and
use in the mpfs device. I didn't expect that the register layout had
been changed so dramatically between the two, when all other "hardened" IP
just added extra bits in registers or whole new registers.

Acked-by: Conor Dooley <conor.dooley@microchip.com>

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  reply	other threads:[~2025-11-04  8:48 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-03 16:05 [PATCH v1 0/3] Add support for Microchip CoreSPI Controller Prajna Rajendra Kumar
2025-11-03 16:05 ` [PATCH v1 1/3] spi: microchip: rename driver file and internal identifiers Prajna Rajendra Kumar
2025-11-04  8:46   ` Conor Dooley [this message]
2025-11-04 15:29   ` kernel test robot
2025-11-03 16:05 ` [PATCH v1 2/3] spi: dt-binding: document Microchip CoreSPI Prajna Rajendra Kumar
2025-11-04  8:48   ` Conor Dooley
2025-11-04  9:23   ` Krzysztof Kozlowski
2025-11-03 16:05 ` [PATCH v1 3/3] spi: add support for microchip "soft" spi controller Prajna Rajendra Kumar
2025-11-04  8:19   ` kernel test robot
2025-11-04  8:19   ` kernel test robot
2025-11-04  8:59   ` Conor Dooley

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