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Wed, 5 Nov 2025 09:46:46 -0600 From: Bryan Brattlof Subject: [PATCH v8 0/3] arm64: dts: ti: introduce basic support for the AM62L Date: Wed, 5 Nov 2025 09:46:41 -0600 Message-ID: <20251105-am62lx-v8-0-496f353e8237@ti.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit X-B4-Tracking: v=1; b=H4sIAGFxC2kC/1XPwWrDMAyA4VcJPjfDVixL3mnvMXZwbGU1rM1IS ugoefc5hSTNUULfD3qoUYYso3qvHmqQKY+5v5aBT5WK53D9ljqnMivQYA2ArsPFwc+9jsFbz9I lJlHl+HeQLt+foc+vMp/zeOuHv2d3gmW7JFAbzWtiglrXyAYYQ0OJu49bfov9RS1+al6N30xTj HSGjBB7BDoYuxuraTO2mCieyPrWS5CDwd3gi8FibIskgYnFwcG43XhjNuOKadAzIEdrWlzNqVp v4XALPmFw0Wk0xz5tfaObvU/LH60F14pPTvY/5nn+B2r5pi3JAQAA X-Change-ID: 20241220-am62lx-ca9498efd87e To: Nishanth Menon , Vignesh Raghavendra , "Andrew Davis" , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , "Tony Lindgren" CC: , , , Sascha Hauer , , Bryan Brattlof , Dhruva Gole , Krzysztof Kozlowski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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X-OriginatorOrg: ti.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Nov 2025 15:46:52.3449 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: efa8f244-1776-4539-566a-08de1c828a41 X-MS-Exchange-CrossTenant-Id: e5b49634-450b-4709-8abb-1e2b19b982b7 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5b49634-450b-4709-8abb-1e2b19b982b7;Ip=[198.47.21.195];Helo=[flwvzet201.ext.ti.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EDD6.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA2PR10MB4427 Hello Everyone, This small series adds the initial support (currently just a UART) for TI's AM62L SoC family. The AM62L is a lite, low power and performance optimized family of application processors that are built for Linux application development. AM62L is well suited for a wide range of general-purpose applications with scalable ARM Cortex-A53 core performance and embedded features such as: Multimedia DSI/DPI support, integrated ADC on chip, advanced lower power management modes, and extensive security options for IP protection with the built-in security features. Additionally, the AM62Lx devices includes an extensive set of peripherals that make it a well-suited for a broad range of industrial applications while offering intelligent features and optimized power architecture as well. In addition, the extensive set of peripherals included in AM62Lx enables system-level connectivity, such as: USB, MMC/SD, OSPI, CAN-FD and an ADC. AM62L is a general purpose processor, however some of the applications well suited for it include: Human Machine Interfaces (HMI), Medical patient monitoring , Building automation, Smart secure gateways, Smart Thermostats, EV charging stations, Smart Metering, Solar energy and more. Some highlights of AM62L SoC are: - Single to Dual 64-bit Arm® Cortex®-A53 microprocessor subsystem up to 1.25GHz Integrated Giga-bit Ethernet switch supporting up to a total of two external - 16-bit DDR Subsystem that supports LPDDR4, DDR4 memory types. - Display support: 1x display support over MIPI DSI (4 lanes DPHY) or DPI (24-bit RGB LVCMOS) - Multiple low power modes support, ex: Deep sleep and Standby - Support for secure boot, Trusted Execution Environment (TEE) & Cryptographic Acceleration For more information check out our Technical Reference Manual (TRM) which is located here: https://www.ti.com/lit/pdf/sprujb4 Happy Hacking ~Bryan Changes from v1: - switched to non-direct links so TRM updates are automatic - fixed indentation issues with a few nodes - separated bindings into a different patch - removed current-speed property from main_uart0{} - removed empty reserved-memory{} node - removed serial2 from aliases{} node - corrected the main_uart0{} pinmux - Link: https://lore.kernel.org/all/20241117-am62lx-v1-0-4e71e42d781d@ti.com/ Changes from v2: - alphabetized phandles - corrected macro and node names for main_uart0 pinmux - Link to v2: https://lore.kernel.org/r/20250108-am62lx-v2-0-581285a37d8f@ti.com Changes from v3: - added more nodes which have been validated - added link to data sheet which is now public - Link to v3: https://lore.kernel.org/r/20250109-am62lx-v3-0-ef171e789527@ti.com Changes from v4: - corrected copyright date - used the ranges property for the fss{} node - converted control MMR's space into a syscon{} node - Link to v4: https://lore.kernel.org/r/20250407-am62lx-v4-0-ce97749b9eae@ti.com Changes from v5: - added new compatible for the am62l pinmux driver - increased thermal trip point to 125C - reduced size of &conf its correct size of 0x380000 - replaced dss with display: s/dss@/display@/ - expanded chipid to include the JTAG_USER_ID information - removed nodes requiring parent clocks until sorted in firmware - expanded &wkup_conf length to properly contain the &usb_phy_ctrl - moved back to &wkup_conf as a simple bus and grouped both &usb*_phy_ctrl into one syscon node rather than individual nodes - Link to v5: https://lore.kernel.org/r/20250507-am62lx-v5-0-4b57ea878e62@ti.com Changes from v6: - moved thermal-zones{} into the k3-am62l3-evm.dts to allow other boards to select whichever thermal nodes trip points they wish. - removed dss{} for now until binding doc is updated. - Link to v6: https://lore.kernel.org/r/20250912-am62lx-v6-0-29d5a6c60512@ti.com Changes from v7: - enabled &i2c0 node in reference board file. - enabled &gpio0 and &gpio1 by default like with other AM62* SoCs - Link to v7: https://lore.kernel.org/r/20251031-am62lx-v7-0-cb426be9d6ee@ti.com --- Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Sascha Hauer Cc: linux-gpio@vger.kernel.org To: Nishanth Menon To: Vignesh Raghavendra To: Andrew Davis To: Tero Kristo To: Rob Herring To: Krzysztof Kozlowski To: Conor Dooley To: Linus Walleij To: Tony Lindgren Signed-off-by: Bryan Brattlof --- Bryan Brattlof (1): dt-bindings: arm: ti: Add binding for AM62L SoCs Vignesh Raghavendra (2): arm64: dts: ti: k3-am62l: add initial infrastructure arm64: dts: ti: k3-am62l: add initial reference board file Documentation/devicetree/bindings/arm/ti/k3.yaml | 6 + arch/arm64/boot/dts/ti/Makefile | 3 + arch/arm64/boot/dts/ti/k3-am62l-main.dtsi | 580 +++++++++++++++++++++++ arch/arm64/boot/dts/ti/k3-am62l-wakeup.dtsi | 141 ++++++ arch/arm64/boot/dts/ti/k3-am62l.dtsi | 118 +++++ arch/arm64/boot/dts/ti/k3-am62l3-evm.dts | 362 ++++++++++++++ arch/arm64/boot/dts/ti/k3-am62l3.dtsi | 67 +++ arch/arm64/boot/dts/ti/k3-pinctrl.h | 2 + 8 files changed, 1279 insertions(+) --- base-commit: da84d094ded6e332c88c67218faabfbf8d3d59e5 change-id: 20241220-am62lx-ca9498efd87e Best regards, -- Bryan Brattlof