From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail11.truemail.it (mail11.truemail.it [217.194.8.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BA08C30216F; Wed, 5 Nov 2025 11:55:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.194.8.81 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762343746; cv=none; b=FNDSCGmuWyHUD55mRZDUHTRGBcoyYLgip8hhk7Uktc6P5UcPry537Vso4VUWllp9NFTrX+LZ97gh2K1nfRB+dHh3k7qUodVb1ASta9t/x7iQhkb30ZQw7NFQu1KuBjWV++XrCvFTFat1ZfYTP/qrNbM+uW3PkuO4kpIOddwwu74= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762343746; c=relaxed/simple; bh=DvN0RKWA+eilY5co1nbi5PahhEXS/9e51XhcakcWZ1o=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=phZMlOu0VRD6H4kmesfsrJEpha1WS6/0SnkCrf9jCacWm4zEw7rHemgrQTXGYmvDd5HY04VpZydqK5ZvRSujdC5Ik9hxCeSemadP5iPTZjtXzvHlb5ddYkdWFvvq+J2izC92nB77nblxxIeuQhIydNS/4sRu0GQpoPL/J1/wNKo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=dolcini.it; spf=pass smtp.mailfrom=dolcini.it; dkim=pass (2048-bit key) header.d=dolcini.it header.i=@dolcini.it header.b=kNpqG3G4; arc=none smtp.client-ip=217.194.8.81 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=dolcini.it Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=dolcini.it Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=dolcini.it header.i=@dolcini.it header.b="kNpqG3G4" Received: from francesco-nb (93-49-2-63.ip317.fastwebnet.it [93.49.2.63]) by mail11.truemail.it (Postfix) with ESMTPA id 94AD01F842; Wed, 5 Nov 2025 12:55:42 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dolcini.it; s=default; t=1762343743; bh=5jbA9aezDlJiuk2X1xT0BLwTokZ2YLI3EDgl9yTbOXQ=; h=From:To:Subject; b=kNpqG3G4Hsyvb9z4ilOi6Dy803JvAxDoY+VekOn3c4RdY4SWM9QzdABbvQ7z/qVt8 cuLeVHLAvpOUNdF4eHpe+7auA0bG1W524fOCsCIb1zt8wXpakNWFzbyAO6qt4OldsJ 8WYWJHgZGe+kTafoVoElL46+3KoDT/a2bVqL2pC0iSxKIHU9dRQJdT+G2qGQM6jibd u2YMHAT0RqBeFasTjDKmcEnvH3TBGzFZG4peHu4eOxQHFn6MYnAnnceDkq5r35+za9 tH4wnP+es9awN8snj2ycAjQPur22vqIU0RBPJOhRhUbXV+tJVNMw5McPeHA+0tU3IC M+xqXL2e8vxrg== Date: Wed, 5 Nov 2025 12:55:38 +0100 From: Francesco Dolcini To: Frank Li Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 3/3] ARM: dts: imx: move nand related property under nand@0 Message-ID: <20251105115538.GA17091@francesco-nb> References: <20251104-gpmi_dts-v1-0-886865393d0f@nxp.com> <20251104-gpmi_dts-v1-3-886865393d0f@nxp.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20251104-gpmi_dts-v1-3-886865393d0f@nxp.com> Hello Frank, On Tue, Nov 04, 2025 at 05:27:14PM -0500, Frank Li wrote: > Add child node nand@0 and move NAND related property under it to align > modern nand-controller.yaml. > > Fix below CHECK_DTBS warnings: > arch/arm/boot/dts/nxp/imx/imx6ull-colibri-aster.dtb: nand-controller@1806000 (fsl,imx6q-gpmi-nand): Unevaluated properties are not allowed ('nand-ecc-mode', 'nand-ecc-step-size', 'nand-ecc-strength', 'nand-on-flash-bbt' were unexpected) > from schema $id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml# > > Since 2019 year, commit > (212e496935929 dt-bindings: mtd: Add YAML schemas for the generic NAND options) > NAND related property is preferred located under nand@ even though only > one NAND chip supported. > > Signed-off-by: Frank Li > --- > arch/arm/boot/dts/nxp/imx/imx6-logicpd-som.dtsi | 6 +++++- > arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi | 6 +++++- > arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi | 6 +++++- > arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi | 6 +++++- > arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi | 6 +++++- > arch/arm/boot/dts/nxp/imx/imx6qdl-tx6.dtsi | 6 +++++- > arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts | 6 +++++- > arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi | 6 +++++- > arch/arm/boot/dts/nxp/imx/imx6ul-phytec-phycore-som.dtsi | 6 +++++- > arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi | 6 +++++- > arch/arm/boot/dts/nxp/imx/imx6ull-colibri.dtsi | 12 ++++++++---- > arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea.dtsi | 12 ++++++++---- > arch/arm/boot/dts/nxp/imx/imx6ull-myir-mys-6ulx.dtsi | 6 +++++- > arch/arm/boot/dts/nxp/imx/imx6ulz-bsh-smm-m2.dts | 6 +++++- > arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi | 8 ++++++-- > 15 files changed, 82 insertions(+), 22 deletions(-) > Was any of these changes tested? Is the driver able to cope with the binding change? Francesco