* [PATCH v1 0/3] arm64: dts: ti: Add Aquila AM69 Support @ 2025-11-04 14:49 Francesco Dolcini 2025-11-04 14:52 ` [PATCH v1 1/3] dt-bindings: arm: ti: add Toradex Aquila AM69 Francesco Dolcini 0 siblings, 1 reply; 13+ messages in thread From: Francesco Dolcini @ 2025-11-04 14:49 UTC (permalink / raw) To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: Francesco Dolcini, linux-arm-kernel, devicetree, linux-kernel From: Francesco Dolcini <francesco.dolcini@toradex.com> This patch series adds support for the Toradex Aquila AM69 SoM and its currently available carrier boards: the Aquila Development Board and Clover. The Aquila AM69 SoM is based on the TI AM69 SoC from the Jacinto 7 family and is designed for high-end embedded computing. The SoM features up to 32GB of LPDDR4 RAM and 256GB eMMC storage, extensive multimedia support (3x Quad CSI, 2x Quad DSI, DisplayPort, 5x Audio I2S/TDM), six Ethernet interfaces (1x 1G, 4x 2.5G SGMII, 1x 10G), USB 3.2 Host and DRD support and a Wi-Fi 7/BT 5.3 module. Additionally, it includes an RX8130 RTC, I2C EEPROM and Temperature Sensor and an optional TPM 2.0. Link: https://www.toradex.com/computer-on-modules/aquila-arm-family/ti-am69 Link: https://www.toradex.com/products/carrier-board/aquila-development-board-kit Link: https://www.toradex.com/products/carrier-board/clover João Paulo Gonçalves (2): dt-bindings: arm: ti: add Toradex Aquila AM69 arm64: dts: ti: am69-aquila: Add Clover Parth Pancholi (1): arm64: dts: ti: Add Aquila AM69 Support .../devicetree/bindings/arm/ti/k3.yaml | 8 + arch/arm64/boot/dts/ti/Makefile | 2 + .../boot/dts/ti/k3-am69-aquila-clover.dts | 451 ++++ arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts | 576 ++++++ arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi | 1840 +++++++++++++++++ 5 files changed, 2877 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila-clover.dts create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi -- 2.47.3 ^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v1 1/3] dt-bindings: arm: ti: add Toradex Aquila AM69 2025-11-04 14:49 [PATCH v1 0/3] arm64: dts: ti: Add Aquila AM69 Support Francesco Dolcini @ 2025-11-04 14:52 ` Francesco Dolcini 2025-11-04 14:52 ` [PATCH v1 2/3] arm64: dts: ti: Add Aquila AM69 Support Francesco Dolcini ` (2 more replies) 0 siblings, 3 replies; 13+ messages in thread From: Francesco Dolcini @ 2025-11-04 14:52 UTC (permalink / raw) To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: João Paulo Gonçalves, linux-arm-kernel, devicetree, linux-kernel, Francesco Dolcini From: João Paulo Gonçalves <joao.goncalves@toradex.com> Add DT compatible strings for the Toradex Aquila AM69 SoM and its supported carrier boards: the Aquila Development Board and the Clover carrier board. Link: https://www.toradex.com/computer-on-modules/aquila-arm-family/ti-am69 Link: https://www.toradex.com/products/carrier-board/aquila-development-board-kit Link: https://www.toradex.com/products/carrier-board/clover Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> --- Documentation/devicetree/bindings/arm/ti/k3.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml index 2e15029dbc67..c6eb72462bef 100644 --- a/Documentation/devicetree/bindings/arm/ti/k3.yaml +++ b/Documentation/devicetree/bindings/arm/ti/k3.yaml @@ -158,6 +158,14 @@ properties: - ti,am654-evm - const: ti,am654 + - description: K3 AM69 SoC Toradex Aquila Modules and Carrier Boards + items: + - enum: + - toradex,aquila-am69-clover # Aquila AM69 Module on Clover Board + - toradex,aquila-am69-dev # Aquila AM69 Module on Aquila Development Board + - const: toradex,aquila-am69 # Aquila AM69 Module + - const: ti,j784s4 + - description: K3 J7200 SoC oneOf: - const: ti,j7200 -- 2.47.3 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v1 2/3] arm64: dts: ti: Add Aquila AM69 Support 2025-11-04 14:52 ` [PATCH v1 1/3] dt-bindings: arm: ti: add Toradex Aquila AM69 Francesco Dolcini @ 2025-11-04 14:52 ` Francesco Dolcini 2025-11-04 17:41 ` Andrew Davis 2025-11-04 14:52 ` [PATCH v1 3/3] arm64: dts: ti: am69-aquila: Add Clover Francesco Dolcini 2025-11-04 17:20 ` [PATCH v1 1/3] dt-bindings: arm: ti: add Toradex Aquila AM69 Conor Dooley 2 siblings, 1 reply; 13+ messages in thread From: Francesco Dolcini @ 2025-11-04 14:52 UTC (permalink / raw) To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: Parth Pancholi, linux-arm-kernel, devicetree, linux-kernel, Emanuele Ghidoli, Ernest Van Hoecke, João Paulo Gonçalves, Francesco Dolcini From: Parth Pancholi <parth.pancholi@toradex.com> Add support for the Toradex Aquila AM69 and its Development Carrier Board. The Aquila AM69 SoM is based on the TI AM69 SoC from the Jacinto 7 family and is designed for high-end embedded computing, featuring up to 32GB of LPDDR4 and 256GB eMMC storage, extensive multimedia support (3x Quad CSI, 2x Quad DSI, DisplayPort, 5x Audio I2S/TDM), six Ethernet interfaces (1x 1G, 4x 2.5G SGMII, 1x 10G), USB 3.2 Host/DRD support, and a Wi-Fi 7/BT 5.3 module, alongside an RX8130 RTC, I2C EEPROM and Temperature Sensor, and optional TPM 2.0 module. Link: https://www.toradex.com/computer-on-modules/aquila-arm-family/ti-am69 Link: https://www.toradex.com/products/carrier-board/aquila-development-board-kit Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com> Co-developed-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> Co-developed-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com> Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com> Co-developed-by: João Paulo Gonçalves <joao.goncalves@toradex.com> Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com> Co-developed-by: Francesco Dolcini <francesco.dolcini@toradex.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> --- arch/arm64/boot/dts/ti/Makefile | 1 + arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts | 576 ++++++ arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi | 1840 +++++++++++++++++ 3 files changed, 2417 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 361248dcfff4..6ce652fe98fa 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -153,6 +153,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo # Boards with J784s4 SoC +dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dev.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-sk-pcie0-ep.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts b/arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts new file mode 100644 index 000000000000..c7ce804eac70 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts @@ -0,0 +1,576 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (C) 2025 Toradex + * + * https://www.toradex.com/computer-on-modules/aquila-arm-family/ti-am69 + * https://www.toradex.com/products/carrier-board/aquila-development-board-kit + */ + +/dts-v1/; + +#include <dt-bindings/pwm/pwm.h> +#include "k3-am69-aquila.dtsi" + +/ { + model = "Toradex Aquila AM69 on Aquila Development Board"; + compatible = "toradex,aquila-am69-dev", + "toradex,aquila-am69", + "ti,j784s4"; + + aliases { + eeprom1 = &carrier_eeprom; + }; + + reg_1v8_sw: regulator-1v8-sw { + compatible = "regulator-fixed"; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-name = "Carrier_1V8"; + }; + + reg_3v3_dp: regulator-3v3-dp { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_21_dp>; + /* Aquila GPIO_21_DP (AQUILA B57) */ + gpio = <&main_gpio0 37 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "DP_3V3"; + startup-delay-us = <10000>; + }; + + dp0-connector { + compatible = "dp-connector"; + dp-pwr-supply = <®_3v3_dp>; + label = "Display Port"; + type = "full-size"; + + port { + dp0_connector_in: endpoint { + remote-endpoint = <&dp0_out>; + }; + }; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,bitclock-master = <&codec_dai>; + simple-audio-card,format = "i2s"; + simple-audio-card,frame-master = <&codec_dai>; + simple-audio-card,name = "aquila-wm8904"; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,routing = + "Headphone Jack", "HPOUTL", + "Headphone Jack", "HPOUTR", + "IN2L", "Line In Jack", + "IN2R", "Line In Jack", + "Microphone Jack", "MICBIAS", + "IN1L", "Microphone Jack", + "IN1R", "Digital Mic"; + simple-audio-card,widgets = + "Microphone", "Microphone Jack", + "Microphone", "Digital Mic", + "Headphone", "Headphone Jack", + "Line", "Line In Jack"; + + codec_dai: simple-audio-card,codec { + sound-dai = <&wm8904_1a>; + }; + + simple-audio-card,cpu { + sound-dai = <&mcasp4>; + }; + }; +}; + +/* Aquila CTRL_PWR_BTN_MICO# */ +&aquila_key_power { + status = "okay"; +}; + +/* Aquila CTRL_WAKE1_MICO# */ +&aquila_key_wake { + status = "okay"; +}; + +/* On-module ETH_1 MDIO */ +&davinci_mdio { + status = "okay"; +}; + +&dp0_ports { + port@4 { + reg = <4>; + dp0_out: endpoint { + remote-endpoint = <&dp0_connector_in>; + }; + }; +}; + +&dss { + status = "okay"; +}; + +&main0_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&main0_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&main0_alert1>; + }; + }; +}; + +&main1_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&main1_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&main1_alert1>; + }; + }; +}; + +&main2_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&main2_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&main2_alert1>; + }; + }; +}; + +&main3_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&main3_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&main3_alert1>; + }; + }; +}; + +&main4_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&main4_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&main4_alert1>; + }; + }; +}; + +/* Aquila ETH_2 */ +&main_cpsw0 { + status = "okay"; +}; + +/* Aquila ETH_2 SGMII PHY */ +&main_cpsw0_port8 { + phy-handle = <&cpsw0_port8_phy4>; + status = "okay"; +}; + +/* Aquila ETH_2_XGMII_MDIO */ +&main_cpsw0_mdio { + status = "okay"; + + cpsw0_port8_phy4: ethernet-phy@4 { + reg = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_eth2_int>; + interrupt-parent = <&main_gpio0>; + interrupts = <44 IRQ_TYPE_EDGE_FALLING>; + }; +}; + +/* Aquila PWM_1 */ +&main_ehrpwm0 { + status = "okay"; +}; + +/* Aquila PWM_4_DP */ +&main_ehrpwm2 { + status = "okay"; +}; + +/* Aquila PWM_2 */ +&main_ehrpwm1 { + status = "okay"; +}; + +/* Aquila PWM_3_DSI */ +&main_ehrpwm5 { + status = "okay"; +}; + +&main_gpio0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_01>, /* Aquila GPIO_01 */ + <&pinctrl_gpio_02>, /* Aquila GPIO_02 */ + <&pinctrl_gpio_03>; /* Aquila GPIO_03 */ +}; + +/* Aquila I2C_3_DSI1 */ +&main_i2c0 { + status = "okay"; + + i2c-mux@70 { + compatible = "nxp,pca9543"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + /* I2C on DSI Connector Pin #4 and #6 */ + i2c_dsi_0: i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + /* I2C on DSI Connector Pin #52 and #54 */ + i2c_dsi_1: i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; + +/* Aquila I2C_4_CSI1 */ +&main_i2c1 { + status = "okay"; +}; + +/* Aquila I2C_5_CSI2 */ +&main_i2c2 { + status = "okay"; +}; + +/* Aquila I2C_6 */ +&main_i2c5 { + status = "okay"; +}; + +/* Aquila CAN_1 */ +&main_mcan10 { + status = "okay"; +}; + +/* Aquila CAN_3 */ +&main_mcan13 { + status = "okay"; +}; + +/* Aquila SD_1 */ +&main_sdhci1 { + status = "okay"; +}; + +/* Aquila SPI_2 */ +&main_spi0 { + status = "okay"; +}; + +/* Aquila SPI_1 */ +&main_spi2 { + status = "okay"; +}; + +/* Aquila UART_1 */ +&main_uart4 { + status = "okay"; +}; + +/* Aquila UART_3, used as the Linux console */ +&main_uart8 { + status = "okay"; +}; + +/* Aquila I2S_1 */ +&mcasp4 { + status = "okay"; +}; + +&mcu_cpsw { + status = "okay"; +}; + +/* On-module ETH_1 RGMII */ +&mcu_cpsw_port1 { + status = "okay"; +}; + +/* Aquila I2C_1 */ +&mcu_i2c0 { + clock-frequency = <100000>; + status = "okay"; + + fan_controller: fan@18 { + compatible = "ti,amc6821"; + reg = <0x18>; + #pwm-cells = <2>; + + fan: fan { + cooling-levels = <102 179 255>; + #cooling-cells = <2>; + pwms = <&fan_controller 40000 PWM_POLARITY_INVERTED>; + }; + }; + + wm8904_1a: audio-codec@1a { + compatible = "wlf,wm8904"; + reg = <0x1a>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audio_extrefclk1>; + #sound-dai-cells = <0>; + clocks = <&audio_refclk1>; + clock-names = "mclk"; + AVDD-supply = <®_1v8_sw>; + CPVDD-supply = <®_1v8_sw>; + DBVDD-supply = <®_1v8_sw>; + DCVDD-supply = <®_1v8_sw>; + MICVDD-supply = <®_1v8_sw>; + + wlf,drc-cfg-names = "default", "peaklimiter"; + /* + * Config registers per name, respectively: + * KNEE_IP = 0, KNEE_OP = 0, HI_COMP = 1, LO_COMP = 1 + * KNEE_IP = -24, KNEE_OP = -6, HI_COMP = 1/4, LO_COMP = 1 + */ + wlf,drc-cfg-regs = /bits/ 16 <0x01af 0x3248 0x0000 0x0000>, + /bits/ 16 <0x04af 0x324b 0x0010 0x0408>; + + /* GPIO1 = DMIC_CLK, don't touch others */ + wlf,gpio-cfg = <0x0018>, <0xffff>, <0xffff>, <0xffff>; + + wlf,in1r-as-dmicdat2; + }; + + /* Current measurement into module VCC */ + hwmon@41 { + compatible = "ti,ina226"; + reg = <0x41>; + shunt-resistor = <5000>; + }; + + temperature-sensor@4f { + compatible = "ti,tmp1075"; + reg = <0x4f>; + }; + + /* USB-C OTG (TCPC USB PD PHY) */ + tcpc@52 { + compatible = "nxp,ptn5110", "tcpci"; + reg = <0x52>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb1_int>; + interrupt-parent = <&main_gpio0>; + interrupts = <28 IRQ_TYPE_EDGE_FALLING>; + + connector { + compatible = "usb-c-connector"; + data-role = "dual"; + label = "USB-C OTG"; + power-role = "dual"; + try-power-role = "sink"; + self-powered; + source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; + sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; + op-sink-microwatt = <1000000>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usb_1_con_hs: endpoint { + remote-endpoint = <&usb0_hs>; + }; + }; + + port@1 { + reg = <1>; + + usb_1_con_ss: endpoint { + remote-endpoint = <&usb0_ss_mux>; + }; + }; + }; + }; + }; + + carrier_eeprom: eeprom@57 { + compatible = "st,24c02", "atmel,24c02"; + reg = <0x57>; + pagesize = <16>; + }; +}; + +/* Aquila I2C_2 */ +&mcu_i2c1 { + status = "okay"; +}; + +/* Aquila CAN_2 */ +&mcu_mcan0 { + status = "okay"; +}; + +/* Aquila CAN_4 */ +&mcu_mcan1 { + status = "okay"; +}; + +/* Aquila UART_4 */ +&mcu_uart0 { + status = "okay"; +}; + +&mhdp { + status = "okay"; +}; + +/* Aquila QSPI_1 */ +&ospi0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcu_ospi0_4bit>, <&pinctrl_mcu_ospi0_cs0>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-max-frequency = <66000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + cdns,read-delay = <0>; + cdns,tchsh-ns = <3>; + cdns,tsd2d-ns = <10>; + cdns,tshsl-ns = <30>; + cdns,tslch-ns = <8>; + }; +}; + +/* Aquila PCIE_1 */ +&pcie0_rc { + status = "okay"; +}; + +/* Aquila PCIE_2 */ +&pcie1_rc { + status = "okay"; +}; + +&serdes2 { + status = "okay"; +}; + +&serdes4 { + status = "okay"; +}; + +&serdes_wiz2 { + status = "okay"; +}; + +&serdes_wiz4 { + status = "okay"; +}; + +/* Aquila ADC_[1-4] */ +&tscadc0 { + status = "okay"; +}; + +&usbss0 { + status = "okay"; +}; + +&usb0ss_mux { + status = "okay"; + + port { + usb0_ss_mux: endpoint { + remote-endpoint = <&usb_1_con_ss>; + }; + }; +}; + +&usb0 { + status = "okay"; + + port { + usb0_hs: endpoint { + remote-endpoint = <&usb_1_con_hs>; + }; + }; +}; + +&wkup0_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&wkup0_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&wkup0_alert1>; + }; + }; +}; + +&wkup1_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&wkup1_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&wkup1_alert1>; + }; + }; +}; + +&wkup_gpio0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_04>, /* Aquila GPIO_04 */ + <&pinctrl_gpio_05>, /* Aquila GPIO_05 */ + <&pinctrl_gpio_06>, /* Aquila GPIO_06 */ + <&pinctrl_gpio_07>, /* Aquila GPIO_07 */ + <&pinctrl_gpio_08>; /* Aquila GPIO_08 */ +}; + +/* Aquila UART_2, through RS485 transceiver */ +&wkup_uart0 { + linux,rs485-enabled-at-boot-time; + rs485-rx-during-tx; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi b/arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi new file mode 100644 index 000000000000..0866eb8a6f34 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi @@ -0,0 +1,1840 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (C) 2025 Toradex + * + * https://www.toradex.com/computer-on-modules/aquila-arm-family/ti-am69 + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/net/ti-dp83867.h> +#include <dt-bindings/phy/phy-cadence.h> +#include <dt-bindings/usb/pd.h> +#include "k3-j784s4.dtsi" + +/ { + chosen { + stdout-path = "serial2:115200n8"; + }; + + aliases { + can0 = &main_mcan10; + can1 = &mcu_mcan0; + can2 = &main_mcan13; + can3 = &mcu_mcan1; + eeprom0 = &som_eeprom; + ethernet0 = &mcu_cpsw_port1; + ethernet1 = &main_cpsw0_port8; + i2c0 = &wkup_i2c0; + i2c1 = &mcu_i2c0; + i2c2 = &mcu_i2c1; + i2c3 = &main_i2c0; + i2c4 = &main_i2c1; + i2c5 = &main_i2c2; + i2c6 = &main_i2c5; + mmc0 = &main_sdhci0; + mmc1 = &main_sdhci1; + rtc0 = &rtc_i2c; + serial0 = &main_uart4; + serial1 = &wkup_uart0; + serial2 = &main_uart8; + serial3 = &mcu_uart0; + usb0 = &usb0; + }; + + aquila_key_power: gpio-key-power { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwr_btn_int>; + status = "disabled"; + + key-power { + /* Aquila CTRL_PWR_BTN_MICO# (AQUILA B93) */ + gpios = <&wkup_gpio0 36 GPIO_ACTIVE_LOW>; + label = "Power Button"; + linux,code = <KEY_POWER>; + }; + }; + + aquila_key_wake: gpio-key-wakeup { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ctrl_wake1_mico>; + status = "disabled"; + + key-wakeup { + /* Aquila CTRL_WAKE1_MICO# (AQUILA D6) */ + gpios = <&wkup_gpio0 49 GPIO_ACTIVE_LOW>; + label = "Wake Up"; + linux,code = <KEY_WAKEUP>; + wakeup-source; + }; + }; + + /* Aquila CTRL_RESET_MICO# (AQUILA B92) */ + gpio-restart { + compatible = "gpio-restart"; + /* COLD_RESET_REQ */ + gpios = <&som_gpio_expander 1 GPIO_ACTIVE_HIGH>; + priority = <192>; + }; + + /* PWR_DOWN_REQ */ + gpio-poweroff { + compatible = "gpio-poweroff"; + /* PWR_DOWN_REQ */ + gpios = <&som_gpio_expander 2 GPIO_ACTIVE_HIGH>; + timeout-ms = <3000>; + }; + + memory@80000000 { + device_type = "memory"; + /* 32G RAM */ + reg = <0x00 0x80000000 0x00 0x80000000>, + <0x08 0x80000000 0x07 0x80000000>; + }; + + reserved_memory: reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + secure_ddr: optee@9e800000 { + reg = <0x00 0x9e800000 0x00 0x01800000>; + no-map; + }; + + mcu_r5fss0_core0_dma_memory_region: memory@a0000000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa0000000 0x00 0x100000>; + no-map; + }; + + mcu_r5fss0_core0_memory_region: memory@a0100000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa0100000 0x00 0xf00000>; + no-map; + }; + }; + + /* Module Power Supply (VCC) */ + reg_vin: regulator-vin { + compatible = "regulator-fixed"; + regulator-name = "+V_IN"; + }; + + /* Enabled by EN_3V3_VIO (PMIC_GPIO_9) */ + reg_1v1_usb_bridge: regulator-1v1-vio { + compatible = "regulator-fixed"; + regulator-max-microvolt = <1100000>; + regulator-min-microvolt = <1100000>; + regulator-name = "+V1.1_VIO"; + vin-supply = <®_vin>; + }; + + reg_3v3_wifi: regulator-3v3-wifi { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_en_3v3_wifi>; + gpio = <&wkup_gpio0 57 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "+V3.3_WIFI"; + startup-delay-us = <20000>; + vin-supply = <®_vin>; + }; + + reg_1v8_stby: regulator-1v8-stby { + compatible = "regulator-fixed"; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-name = "+V1.8_STBY"; + vin-supply = <®_vin>; + }; + + /* Aquila SD_1_PWR_EN */ + reg_sdhc1_vmmc: regulator-sdhci1 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sd1_pwr_en>; + /* Aquila SD_1_PWR_EN (AQUILA A6) */ + gpio = <&main_gpio0 52 GPIO_ACTIVE_HIGH>; + enable-active-high; + off-on-delay-us = <100000>; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "+3V3_SD"; + startup-delay-us = <20000>; + }; + + reg_sdhc1_vqmmc: regulator-sdhci1-vqmmc { + compatible = "regulator-gpio"; + /* SDIO_PWR_SEL_3.3V */ + gpios = <&som_gpio_expander 7 GPIO_ACTIVE_HIGH>; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <1800000>; + regulator-name = "+VDD_SD_DV"; + states = <1800000 0x0>, + <3300000 0x1>; + }; + + /* On-module USB_1_SS mux */ + usb0ss_mux: gpio-sbu-mux { + compatible = "ti,tmuxhs4212", "gpio-sbu-mux"; + orientation-switch; + /* USB_MUX_SEL */ + select-gpios = <&som_gpio_expander 0 GPIO_ACTIVE_HIGH>; + status = "disabled"; + }; +}; + +&main_pmx0 { + /* Aquila DP_1_HPD */ + pinctrl_main_dp0_hpd: main-dp0-hpd-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x014, PIN_INPUT, 13) /* (AG33) MCAN14_TX.DP0_HPD */ /* AQUILA B59 */ + >; + }; + + /* Aquila PWM_1 */ + pinctrl_main_ehrpwm0_b: main-ehrpwm0b-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x064, PIN_OUTPUT, 9) /* (AF38) MCAN0_TX.EHRPWM0_B */ /* AQUILA C25 */ + >; + }; + + /* Aquila PWM_2 */ + pinctrl_main_ehrpwm1_a: main-ehrpwm1a-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x060, PIN_OUTPUT, 9) /* (AE36) MCASP2_AXR1.EHRPWM1_A */ /* AQUILA C26 */ + >; + }; + + /* Aquila PWM_3_DSI */ + pinctrl_main_ehrpwm5_a: main-ehrpwm5a-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x084, PIN_OUTPUT, 9) /* (AG38) MCASP0_AXR5.EHRPWM5_A */ /* AQUILA B46 */ + >; + }; + + /* Aquila PWM_4_DP */ + pinctrl_main_ehrpwm2_a: main-ehrpwm2a-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x040, PIN_INPUT, 9) /* (AF37) MCASP0_AXR0.EHRPWM2_A */ /* AQUILA B58 */ + >; + }; + + /* PMIC_INT# */ + pinctrl_pmic_int: main-gpio0-0-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x000, PIN_INPUT, 7) /* (AN35) EXTINTn.GPIO0_0 */ + >; + }; + + /* Aquila GPIO_09_CSI_1 */ + pinctrl_gpio_09_csi_1: main-gpio0-1-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x004, PIN_INPUT, 7) /* (AG36) MCAN12_TX.GPIO0_1 */ /* AQUILA B17 */ + >; + }; + + /* Aquila GPIO_10_CSI_1 */ + pinctrl_gpio_10_csi_1: main-gpio0-2-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x008, PIN_INPUT, 7) /* (AJ33) MCAN12_RX.GPIO0_2 */ /* AQUILA B18 */ + >; + }; + + /* Aquila USB_1_OC# */ + pinctrl_usb1_oc: main-gpio0-10-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x028, PIN_INPUT, 7) /* (AE33) MCAN16_RX.GPIO0_10 */ /* AQUILA B75 */ + >; + }; + + /* Aquila USB_1_EN */ + pinctrl_usb1_en_gpio: main-gpio0-11-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x02c, PIN_INPUT, 7) /* (AL32) GPIO0_11 */ /* AQUILA B77 */ + >; + }; + + /* Aquila GPIO_17_DSI_1 */ + pinctrl_gpio_17_dsi_1: main-gpio0-12-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x030, PIN_INPUT, 7) /* (AK37) GPIO0_12 */ /* AQUILA B42 */ + >; + }; + + /* Aquila GPIO_19_DSI_1 */ + pinctrl_gpio_19_dsi_1: main-gpio0-13-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x034, PIN_INPUT, 7) /* (AJ34) PMIC_WAKE0n.GPIO0_13 */ /* AQUILA B44 */ + >; + }; + + /* Aquila GPIO_02 */ + pinctrl_gpio_02: main-gpio0-17-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x044, PIN_INPUT, 7) /* (AG37) MCASP0_AXR1.GPIO0_17 */ /* AQUILA D24 */ + >; + }; + + /* Aquila GPIO_20_DSI_1 */ + pinctrl_gpio_20_dsi_1: main-gpio0-18-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x048, PIN_INPUT, 7) /* (AK33) MCASP0_AXR2.GPIO0_18 */ /* AQUILA B45 */ + >; + }; + + /* Aquila GPIO_21_DP */ + pinctrl_gpio_21_dp: main-gpio0-21-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x054, PIN_INPUT, 7) /* (AD37) MCASP2_ACLKX.GPIO0_21 */ /* AQUILA B57 */ + >; + }; + + /* Aquila USB_1_INT# */ + pinctrl_usb1_int: main-gpio0-28-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x070, PIN_INPUT, 7) /* (AH38) MCAN1_RX.GPIO0_28 */ /* AQUILA B74 */ + >; + }; + + /* Aquila GPIO_03 */ + pinctrl_gpio_03: main-gpio0-29-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x074, PIN_INPUT, 7) /* (AC33) MCAN2_TX.GPIO0_29 */ /* AQUILA D25 */ + >; + }; + + /* Aquila GPIO_18_DSI_1 */ + pinctrl_gpio_18_dsi_1: main-gpio0-31-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x07c, PIN_INPUT, 7) /* (AJ38) MCASP0_AXR3.GPIO0_31 */ /* AQUILA B43 */ + >; + }; + + /* Aquila PCIE_1_RESET# */ + pinctrl_pcie0_reset: main-gpio0-32-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x080, PIN_INPUT, 7) /* (AK34) MCASP0_AXR4.GPIO0_32 */ /* AQUILA C38 */ + >; + }; + + /* Aquila PWM_3_DSI as GPIO */ + pinctrl_pwm3_dsi_gpio: main-gpio0-33-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x084, PIN_INPUT, 7) /* (AG38) MCASP0_AXR5.GPIO0_33 */ /* AQUILA B46 */ + >; + }; + + /* Aquila GPIO_01 */ + pinctrl_gpio_01: main-gpio0-34-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x088, PIN_INPUT, 7) /* (AF36) MCASP0_AXR6.GPIO0_34 */ /* AQUILA D23 */ + >; + }; + + /* Aquila PCIE_2_RESET# */ + pinctrl_pcie1_reset: main-gpio0-41-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x0a4, PIN_INPUT, 7) /* (AJ36) MCASP0_AXR13.GPIO0_41 */ /* AQUILA C35 */ + >; + }; + + /* Aquila ETH_2_xGMII_INT# */ + pinctrl_eth2_int: main-gpio0-44-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x0b0, PIN_INPUT_PULLUP, 7) /* (AL33) MCASP1_AXR3.GPIO0_44 */ /* AQUILA B81 */ + >; + }; + + /* Aquila GPIO_11_CSI_1 */ + pinctrl_gpio_11_csi_1: main-gpio0-47-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x0bc, PIN_INPUT, 7) /* (AD33) MCASP1_AFSX.GPIO0_47 */ /* AQUILA A11 */ + >; + }; + + /* Aquila GPIO_12_CSI_1 */ + pinctrl_gpio_12_csi_1: main-gpio0-48-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x0c0, PIN_INPUT, 7) /* (AD38) MCASP1_AXR0.GPIO0_48 */ /* AQUILA B19 */ + >; + }; + + /* Aquila SD_1_PWR_EN */ + pinctrl_sd1_pwr_en: main-gpio0-52-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x0d0, PIN_INPUT, 7) /* (AP38) SPI0_CS1.GPIO0_52 */ /* AQUILA A6 */ + >; + }; + + /* Aquila SD_1_CD# as GPIO */ + pinctrl_sd1_cd_gpio: main-gpio0-58-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x0e8, PIN_INPUT_PULLUP, 7) /* (AR38) TIMER_IO0.GPIO0_58 */ /* AQUILA A1 */ + >; + }; + + /* Aquila I2C_3_DSI1 */ + pinctrl_main_i2c0: main-i2c0-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x0e0, PIN_INPUT, 0) /* (AN36) I2C0_SCL */ /* AQUILA B41 */ + J784S4_IOPAD(0x0e4, PIN_INPUT, 0) /* (AP37) I2C0_SDA */ /* AQUILA B40 */ + >; + }; + + /* Aquila I2C_4_CSI1 */ + pinctrl_main_i2c1: main-i2c1-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x020, PIN_INPUT_PULLUP, 12) /* (AJ35) MCAN15_RX.I2C1_SCL */ /* AQUILA A13 */ + J784S4_IOPAD(0x024, PIN_INPUT_PULLUP, 12) /* (AH34) MCAN16_TX.I2C1_SDA */ /* AQUILA A12 */ + >; + }; + + /* Aquila I2C_5_CSI2 */ + pinctrl_main_i2c2: main-i2c2-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x04c, PIN_INPUT_PULLUP, 13) /* (AC32) MCASP1_AXR1.I2C2_SCL */ /* AQUILA C6 */ + J784S4_IOPAD(0x050, PIN_INPUT_PULLUP, 13) /* (AC37) MCASP1_AXR2.I2C2_SDA */ /* AQUILA C5 */ + >; + }; + + /* Aquila I2C_6 */ + pinctrl_main_i2c5: main-i2c5-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x01c, PIN_INPUT_PULLUP, 8) /* (AG34) MCAN15_TX.I2C5_SCL */ /* AQUILA C19 */ + J784S4_IOPAD(0x018, PIN_INPUT_PULLUP, 8) /* (AK36) MCAN14_RX.I2C5_SDA */ /* AQUILA C18 */ + >; + }; + + /* Aquila I2S_1_MCLK */ + pinctrl_audio_extrefclk1: audio-extrefclk1-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x078, PIN_OUTPUT, 1) /* (AH37) MCAN2_RX.AUDIO_EXT_REFCLK1 */ /* AQUILA B24 */ + >; + }; + + /* Aquila CAN_1 */ + pinctrl_main_mcan10: main-mcan10-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x0b8, PIN_INPUT, 0) /* (AC34) MCASP1_ACLKX.MCAN10_RX */ /* AQUILA B49 */ + J784S4_IOPAD(0x0b4, PIN_OUTPUT, 0) /* (AL34) MCASP1_AXR4.MCAN10_TX */ /* AQUILA B48 */ + >; + }; + + /* Aquila CAN_3 */ + pinctrl_main_mcan13: main-mcan13-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x010, PIN_INPUT, 0) /* (AH33) MCAN13_RX */ /* AQUILA B54 */ + J784S4_IOPAD(0x00c, PIN_OUTPUT, 0) /* (AF33) MCAN13_TX */ /* AQUILA B53 */ + >; + }; + + /* Aquila I2S_1 */ + pinctrl_main_mcasp4: main-mcasp4-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x0c8, PIN_INPUT, 1) /* (AJ32) EXT_REFCLK1.MCASP4_ACLKX */ /* AQUILA B20 */ + J784S4_IOPAD(0x06c, PIN_INPUT, 1) /* (AJ37) MCAN1_TX.MCASP4_AFSX */ /* AQUILA B21 */ + J784S4_IOPAD(0x068, PIN_OUTPUT, 1) /* (AE38) MCAN0_RX.MCASP4_AXR1 */ /* AQUILA B22 */ + J784S4_IOPAD(0x0c4, PIN_INPUT, 1) /* (AD36) ECAP0_IN_APWM_OUT.MCASP4_AXR2 */ /* AQUILA B23 */ + >; + }; + + /* Aquila ETH_2_XGMII_MDIO */ + pinctrl_main_mdio1: main-mdio1-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x058, PIN_OUTPUT, 4) /* (AE37) MCASP2_AFSX.MDIO1_MDC */ /* AQUILA B90 */ + J784S4_IOPAD(0x05c, PIN_INPUT, 4) /* (AC36) MCASP2_AXR0.MDIO1_MDIO */ /* AQUILA B89 */ + >; + }; + + /* Aquila SD_1 */ + pinctrl_main_mmc1: main-mmc1-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x104, PIN_INPUT, 0) /* (AB38) MMC1_CLK */ /* AQUILA A5 */ + J784S4_IOPAD(0x108, PIN_INPUT, 0) /* (AB36) MMC1_CMD */ /* AQUILA A7 */ + J784S4_IOPAD(0x100, PIN_INPUT, 0) /* (No Pin) MMC1_CLKLB */ + J784S4_IOPAD(0x0fc, PIN_INPUT, 0) /* (AA33) MMC1_DAT0 */ /* AQUILA A3 */ + J784S4_IOPAD(0x0f8, PIN_INPUT, 0) /* (AB34) MMC1_DAT1 */ /* AQUILA A2 */ + J784S4_IOPAD(0x0f4, PIN_INPUT, 0) /* (AA32) MMC1_DAT2 */ /* AQUILA A10 */ + J784S4_IOPAD(0x0f0, PIN_INPUT, 0) /* (AC38) MMC1_DAT3 */ /* AQUILA A8 */ + >; + }; + + /* Aquila SPI_2 */ + pinctrl_main_spi0: main-spi0-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x0d4, PIN_OUTPUT, 0) /* (AN38) SPI0_CLK */ /* AQUILA D14 */ + J784S4_IOPAD(0x0d8, PIN_INPUT, 0) /* (AM35) SPI0_D0 */ /* AQUILA D15 */ + J784S4_IOPAD(0x0dc, PIN_OUTPUT, 0) /* (AM36) SPI0_D1 */ /* AQUILA D17 */ + >; + }; + + /* Aquila SPI_2 CS */ + pinctrl_main_spi0_cs0: main-spi0-cs0-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x0cc, PIN_OUTPUT, 0) /* (AM37) SPI0_CS0 */ /* AQUILA D16 */ + >; + }; + + /* Aquila SPI_1 */ + pinctrl_main_spi2: main-spi2-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x0a0, PIN_OUTPUT, 10) /* (AD34) MCASP0_AXR12.SPI2_CLK */ /* AQUILA D12 */ + J784S4_IOPAD(0x0a8, PIN_INPUT, 10) /* (AF34) MCASP0_AXR14.SPI2_D0 */ /* AQUILA D10 */ + J784S4_IOPAD(0x0ac, PIN_OUTPUT, 10) /* (AE34) MCASP0_AXR15.SPI2_D1 */ /* AQUILA D11 */ + >; + }; + + /* Aquila SPI_1 CS */ + pinctrl_main_spi2_cs0: main-spi2-cs0-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x09c, PIN_OUTPUT, 10) /* (AF35) MCASP0_AXR11.SPI2_CS1 */ /* AQUILA D9 */ + >; + }; + + /* Aquila UART_1 */ + pinctrl_main_uart4: main-uart4-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x094, PIN_INPUT, 11) /* (AG35) MCASP0_AXR9.UART4_CTSn */ /* AQUILA B36 */ + J784S4_IOPAD(0x098, PIN_OUTPUT, 11) /* (AH36) MCASP0_AXR10.UART4_RTSn */ /* AQUILA B38 */ + J784S4_IOPAD(0x08c, PIN_INPUT, 11) /* (AE35) MCASP0_AXR7.UART4_RXD */ /* AQUILA B35 */ + J784S4_IOPAD(0x090, PIN_OUTPUT, 11) /* (AC35) MCASP0_AXR8.UART4_TXD */ /* AQUILA B37 */ + >; + }; + + /* Aquila UART_3, used as the Linux console */ + pinctrl_main_uart8: main-uart8-default-pins { + pinctrl-single,pins = < + J784S4_IOPAD(0x038, PIN_INPUT, 11) /* (AK35) MCASP0_ACLKX.UART8_RXD */ /* AQUILA D19 */ + J784S4_IOPAD(0x03c, PIN_OUTPUT, 11) /* (AK38) MCASP0_AFSX.UART8_TXD */ /* AQUILA D20 */ + >; + }; +}; + +&wkup_pmx0 { + /* Aquila QSPI_1 (4-bit) */ + pinctrl_mcu_ospi0_4bit: mcu-ospi0-4bit-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (E32) MCU_OSPI0_CLK */ /* AQUILA B65 */ + J784S4_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (B33) MCU_OSPI0_D0 */ /* AQUILA B68 */ + J784S4_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (B32) MCU_OSPI0_D1 */ /* AQUILA B67 */ + J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (C33) MCU_OSPI0_D2 */ /* AQUILA B61 */ + J784S4_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (C35) MCU_OSPI0_D3 */ /* AQUILA B60 */ + J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (C34) MCU_OSPI0_DQS */ /* AQUILA B63 */ + >; + }; + + /* Aquila QSPI_1 (8-bit) */ + pinctrl_mcu_ospi0_8bit: mcu-ospi0-8bit-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (E32) MCU_OSPI0_CLK */ /* AQUILA B65 */ + J784S4_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (B33) MCU_OSPI0_D0 */ /* AQUILA B68 */ + J784S4_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (B32) MCU_OSPI0_D1 */ /* AQUILA B67 */ + J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (C33) MCU_OSPI0_D2 */ /* AQUILA B61 */ + J784S4_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (C35) MCU_OSPI0_D3 */ /* AQUILA B60 */ + J784S4_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (D33) MCU_OSPI0_D4 */ /* AQUILA B70 */ + J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D34) MCU_OSPI0_D5 */ /* AQUILA B71 */ + J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (E34) MCU_OSPI0_D6 */ /* AQUILA B72 */ + J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (E33) MCU_OSPI0_D7 */ /* AQUILA B73 */ + J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (C34) MCU_OSPI0_DQS */ /* AQUILA B63 */ + >; + }; + + /* Aquila QSPI_1_CS1# */ + pinctrl_mcu_ospi0_cs0: mcu-ospi0-cs0-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (A32) MCU_OSPI0_CSn0 */ /* AQUILA B66 */ + >; + }; + + /* Aquila QSPI_1_CS2# */ + pinctrl_mcu_ospi0_cs1: mcu-ospi0-cs1-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x030, PIN_OUTPUT, 0) /* (A33) MCU_OSPI0_CSn1 */ /* AQUILA B62 */ + >; + }; + + /* Aquila QSPI_1_SCK as GPIO */ + pinctrl_wkup_gpio_16: wkup-gpio0-16-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x000, PIN_INPUT, 7) /* (E32) MCU_OSPI0_CLK.WKUP_GPIO0_16 */ /* AQUILA B65 */ + >; + }; + + /* Aquila GPIO_04 */ + pinctrl_gpio_04: wkup-gpio0-17-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x004, PIN_INPUT, 7) /* (D32) MCU_OSPI0_LBCLKO.WKUP_GPIO0_17 */ /* AQUILA C20 */ + >; + }; + + /* Aquila QSPI_1_DQS as GPIO */ + pinctrl_wkup_gpio_18: wkup-gpio0-18-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 7) /* (C34) MCU_OSPI0_DQS.WKUP_GPIO0_18 */ /* AQUILA B63 */ + >; + }; + + /* Aquila QSPI_1_IO0 as GPIO */ + pinctrl_wkup_gpio_19: wkup-gpio0-19-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x00c, PIN_INPUT, 7) /* (B33) MCU_OSPI0_D0.WKUP_GPIO0_19 */ /* AQUILA B68 */ + >; + }; + + /* Aquila QSPI_1_IO1 as GPIO */ + pinctrl_wkup_gpio_20: wkup-gpio0-20-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x010, PIN_INPUT, 7) /* (B32) MCU_OSPI0_D1.WKUP_GPIO0_20 */ /* AQUILA B67 */ + >; + }; + + /* Aquila QSPI_1_IO2 as GPIO */ + pinctrl_wkup_gpio_21: wkup-gpio0-21-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 7) /* (C33) MCU_OSPI0_D2.WKUP_GPIO0_21 */ /* AQUILA B61 */ + >; + }; + + /* Aquila QSPI_1_IO3 as GPIO */ + pinctrl_wkup_gpio_22: wkup-gpio0-22-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x018, PIN_INPUT, 7) /* (C35) MCU_OSPI0_D3.WKUP_GPIO0_22 */ /* AQUILA B60 */ + >; + }; + + /* Aquila QSPI_1_IO4 as GPIO */ + pinctrl_wkup_gpio_23: wkup-gpio0-23-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x01c, PIN_INPUT, 7) /* (D33) MCU_OSPI0_D4.WKUP_GPIO0_23 */ /* AQUILA B70 */ + >; + }; + + /* Aquila QSPI_1_IO5 as GPIO */ + pinctrl_wkup_gpio_24: wkup-gpio0-24-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 7) /* (D34) MCU_OSPI0_D5.WKUP_GPIO0_24 */ /* AQUILA B71 */ + >; + }; + + /* Aquila QSPI_1_IO6 as GPIO */ + pinctrl_wkup_gpio_25: wkup-gpio0-25-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 7) /* (E34) MCU_OSPI0_D6.WKUP_GPIO0_25 */ /* AQUILA B72 */ + >; + }; + + /* Aquila QSPI_1_IO7 as GPIO */ + pinctrl_wkup_gpio_26: wkup-gpio0-26-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 7) /* (E33) MCU_OSPI0_D7.WKUP_GPIO0_26 */ /* AQUILA B73 */ + >; + }; + + /* Aquila QSPI_1_CS#1 as GPIO */ + pinctrl_wkup_gpio_27: wkup-gpio0-27-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x02c, PIN_INPUT, 7) /* (A32) MCU_OSPI0_CSn0.WKUP_GPIO0_27 */ /* AQUILA B66 */ + >; + }; + + /* Aquila QSPI_1_CS#2 as GPIO */ + pinctrl_wkup_gpio_28: wkup-gpio0-28-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x030, PIN_INPUT, 7) /* (A33) MCU_OSPI0_CSn1.WKUP_GPIO0_28 */ /* AQUILA B62 */ + >; + }; +}; + +&wkup_pmx1 { + /* Aquila UART_4 (RXD) */ + pinctrl_mcu_uart0_rx: mcu-uart0-rx-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x018, PIN_INPUT, 4) /* (D31) MCU_OSPI1_D1.MCU_UART0_RXD */ /* AQUILA D21 */ + >; + }; + + /* Aquila GPIO_05 */ + pinctrl_gpio_05: wkup-gpio0-29-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x000, PIN_INPUT, 7) /* (B34) MCU_OSPI0_CSn2.WKUP_GPIO0_29 */ /* AQUILA C21 */ + >; + }; + + /* Aquila GPIO_06 */ + pinctrl_gpio_06: wkup-gpio0-30-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x004, PIN_INPUT, 7) /* (C32) MCU_OSPI0_CSn3.WKUP_GPIO0_30 */ /* AQUILA C22 */ + >; + }; + + /* Aquila GPIO_07 */ + pinctrl_gpio_07: wkup-gpio0-31-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 7) /* (F32) MCU_OSPI1_CLK.WKUP_GPIO0_31 */ /* AQUILA C23 */ + >; + }; + + /* Aquila GPIO_13_CSI_2 */ + pinctrl_gpio_13_csi_2: wkup-gpio0-32-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x00c, PIN_INPUT, 7) /* (C31) MCU_OSPI1_LBCLKO.WKUP_GPIO0_32 */ /* AQUILA C1 */ + >; + }; + + /* Aquila GPIO_14_CSI_2 */ + pinctrl_gpio_14_csi_2: wkup-gpio0-33-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x010, PIN_INPUT, 7) /* (F31) MCU_OSPI1_DQS.WKUP_GPIO0_33 */ /* AQUILA C2 */ + >; + }; + + /* RTC_IRQ# */ + pinctrl_rtc_irq: wkup-gpio0-34-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 7) /* (E35) MCU_OSPI1_D0.WKUP_GPIO0_34 */ + >; + }; + + /* Aquila CTRL_PWR_BTN_MICO# (PWR_BTN_INT#) */ + pinctrl_pwr_btn_int: wkup-gpio0-36-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x01c, PIN_INPUT_PULLUP, 7) /* (G31) MCU_OSPI1_D2.WKUP_GPIO0_36 */ /* AQUILA B92 */ + >; + }; + + /* Aquila GPIO_15_CSI_2 */ + pinctrl_gpio_15_csi_2: wkup-gpio0-37-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 7) /* (F33) MCU_OSPI1_D3.WKUP_GPIO0_37 */ /* AQUILA C3 */ + >; + }; + + /* Aquila GPIO_08 */ + pinctrl_gpio_08: wkup-gpio0-38-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 7) /* (G32) MCU_OSPI1_CSn0.WKUP_GPIO0_38 */ /* AQUILA C24 */ + >; + }; + + /* Aquila GPIO_16_CSI_2 */ + pinctrl_gpio_16_csi_2: wkup-gpio0-39-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 7) /* (G33) MCU_OSPI1_CSn1.WKUP_GPIO0_39 */ /* AQUILA C4 */ + >; + }; +}; + +&wkup_pmx2 { + /* Aquila ADC_[1-4] */ + pinctrl_mcu_adc0: mcu-adc0-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x0cc, PIN_OUTPUT, 0) /* (P36) MCU_ADC0_AIN0 */ /* AQUILA D1 */ + J784S4_WKUP_IOPAD(0x0d0, PIN_OUTPUT, 0) /* (V36) MCU_ADC0_AIN1 */ /* AQUILA D2 */ + J784S4_WKUP_IOPAD(0x0d4, PIN_OUTPUT, 0) /* (T34) MCU_ADC0_AIN2 */ /* AQUILA D3 */ + J784S4_WKUP_IOPAD(0x0d8, PIN_OUTPUT, 0) /* (T36) MCU_ADC0_AIN3 */ /* AQUILA D4 */ + >; + }; + + /* Aquila CTRL_MCLK_MOCI */ + pinctrl_mcu_clkout0: mcu-clkout0-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x084, PIN_OUTPUT, 6) /* (M38) WKUP_GPIO0_11.MCU_CLKOUT0 */ /* AQUILA A14 */ + >; + }; + + /* Aquila I2C_1 */ + pinctrl_mcu_i2c0: mcu-i2c0-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x0a0, PIN_INPUT, 0) /* (M35) MCU_I2C0_SCL */ /* AQUILA D8 */ + J784S4_WKUP_IOPAD(0x0a4, PIN_INPUT, 0) /* (G34) MCU_I2C0_SDA */ /* AQUILA D7 */ + >; + }; + + /* Aquila I2C_2 */ + pinctrl_mcu_i2c1: mcu-i2c1-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x078, PIN_INPUT_PULLUP, 0) /* (L35) WKUP_GPIO0_8.MCU_I2C1_SCL */ /* AQUILA C17 */ + J784S4_WKUP_IOPAD(0x07c, PIN_INPUT_PULLUP, 0) /* (L34) WKUP_GPIO0_9.MCU_I2C1_SDA */ /* AQUILA C16 */ + >; + }; + + /* Aquila CAN_2 */ + pinctrl_mcu_mcan0: mcu-mcan0-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (F38) MCU_MCAN0_RX */ /* AQUILA B51 */ + J784S4_WKUP_IOPAD(0x050, PIN_OUTPUT, 0) /* (K33) MCU_MCAN0_TX */ /* AQUILA B50 */ + >; + }; + + /* Aquila CAN_4 */ + pinctrl_mcu_mcan1: mcu-mcan1-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (K36) WKUP_GPIO0_5.MCU_MCAN1_RX */ /* AQUILA B56 */ + J784S4_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (H35) WKUP_GPIO0_4.MCU_MCAN1_TX */ /* AQUILA B55 */ + >; + }; + + /* On-module ETH_1 MDIO */ + pinctrl_mcu_mdio: mcu-mdio-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A36) MCU_MDIO0_MDC */ + J784S4_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (B35) MCU_MDIO0_MDIO */ + >; + }; + + /* On-module ETH_1 RGMII */ + pinctrl_mcu_rgmii1: mcu-rgmii1-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x02c, PIN_INPUT, 0) /* (A35) MCU_RGMII1_RD0 */ + J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (B36) MCU_RGMII1_RD1 */ + J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (C36) MCU_RGMII1_RD2 */ + J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D36) MCU_RGMII1_RD3 */ + J784S4_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (B37) MCU_RGMII1_RXC */ + J784S4_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (C37) MCU_RGMII1_RX_CTL */ + J784S4_WKUP_IOPAD(0x014, PIN_OUTPUT, 0) /* (D37) MCU_RGMII1_TD0 */ + J784S4_WKUP_IOPAD(0x010, PIN_OUTPUT, 0) /* (D38) MCU_RGMII1_TD1 */ + J784S4_WKUP_IOPAD(0x00c, PIN_OUTPUT, 0) /* (E37) MCU_RGMII1_TD2 */ + J784S4_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (E38) MCU_RGMII1_TD3 */ + J784S4_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (E36) MCU_RGMII1_TXC */ + J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (C38) MCU_RGMII1_TX_CTL */ + >; + }; + + /* On-module SPI (TPM_SPI) */ + pinctrl_mcu_spi0: mcu-spi0-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x038, PIN_OUTPUT, 0) /* (G38) MCU_SPI0_CLK */ + J784S4_WKUP_IOPAD(0x044, PIN_OUTPUT, 0) /* (F37) MCU_SPI0_CS0 */ + J784S4_WKUP_IOPAD(0x03c, PIN_INPUT, 0) /* (H36) MCU_SPI0_D0 */ + J784S4_WKUP_IOPAD(0x040, PIN_OUTPUT, 0) /* (J38) MCU_SPI0_D1 */ + >; + }; + + /* Aquila UART_4 (TX) */ + pinctrl_mcu_uart0_tx: mcu-uart0-tx-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x080, PIN_OUTPUT, 2) /* (L33) WKUP_GPIO0_10.MCU_UART0_TXD */ /* AQUILA D22 */ + >; + }; + + /* On-module Wi-Fi Power Enable */ + pinctrl_en_3v3_wifi: wkup-gpio0-57-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x114, PIN_INPUT, 7) /* (M36) WKUP_GPIO0_57 */ + >; + }; + + /* On-module TPM IRQ# */ + pinctrl_tpm_irq: wkup-gpio0-81-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x0f4, PIN_INPUT, 7) /* (V34) MCU_ADC1_AIN2.WKUP_GPIO0_81 */ + >; + }; + + /* On-module I2C - WKUP_I2C0 */ + pinctrl_wkup_i2c0: wkup-i2c0-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x098, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */ + J784S4_WKUP_IOPAD(0x09c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */ + >; + }; + + /* Aquila UART_2 */ + pinctrl_wkup_uart0: wkup-uart0-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x070, PIN_INPUT, 0) /* (L37) WKUP_GPIO0_6.WKUP_UART0_CTSn */ /* AQUILA B32 */ + J784S4_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (L36) WKUP_GPIO0_7.WKUP_UART0_RTSn */ /* AQUILA B34 */ + J784S4_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (K35) WKUP_UART0_RXD */ /* AQUILA B31 */ + J784S4_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (K34) WKUP_UART0_TXD */ /* AQUILA B33 */ + >; + }; +}; + +&wkup_pmx3 { + /* Aquila CTRL_WAKE1_MICO# */ + pinctrl_ctrl_wake1_mico: wkup-gpio0-49-default-pins { + pinctrl-single,pins = < + J784S4_WKUP_IOPAD(0x000, PIN_INPUT_PULLUP, 7) /* (M33) WKUP_GPIO0_49 */ /* AQUILA D6 */ + >; + }; +}; + +/* Aquila I2S_1_MCLK */ +&audio_refclk1 { + assigned-clock-rates = <24576000>; +}; + +/* On-module ETH_1 MDIO */ +&davinci_mdio { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcu_mdio>; + status = "disabled"; + + mcu_phy0: ethernet-phy@0 { + reg = <0>; + interrupt-parent = <&wkup_gpio0>; + interrupts = <79 IRQ_TYPE_EDGE_FALLING>; + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; + }; +}; + +&dss { + assigned-clocks = <&k3_clks 218 2>, + <&k3_clks 218 5>; + assigned-clock-parents = <&k3_clks 218 3>, + <&k3_clks 218 7>; + status = "disabled"; +}; + +&dss_ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dpi0_out: endpoint { + remote-endpoint = <&dp0_in>; + }; + }; +}; + +&dp0_ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dp0_in: endpoint { + remote-endpoint = <&dpi0_out>; + }; + }; +}; + +&main0_crit { + temperature = <105000>; +}; + +&main0_thermal { + trips { + main0_alert0: trip-point0 { + temperature = <70000>; + hysteresis = <2000>; + type = "active"; + }; + + main0_alert1: trip-point1 { + temperature = <85000>; + hysteresis = <2000>; + type = "active"; + }; + }; +}; + +&main1_crit { + temperature = <105000>; +}; + +&main1_thermal { + trips { + main1_alert0: trip-point0 { + temperature = <70000>; + hysteresis = <2000>; + type = "active"; + }; + + main1_alert1: trip-point1 { + temperature = <85000>; + hysteresis = <2000>; + type = "active"; + }; + }; +}; + +&main2_crit { + temperature = <105000>; +}; + +&main2_thermal { + trips { + main2_alert0: trip-point0 { + temperature = <70000>; + hysteresis = <2000>; + type = "active"; + }; + + main2_alert1: trip-point1 { + temperature = <85000>; + hysteresis = <2000>; + type = "active"; + }; + }; +}; + +&main3_crit { + temperature = <105000>; +}; + +&main3_thermal { + trips { + main3_alert0: trip-point0 { + temperature = <70000>; + hysteresis = <2000>; + type = "active"; + }; + + main3_alert1: trip-point1 { + temperature = <85000>; + hysteresis = <2000>; + type = "active"; + }; + }; +}; + +&main4_crit { + temperature = <105000>; +}; + +&main4_thermal { + trips { + main4_alert0: trip-point0 { + temperature = <70000>; + hysteresis = <2000>; + type = "active"; + }; + + main4_alert1: trip-point1 { + temperature = <85000>; + hysteresis = <2000>; + type = "active"; + }; + }; +}; + +/* Aquila ETH_2 SGMII PHY */ +&main_cpsw0_port8 { + phy-mode = "sgmii"; + phys = <&cpsw0_phy_gmii_sel 8>, <&serdes2_sgmii_link>; + phy-names = "mac", "serdes"; + status = "disabled"; +}; + +/* Aquila ETH_2_XGMII_MDIO */ +&main_cpsw0_mdio { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_mdio1>; +}; + +/* Aquila PWM_1 */ +&main_ehrpwm0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_ehrpwm0_b>; + status = "disabled"; +}; + +/* Aquila PWM_2 */ +&main_ehrpwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_ehrpwm1_a>; + status = "disabled"; +}; + +/* Aquila PWM_4_DP */ +&main_ehrpwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_ehrpwm2_a>; + status = "disabled"; +}; + +/* Aquila PWM_3_DSI */ +&main_ehrpwm5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_ehrpwm5_a>; + status = "disabled"; +}; + +&main_gpio0 { + gpio-line-names = + "", /* 0 */ + "AQUILA_B17", + "AQUILA_B18", + "AQUILA_B53", + "AQUILA_B54", + "AQUILA_B59", + "AQUILA_C18", + "AQUILA_C19", + "AQUILA_A13", + "AQUILA_A12", + "AQUILA_B75", /* 10 */ + "AQUILA_B77", + "AQUILA_B42", + "AQUILA_B44", + "AQUILA_D19", + "AQUILA_D20", + "AQUILA_B58", + "AQUILA_D24", + "AQUILA_B45", + "AQUILA_C06", + "AQUILA_C05", /* 20 */ + "AQUILA_B57", + "AQUILA_B90", + "AQUILA_B89", + "AQUILA_C26", + "AQUILA_C25", + "AQUILA_B22", + "AQUILA_B21", + "AQUILA_B74", + "AQUILA_D25", + "AQUILA_B24", /* 30 */ + "AQUILA_B43", + "AQUILA_C38", + "AQUILA_B46", + "AQUILA_D23", + "AQUILA_B35", + "AQUILA_B37", + "AQUILA_B36", + "AQUILA_B38", + "AQUILA_D09", + "AQUILA_D12", /* 40 */ + "AQUILA_C35", + "AQUILA_D10", + "AQUILA_D11", + "AQUILA_B81", + "AQUILA_B48", + "AQUILA_B49", + "AQUILA_A11", + "AQUILA_B19", + "AQUILA_B23", + "AQUILA_B20", /* 50 */ + "AQUILA_D16", + "AQUILA_A06", + "AQUILA_D14", + "AQUILA_D15", + "AQUILA_D17", + "AQUILA_B41", + "AQUILA_B40", + "AQUILA_A01", + "", + "AQUILA_A08", /* 60 */ + "AQUILA_A10", + "AQUILA_A02", + "AQUILA_A03", + "AQUILA_A05", + "AQUILA_A07"; + + status = "okay"; +}; + +/* Aquila I2C_3_DSI1 */ +&main_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_i2c0>; + clock-frequency = <100000>; + status = "disabled"; +}; + +/* Aquila I2C_4_CSI1 */ +&main_i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_i2c1>; + clock-frequency = <400000>; + status = "disabled"; +}; + +/* Aquila I2C_5_CSI2 */ +&main_i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_i2c2>; + clock-frequency = <400000>; + status = "disabled"; +}; + +/* Aquila I2C_6 */ +&main_i2c5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_i2c5>; + clock-frequency = <400000>; + status = "disabled"; +}; + +/* Aquila CAN_1 */ +&main_mcan10 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_mcan10>; + status = "disabled"; +}; + +/* Aquila CAN_3 */ +&main_mcan13 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_mcan13>; + status = "disabled"; +}; + +/* On-module eMMC */ +&main_sdhci0 { + disable-wp; + non-removable; + ti,driver-strength-ohm = <50>; + status = "okay"; +}; + +/* Aquila SD_1 */ +&main_sdhci1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_mmc1>, <&pinctrl_sd1_cd_gpio>; + cd-gpios = <&main_gpio0 58 GPIO_ACTIVE_LOW>; + disable-wp; + vmmc-supply = <®_sdhc1_vmmc>; + vqmmc-supply = <®_sdhc1_vqmmc>; + ti,driver-strength-ohm = <50>; + ti,fails-without-test-cd; + status = "disabled"; +}; + +/* Aquila SPI_2 */ +&main_spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_spi0>, <&pinctrl_main_spi0_cs0>; + status = "disabled"; +}; + +/* Aquila SPI_1 */ +&main_spi2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_spi2>, <&pinctrl_main_spi2_cs0>; + status = "disabled"; +}; + +/* Aquila UART_1 */ +&main_uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_uart4>; + status = "disabled"; +}; + +/* Aquila UART_3, used as the Linux console */ +&main_uart8 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_uart8>; + status = "disabled"; +}; + +/* Aquila I2S_1 */ +&mcasp4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_mcasp4>; + op-mode = <0>; /* MCASP_I2S_MODE */ + serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ + 0 1 2 0 + 0 0 0 0 + 0 0 0 0 + 0 0 0 0 + >; + tdm-slots = <2>; + #sound-dai-cells = <0>; + status = "disabled"; +}; + +&mcu_cpsw { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcu_rgmii1>; + status = "disabled"; +}; + +/* On-module ETH_1 RGMII */ +&mcu_cpsw_port1 { + phy-handle = <&mcu_phy0>; + phy-mode = "rgmii-id"; + status = "disabled"; +}; + +/* Aquila I2C_1 */ +&mcu_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcu_i2c0>; + clock-frequency = <400000>; + status = "disabled"; +}; + +/* Aquila I2C_2 */ +&mcu_i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcu_i2c1>; + clock-frequency = <400000>; + status = "disabled"; +}; + +/* Aquila CAN_2 */ +&mcu_mcan0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcu_mcan0>; + status = "disabled"; +}; + +/* Aquila CAN_4 */ +&mcu_mcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcu_mcan1>; + status = "disabled"; +}; + +/* On-module SPI (TPM_SPI) */ +&mcu_spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcu_spi0>; + status = "okay"; + + tpm@0 { + compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi"; + reg = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tpm_irq>; + interrupt-parent = <&wkup_gpio0>; + interrupts = <81 IRQ_TYPE_EDGE_FALLING>; + spi-max-frequency = <33000000>; + }; +}; + +/* Aquila UART_4 */ +&mcu_uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcu_uart0_rx>, <&pinctrl_mcu_uart0_tx>; + status = "disabled"; +}; + +&mhdp { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_main_dp0_hpd>; + phy-names = "dpphy"; + phys = <&serdes4_dp0_link>; + status = "disabled"; +}; + +/* Aquila QSPI_1 */ +&ospi0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcu_ospi0_8bit>, <&pinctrl_mcu_ospi0_cs0>; + status = "disabled"; +}; + +/* Aquila PCIE_1 */ +&pcie0_rc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie0_reset>; + clocks = <&k3_clks 332 0>, <&serdes1 CDNS_TORRENT_REFCLK_DRIVER>; + clock-names = "fck", "pcie_refclk"; + num-lanes = <2>; + phy-names = "pcie-phy"; + phys = <&serdes1_pcie0_2l_link>; + reset-gpios = <&main_gpio0 32 GPIO_ACTIVE_HIGH>; + ti,syscon-acspcie-proxy-ctrl = <&acspcie1_proxy_ctrl 0x3>; + status = "disabled"; +}; + +/* Aquila PCIE_2 */ +&pcie1_rc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie1_reset>; + clocks = <&k3_clks 333 0>, <&serdes0 CDNS_TORRENT_REFCLK_DRIVER>; + clock-names = "fck", "pcie_refclk"; + num-lanes = <2>; + phy-names = "pcie-phy"; + phys = <&serdes0_pcie1_2l_link>; + reset-gpios = <&main_gpio0 41 GPIO_ACTIVE_HIGH>; + ti,syscon-acspcie-proxy-ctrl = <&acspcie0_proxy_ctrl 0x3>; + status = "disabled"; +}; + +/* On-module PCIe USB Bridge */ +&pcie2_rc { + clocks = <&k3_clks 334 0>, <&serdes1 CDNS_TORRENT_REFCLK_DRIVER>; + clock-names = "fck", "pcie_refclk"; + num-lanes = <1>; + phy-names = "pcie-phy"; + phys = <&serdes1_pcie2_1l_link>; + reset-gpios = <&som_gpio_expander 3 GPIO_ACTIVE_HIGH>; + ti,syscon-acspcie-proxy-ctrl = <&acspcie1_proxy_ctrl 0x3>; + status = "okay"; + + pci@0,0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + + usb@0 { + compatible = "pci104c,8241"; + reg = <0x0 0x0 0x0 0x0 0x0>; + ti,pwron-active-high; + }; + }; +}; + +/* PCIE for On-module Wi-Fi */ +&pcie3_rc { + clocks = <&k3_clks 335 0>, <&serdes0 CDNS_TORRENT_REFCLK_DRIVER>; + clock-names = "fck", "pcie_refclk"; + num-lanes = <1>; + phy-names = "pcie-phy"; + phys = <&serdes0_pcie3_1l_link>; + reset-gpios = <&som_gpio_expander 4 GPIO_ACTIVE_HIGH>; + ti,syscon-acspcie-proxy-ctrl = <&acspcie0_proxy_ctrl 0x3>; + status = "okay"; +}; + +&serdes0 { + status = "okay"; + + /* Aquila PCIE_2 */ + serdes0_pcie1_2l_link: phy@0 { + reg = <0>; + #phy-cells = <0>; + resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>; + cdns,num-lanes = <2>; + cdns,phy-type = <PHY_TYPE_PCIE>; + }; + + /* On-module PCIe Wi-Fi */ + serdes0_pcie3_1l_link: phy@2 { + reg = <2>; + #phy-cells = <0>; + resets = <&serdes_wiz0 3>; + cdns,num-lanes = <1>; + cdns,phy-type = <PHY_TYPE_PCIE>; + }; + + /* Aquila USB0 SS */ + serdes0_usb0_ss_link: phy@3 { + reg = <3>; + #phy-cells = <0>; + resets = <&serdes_wiz0 4>; + cdns,num-lanes = <1>; + cdns,phy-type = <PHY_TYPE_USB3>; + }; +}; + +&serdes1 { + status = "okay"; + + /* Aquila PCIE_1 */ + serdes1_pcie0_2l_link: phy@0 { + reg = <0>; + #phy-cells = <0>; + resets = <&serdes_wiz1 1>, <&serdes_wiz1 2>; + cdns,num-lanes = <2>; + cdns,phy-type = <PHY_TYPE_PCIE>; + }; + + /* On-module PCIe USB Bridge */ + serdes1_pcie2_1l_link: phy@2 { + reg = <2>; + #phy-cells = <0>; + resets = <&serdes_wiz1 3>; + cdns,num-lanes = <1>; + cdns,phy-type = <PHY_TYPE_PCIE>; + }; +}; + +&serdes2 { + status = "disabled"; + + /* Aquila ETH_2 xGMII */ + serdes2_sgmii_link: phy@3 { + reg = <3>; + #phy-cells = <0>; + resets = <&serdes_wiz2 4>; + cdns,num-lanes = <1>; + cdns,phy-type = <PHY_TYPE_SGMII>; + }; +}; + +&serdes4 { + status = "disabled"; + + /* Aquila DP_1 */ + serdes4_dp0_link: phy@0 { + reg = <0>; + #phy-cells = <0>; + resets = <&serdes_wiz4 1>, <&serdes_wiz4 2>, + <&serdes_wiz4 3>, <&serdes_wiz4 4>; + cdns,max-bit-rate = <5400>; + cdns,num-lanes = <4>; + cdns,phy-type = <PHY_TYPE_DP>; + }; +}; + +&serdes_refclk { + clock-frequency = <100000000>; + status = "okay"; +}; + +&serdes_ln_ctrl { + idle-states = <J784S4_SERDES0_LANE0_PCIE1_LANE0>, /* Aquila PCIE_2 L0 */ + <J784S4_SERDES0_LANE1_PCIE1_LANE1>, /* Aquila PCIE_2 L1 */ + <J784S4_SERDES0_LANE2_PCIE3_LANE0>, /* On-module PCIe Wi-Fi */ + <J784S4_SERDES0_LANE3_USB>, /* Aquila USB0 SS */ + <J784S4_SERDES1_LANE0_PCIE0_LANE0>, /* Aquila PCIE_1 L0 */ + <J784S4_SERDES1_LANE1_PCIE0_LANE1>, /* Aquila PCIE_1 L1 */ + <J784S4_SERDES1_LANE2_PCIE2_LANE0>, /* On-module PCIe USB Bridge */ + <J784S4_SERDES1_LANE3_QSGMII_LANE2>, /* Aquila SGMII MSP_9 */ + <J784S4_SERDES2_LANE0_QSGMII_LANE5>, /* Aquila SGMII MSP_6 */ + <J784S4_SERDES2_LANE1_QSGMII_LANE6>, /* Aquila SGMII MSP_7 */ + <J784S4_SERDES2_LANE2_QSGMII_LANE7>, /* Aquila SGMII MSP_8 */ + <J784S4_SERDES2_LANE3_QSGMII_LANE8>, /* Aquila ETH_2 xGMII */ + <J784S4_SERDES4_LANE0_EDP_LANE0>, /* Aquila DP L0 */ + <J784S4_SERDES4_LANE1_EDP_LANE1>, /* Aquila DP L1 */ + <J784S4_SERDES4_LANE2_EDP_LANE2>, /* Aquila DP L2 */ + <J784S4_SERDES4_LANE3_EDP_LANE3>; /* Aquila DP L3 */ +}; + +&serdes_wiz0 { + status = "okay"; +}; + +&serdes_wiz1 { + status = "okay"; +}; + +&serdes_wiz2 { + status = "disabled"; +}; + +&serdes_wiz4 { + status = "disabled"; +}; + +/* Aquila ADC_[1-4] */ +&tscadc0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcu_adc0>; + status = "disabled"; + + adc { + ti,adc-channels = <0 1 2 3>; + }; +}; + +&usb0 { + phys = <&serdes0_usb0_ss_link>; + phy-names = "cdns3,usb3-phy"; + dr_mode = "otg"; + maximum-speed = "super-speed"; + usb-role-switch; + status = "disabled"; +}; + +&usb_serdes_mux { + idle-states = <0>; /* USB0 to SERDES lane 3 */ +}; + +&usbss0 { + ti,vbus-divider; + status = "disabled"; +}; + +&wkup_gpio0 { + gpio-line-names = + "", /* 0 */ + "", + "", + "AQUILA_C53", + "AQUILA_B55", + "AQUILA_B56", + "AQUILA_B32", + "AQUILA_B34", + "AQUILA_C17", + "AQUILA_C16", + "AQUILA_D22", /* 10 */ + "", + "", + "", + "", + "", + "AQUILA_B65", + "AQUILA_C20", + "AQUILA_B63", + "AQUILA_B68", + "AQUILA_B67", /* 20 */ + "AQUILA_B61", + "AQUILA_B60", + "AQUILA_B70", + "AQUILA_B71", + "AQUILA_B72", + "AQUILC_B73", + "AQUILA_B66", + "AQUILA_B62", + "AQUILA_C21", + "AQUILA_C22", /* 30 */ + "AQUILA_C23", + "AQUILA_C01", + "AQUILA_C02", + "", + "AQUILA_D21", + "", + "AQUILA_C03", + "AQUILA_C24", + "AQUILA_C04", + "AQUILA_B84", /* 40 */ + "", + "AQUILA_B86", + "AQUILA_B87", + "", + "", + "AQUILA_B83", + "", + "", + "", + "", /* 50 */ + "", + "", + "", + "", + "", + "", + "", + "AQUILA_B31", + "AQUILA_B33", + "AQUILA_B50", /* 60 */ + "AQUILA_B51", + "", + "", + "", + "AQUILA_D08", + "", + "", + "", + "", + "", /* 70 */ + "AQUILA_D01", + "AQUILA_D02", + "AQUILA_D03", + "AQUILA_D04", + "AQUILA_D54", + "AQUILA_D55", + "AQUILA_C55", + "AQUILA_C56", + "", + "AQUILA_C36", /* 80 */ + "", + "", + "", + "", + "", + "", + "AQUILA_D07", + ""; + + status = "okay"; +}; + +/* On-module I2C - WKUP_I2C0 */ +&wkup_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wkup_i2c0>; + clock-frequency = <400000>; + status = "okay"; + + som_gpio_expander: gpio@21 { + compatible = "ti,tca6408"; + reg = <0x21>; + #gpio-cells = <2>; + gpio-controller; + gpio-line-names = + "USB_MUX_SEL", + "COLD_RESET_REQ", + "PWR_DOWN_REQ", + "PCIE_3_RESET#", + "PCIE_4_RESET#", + "WIFI_DISABLE", + "BT_DISABLE", + "SDIO_PWR_SEL_3.3V"; + }; + + rtc_i2c: rtc@32 { + compatible = "epson,rx8130"; + reg = <0x32>; + }; + + tps62873a: regulator@40 { + compatible = "ti,tps62873"; + reg = <0x40>; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <900000>; + regulator-min-microvolt = <600000>; + regulator-name = "+VDD_CPU_AVS"; + }; + + tps62873b: regulator@43 { + compatible = "ti,tps62873"; + reg = <0x43>; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <840000>; + regulator-min-microvolt = <760000>; + regulator-name = "+V0.8_VDD_CORE"; + }; + + pmic_tps6594: pmic@48 { + compatible = "ti,tps6594-q1"; + reg = <0x48>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pmic_int>; + interrupt-parent = <&main_gpio0>; + interrupts = <0 IRQ_TYPE_EDGE_FALLING>; + #gpio-cells = <2>; + gpio-controller; + buck12-supply = <®_vin>; + buck3-supply = <®_vin>; + buck4-supply = <®_vin>; + buck5-supply = <®_vin>; + ldo1-supply = <®_vin>; + ldo2-supply = <®_vin>; + ldo3-supply = <®_vin>; + ldo4-supply = <®_vin>; + system-power-controller; + ti,primary-pmic; + + regulators { + reg_vdd_ddr: buck12 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1100000>; + regulator-min-microvolt = <1100000>; + regulator-name = "+V1.1_VDD_DDR (PMIC BUCK12)"; + }; + + reg_vdd_ram: buck3 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <850000>; + regulator-min-microvolt = <850000>; + regulator-name = "+V0.85_VDD_RAM (PMIC BUCK3)"; + }; + + reg_vdd_io: buck4 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-name = "+V1.8_VDD_IO (PMIC BUCK4)"; + }; + + reg_3v3_vio: buck5 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "+V3.3_VIO (PMIC BUCK5)"; + }; + + reg_vda_phy: ldo1 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-name = "+V1.8_VDA_PHY (PMIC LDO1)"; + }; + + reg_2v5_eth: ldo2 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <2500000>; + regulator-min-microvolt = <2500000>; + regulator-name = "+V2.5_ETH (PMIC LDO2)"; + }; + + reg_vda_dll: ldo3 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <800000>; + regulator-min-microvolt = <800000>; + regulator-name = "+V0.8_VDA_DLL (PMIC LDO3)"; + }; + + reg_vda_pll: ldo4 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-name = "+V0.8_VDA_PLL (PMIC LDO4)"; + }; + }; + }; + + temperature-sensor@4f { + compatible = "ti,tmp1075"; + reg = <0x4f>; + }; + + som_eeprom: eeprom@50 { + compatible = "st,24c02", "atmel,24c02"; + reg = <0x50>; + pagesize = <16>; + }; +}; + +&wkup0_crit { + temperature = <105000>; +}; + +&wkup0_thermal { + trips { + wkup0_alert0: trip-point0 { + temperature = <70000>; + hysteresis = <2000>; + type = "active"; + }; + + wkup0_alert1: trip-point1 { + temperature = <85000>; + hysteresis = <2000>; + type = "active"; + }; + }; +}; + +&wkup1_crit { + temperature = <105000>; +}; + +&wkup1_thermal { + trips { + wkup1_alert0: trip-point0 { + temperature = <70000>; + hysteresis = <2000>; + type = "active"; + }; + + wkup1_alert1: trip-point1 { + temperature = <85000>; + hysteresis = <2000>; + type = "active"; + }; + }; +}; + +&wkup_gpio_intr { + status = "okay"; +}; + +/* Aquila UART_2 */ +&wkup_uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wkup_uart0>; + status = "disabled"; +}; + +#include "k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi" +#include "k3-j784s4-ti-ipc-firmware.dtsi" -- 2.47.3 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH v1 2/3] arm64: dts: ti: Add Aquila AM69 Support 2025-11-04 14:52 ` [PATCH v1 2/3] arm64: dts: ti: Add Aquila AM69 Support Francesco Dolcini @ 2025-11-04 17:41 ` Andrew Davis 2025-11-05 11:53 ` Francesco Dolcini 0 siblings, 1 reply; 13+ messages in thread From: Andrew Davis @ 2025-11-04 17:41 UTC (permalink / raw) To: Francesco Dolcini, Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: Parth Pancholi, linux-arm-kernel, devicetree, linux-kernel, Emanuele Ghidoli, Ernest Van Hoecke, João Paulo Gonçalves, Francesco Dolcini On 11/4/25 8:52 AM, Francesco Dolcini wrote: > From: Parth Pancholi <parth.pancholi@toradex.com> > > Add support for the Toradex Aquila AM69 and its Development Carrier > Board. > > The Aquila AM69 SoM is based on the TI AM69 SoC from the Jacinto 7 > family and is designed for high-end embedded computing, featuring up to > 32GB of LPDDR4 and 256GB eMMC storage, extensive multimedia support (3x > Quad CSI, 2x Quad DSI, DisplayPort, 5x Audio I2S/TDM), six Ethernet > interfaces (1x 1G, 4x 2.5G SGMII, 1x 10G), USB 3.2 Host/DRD support, and > a Wi-Fi 7/BT 5.3 module, alongside an RX8130 RTC, I2C EEPROM and > Temperature Sensor, and optional TPM 2.0 module. > > Link: https://www.toradex.com/computer-on-modules/aquila-arm-family/ti-am69 > Link: https://www.toradex.com/products/carrier-board/aquila-development-board-kit > Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com> > Co-developed-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> > Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> > Co-developed-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com> > Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com> > Co-developed-by: João Paulo Gonçalves <joao.goncalves@toradex.com> > Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com> > Co-developed-by: Francesco Dolcini <francesco.dolcini@toradex.com> > Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> > --- > arch/arm64/boot/dts/ti/Makefile | 1 + > arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts | 576 ++++++ > arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi | 1840 +++++++++++++++++ > 3 files changed, 2417 insertions(+) > create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts > create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi > > diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile > index 361248dcfff4..6ce652fe98fa 100644 > --- a/arch/arm64/boot/dts/ti/Makefile > +++ b/arch/arm64/boot/dts/ti/Makefile > @@ -153,6 +153,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo > dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo > > # Boards with J784s4 SoC > +dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dev.dtb > dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb > dtb-$(CONFIG_ARCH_K3) += k3-am69-sk-pcie0-ep.dtbo > dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb > diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts b/arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts > new file mode 100644 > index 000000000000..c7ce804eac70 > --- /dev/null > +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts > @@ -0,0 +1,576 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT > +/* > + * Copyright (C) 2025 Toradex > + * > + * https://www.toradex.com/computer-on-modules/aquila-arm-family/ti-am69 > + * https://www.toradex.com/products/carrier-board/aquila-development-board-kit > + */ > + > +/dts-v1/; > + > +#include <dt-bindings/pwm/pwm.h> > +#include "k3-am69-aquila.dtsi" > + [...] > +/* Aquila SPI_2 */ > +&main_spi0 { > + status = "okay"; > +}; > + > +/* Aquila SPI_1 */ > +&main_spi2 { > + status = "okay"; Why enable this with nothing connected to it? [...] > +/* Aquila SPI_1 */ > +&main_spi2 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_main_spi2>, <&pinctrl_main_spi2_cs0>; > + status = "disabled"; This is already disabled by default in the SoC dtsi file. Andrew > +}; > + > +/* Aquila UART_1 */ > +&main_uart4 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_main_uart4>; > + status = "disabled"; > +}; > + > +/* Aquila UART_3, used as the Linux console */ > +&main_uart8 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_main_uart8>; > + status = "disabled"; > +}; > + > +/* Aquila I2S_1 */ > +&mcasp4 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_main_mcasp4>; > + op-mode = <0>; /* MCASP_I2S_MODE */ > + serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ > + 0 1 2 0 > + 0 0 0 0 > + 0 0 0 0 > + 0 0 0 0 > + >; > + tdm-slots = <2>; > + #sound-dai-cells = <0>; > + status = "disabled"; > +}; > + > +&mcu_cpsw { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_mcu_rgmii1>; > + status = "disabled"; > +}; > + > +/* On-module ETH_1 RGMII */ > +&mcu_cpsw_port1 { > + phy-handle = <&mcu_phy0>; > + phy-mode = "rgmii-id"; > + status = "disabled"; > +}; > + > +/* Aquila I2C_1 */ > +&mcu_i2c0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_mcu_i2c0>; > + clock-frequency = <400000>; > + status = "disabled"; > +}; > + > +/* Aquila I2C_2 */ > +&mcu_i2c1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_mcu_i2c1>; > + clock-frequency = <400000>; > + status = "disabled"; > +}; > + > +/* Aquila CAN_2 */ > +&mcu_mcan0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_mcu_mcan0>; > + status = "disabled"; > +}; > + > +/* Aquila CAN_4 */ > +&mcu_mcan1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_mcu_mcan1>; > + status = "disabled"; > +}; > + > +/* On-module SPI (TPM_SPI) */ > +&mcu_spi0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_mcu_spi0>; > + status = "okay"; > + > + tpm@0 { > + compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi"; > + reg = <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_tpm_irq>; > + interrupt-parent = <&wkup_gpio0>; > + interrupts = <81 IRQ_TYPE_EDGE_FALLING>; > + spi-max-frequency = <33000000>; > + }; > +}; > + > +/* Aquila UART_4 */ > +&mcu_uart0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_mcu_uart0_rx>, <&pinctrl_mcu_uart0_tx>; > + status = "disabled"; > +}; > + > +&mhdp { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_main_dp0_hpd>; > + phy-names = "dpphy"; > + phys = <&serdes4_dp0_link>; > + status = "disabled"; > +}; > + > +/* Aquila QSPI_1 */ > +&ospi0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_mcu_ospi0_8bit>, <&pinctrl_mcu_ospi0_cs0>; > + status = "disabled"; > +}; > + > +/* Aquila PCIE_1 */ > +&pcie0_rc { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_pcie0_reset>; > + clocks = <&k3_clks 332 0>, <&serdes1 CDNS_TORRENT_REFCLK_DRIVER>; > + clock-names = "fck", "pcie_refclk"; > + num-lanes = <2>; > + phy-names = "pcie-phy"; > + phys = <&serdes1_pcie0_2l_link>; > + reset-gpios = <&main_gpio0 32 GPIO_ACTIVE_HIGH>; > + ti,syscon-acspcie-proxy-ctrl = <&acspcie1_proxy_ctrl 0x3>; > + status = "disabled"; > +}; > + > +/* Aquila PCIE_2 */ > +&pcie1_rc { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_pcie1_reset>; > + clocks = <&k3_clks 333 0>, <&serdes0 CDNS_TORRENT_REFCLK_DRIVER>; > + clock-names = "fck", "pcie_refclk"; > + num-lanes = <2>; > + phy-names = "pcie-phy"; > + phys = <&serdes0_pcie1_2l_link>; > + reset-gpios = <&main_gpio0 41 GPIO_ACTIVE_HIGH>; > + ti,syscon-acspcie-proxy-ctrl = <&acspcie0_proxy_ctrl 0x3>; > + status = "disabled"; > +}; > + > +/* On-module PCIe USB Bridge */ > +&pcie2_rc { > + clocks = <&k3_clks 334 0>, <&serdes1 CDNS_TORRENT_REFCLK_DRIVER>; > + clock-names = "fck", "pcie_refclk"; > + num-lanes = <1>; > + phy-names = "pcie-phy"; > + phys = <&serdes1_pcie2_1l_link>; > + reset-gpios = <&som_gpio_expander 3 GPIO_ACTIVE_HIGH>; > + ti,syscon-acspcie-proxy-ctrl = <&acspcie1_proxy_ctrl 0x3>; > + status = "okay"; > + > + pci@0,0 { > + device_type = "pci"; > + reg = <0x0 0x0 0x0 0x0 0x0>; > + > + #address-cells = <3>; > + #size-cells = <2>; > + ranges; > + > + usb@0 { > + compatible = "pci104c,8241"; > + reg = <0x0 0x0 0x0 0x0 0x0>; > + ti,pwron-active-high; > + }; > + }; > +}; > + > +/* PCIE for On-module Wi-Fi */ > +&pcie3_rc { > + clocks = <&k3_clks 335 0>, <&serdes0 CDNS_TORRENT_REFCLK_DRIVER>; > + clock-names = "fck", "pcie_refclk"; > + num-lanes = <1>; > + phy-names = "pcie-phy"; > + phys = <&serdes0_pcie3_1l_link>; > + reset-gpios = <&som_gpio_expander 4 GPIO_ACTIVE_HIGH>; > + ti,syscon-acspcie-proxy-ctrl = <&acspcie0_proxy_ctrl 0x3>; > + status = "okay"; > +}; > + > +&serdes0 { > + status = "okay"; > + > + /* Aquila PCIE_2 */ > + serdes0_pcie1_2l_link: phy@0 { > + reg = <0>; > + #phy-cells = <0>; > + resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>; > + cdns,num-lanes = <2>; > + cdns,phy-type = <PHY_TYPE_PCIE>; > + }; > + > + /* On-module PCIe Wi-Fi */ > + serdes0_pcie3_1l_link: phy@2 { > + reg = <2>; > + #phy-cells = <0>; > + resets = <&serdes_wiz0 3>; > + cdns,num-lanes = <1>; > + cdns,phy-type = <PHY_TYPE_PCIE>; > + }; > + > + /* Aquila USB0 SS */ > + serdes0_usb0_ss_link: phy@3 { > + reg = <3>; > + #phy-cells = <0>; > + resets = <&serdes_wiz0 4>; > + cdns,num-lanes = <1>; > + cdns,phy-type = <PHY_TYPE_USB3>; > + }; > +}; > + > +&serdes1 { > + status = "okay"; > + > + /* Aquila PCIE_1 */ > + serdes1_pcie0_2l_link: phy@0 { > + reg = <0>; > + #phy-cells = <0>; > + resets = <&serdes_wiz1 1>, <&serdes_wiz1 2>; > + cdns,num-lanes = <2>; > + cdns,phy-type = <PHY_TYPE_PCIE>; > + }; > + > + /* On-module PCIe USB Bridge */ > + serdes1_pcie2_1l_link: phy@2 { > + reg = <2>; > + #phy-cells = <0>; > + resets = <&serdes_wiz1 3>; > + cdns,num-lanes = <1>; > + cdns,phy-type = <PHY_TYPE_PCIE>; > + }; > +}; > + > +&serdes2 { > + status = "disabled"; > + > + /* Aquila ETH_2 xGMII */ > + serdes2_sgmii_link: phy@3 { > + reg = <3>; > + #phy-cells = <0>; > + resets = <&serdes_wiz2 4>; > + cdns,num-lanes = <1>; > + cdns,phy-type = <PHY_TYPE_SGMII>; > + }; > +}; > + > +&serdes4 { > + status = "disabled"; > + > + /* Aquila DP_1 */ > + serdes4_dp0_link: phy@0 { > + reg = <0>; > + #phy-cells = <0>; > + resets = <&serdes_wiz4 1>, <&serdes_wiz4 2>, > + <&serdes_wiz4 3>, <&serdes_wiz4 4>; > + cdns,max-bit-rate = <5400>; > + cdns,num-lanes = <4>; > + cdns,phy-type = <PHY_TYPE_DP>; > + }; > +}; > + > +&serdes_refclk { > + clock-frequency = <100000000>; > + status = "okay"; > +}; > + > +&serdes_ln_ctrl { > + idle-states = <J784S4_SERDES0_LANE0_PCIE1_LANE0>, /* Aquila PCIE_2 L0 */ > + <J784S4_SERDES0_LANE1_PCIE1_LANE1>, /* Aquila PCIE_2 L1 */ > + <J784S4_SERDES0_LANE2_PCIE3_LANE0>, /* On-module PCIe Wi-Fi */ > + <J784S4_SERDES0_LANE3_USB>, /* Aquila USB0 SS */ > + <J784S4_SERDES1_LANE0_PCIE0_LANE0>, /* Aquila PCIE_1 L0 */ > + <J784S4_SERDES1_LANE1_PCIE0_LANE1>, /* Aquila PCIE_1 L1 */ > + <J784S4_SERDES1_LANE2_PCIE2_LANE0>, /* On-module PCIe USB Bridge */ > + <J784S4_SERDES1_LANE3_QSGMII_LANE2>, /* Aquila SGMII MSP_9 */ > + <J784S4_SERDES2_LANE0_QSGMII_LANE5>, /* Aquila SGMII MSP_6 */ > + <J784S4_SERDES2_LANE1_QSGMII_LANE6>, /* Aquila SGMII MSP_7 */ > + <J784S4_SERDES2_LANE2_QSGMII_LANE7>, /* Aquila SGMII MSP_8 */ > + <J784S4_SERDES2_LANE3_QSGMII_LANE8>, /* Aquila ETH_2 xGMII */ > + <J784S4_SERDES4_LANE0_EDP_LANE0>, /* Aquila DP L0 */ > + <J784S4_SERDES4_LANE1_EDP_LANE1>, /* Aquila DP L1 */ > + <J784S4_SERDES4_LANE2_EDP_LANE2>, /* Aquila DP L2 */ > + <J784S4_SERDES4_LANE3_EDP_LANE3>; /* Aquila DP L3 */ > +}; > + > +&serdes_wiz0 { > + status = "okay"; > +}; > + > +&serdes_wiz1 { > + status = "okay"; > +}; > + > +&serdes_wiz2 { > + status = "disabled"; > +}; > + > +&serdes_wiz4 { > + status = "disabled"; > +}; > + > +/* Aquila ADC_[1-4] */ > +&tscadc0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_mcu_adc0>; > + status = "disabled"; > + > + adc { > + ti,adc-channels = <0 1 2 3>; > + }; > +}; > + > +&usb0 { > + phys = <&serdes0_usb0_ss_link>; > + phy-names = "cdns3,usb3-phy"; > + dr_mode = "otg"; > + maximum-speed = "super-speed"; > + usb-role-switch; > + status = "disabled"; > +}; > + > +&usb_serdes_mux { > + idle-states = <0>; /* USB0 to SERDES lane 3 */ > +}; > + > +&usbss0 { > + ti,vbus-divider; > + status = "disabled"; > +}; > + > +&wkup_gpio0 { > + gpio-line-names = > + "", /* 0 */ > + "", > + "", > + "AQUILA_C53", > + "AQUILA_B55", > + "AQUILA_B56", > + "AQUILA_B32", > + "AQUILA_B34", > + "AQUILA_C17", > + "AQUILA_C16", > + "AQUILA_D22", /* 10 */ > + "", > + "", > + "", > + "", > + "", > + "AQUILA_B65", > + "AQUILA_C20", > + "AQUILA_B63", > + "AQUILA_B68", > + "AQUILA_B67", /* 20 */ > + "AQUILA_B61", > + "AQUILA_B60", > + "AQUILA_B70", > + "AQUILA_B71", > + "AQUILA_B72", > + "AQUILC_B73", > + "AQUILA_B66", > + "AQUILA_B62", > + "AQUILA_C21", > + "AQUILA_C22", /* 30 */ > + "AQUILA_C23", > + "AQUILA_C01", > + "AQUILA_C02", > + "", > + "AQUILA_D21", > + "", > + "AQUILA_C03", > + "AQUILA_C24", > + "AQUILA_C04", > + "AQUILA_B84", /* 40 */ > + "", > + "AQUILA_B86", > + "AQUILA_B87", > + "", > + "", > + "AQUILA_B83", > + "", > + "", > + "", > + "", /* 50 */ > + "", > + "", > + "", > + "", > + "", > + "", > + "", > + "AQUILA_B31", > + "AQUILA_B33", > + "AQUILA_B50", /* 60 */ > + "AQUILA_B51", > + "", > + "", > + "", > + "AQUILA_D08", > + "", > + "", > + "", > + "", > + "", /* 70 */ > + "AQUILA_D01", > + "AQUILA_D02", > + "AQUILA_D03", > + "AQUILA_D04", > + "AQUILA_D54", > + "AQUILA_D55", > + "AQUILA_C55", > + "AQUILA_C56", > + "", > + "AQUILA_C36", /* 80 */ > + "", > + "", > + "", > + "", > + "", > + "", > + "AQUILA_D07", > + ""; > + > + status = "okay"; > +}; > + > +/* On-module I2C - WKUP_I2C0 */ > +&wkup_i2c0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_wkup_i2c0>; > + clock-frequency = <400000>; > + status = "okay"; > + > + som_gpio_expander: gpio@21 { > + compatible = "ti,tca6408"; > + reg = <0x21>; > + #gpio-cells = <2>; > + gpio-controller; > + gpio-line-names = > + "USB_MUX_SEL", > + "COLD_RESET_REQ", > + "PWR_DOWN_REQ", > + "PCIE_3_RESET#", > + "PCIE_4_RESET#", > + "WIFI_DISABLE", > + "BT_DISABLE", > + "SDIO_PWR_SEL_3.3V"; > + }; > + > + rtc_i2c: rtc@32 { > + compatible = "epson,rx8130"; > + reg = <0x32>; > + }; > + > + tps62873a: regulator@40 { > + compatible = "ti,tps62873"; > + reg = <0x40>; > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <900000>; > + regulator-min-microvolt = <600000>; > + regulator-name = "+VDD_CPU_AVS"; > + }; > + > + tps62873b: regulator@43 { > + compatible = "ti,tps62873"; > + reg = <0x43>; > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <840000>; > + regulator-min-microvolt = <760000>; > + regulator-name = "+V0.8_VDD_CORE"; > + }; > + > + pmic_tps6594: pmic@48 { > + compatible = "ti,tps6594-q1"; > + reg = <0x48>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_pmic_int>; > + interrupt-parent = <&main_gpio0>; > + interrupts = <0 IRQ_TYPE_EDGE_FALLING>; > + #gpio-cells = <2>; > + gpio-controller; > + buck12-supply = <®_vin>; > + buck3-supply = <®_vin>; > + buck4-supply = <®_vin>; > + buck5-supply = <®_vin>; > + ldo1-supply = <®_vin>; > + ldo2-supply = <®_vin>; > + ldo3-supply = <®_vin>; > + ldo4-supply = <®_vin>; > + system-power-controller; > + ti,primary-pmic; > + > + regulators { > + reg_vdd_ddr: buck12 { > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <1100000>; > + regulator-min-microvolt = <1100000>; > + regulator-name = "+V1.1_VDD_DDR (PMIC BUCK12)"; > + }; > + > + reg_vdd_ram: buck3 { > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <850000>; > + regulator-min-microvolt = <850000>; > + regulator-name = "+V0.85_VDD_RAM (PMIC BUCK3)"; > + }; > + > + reg_vdd_io: buck4 { > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <1800000>; > + regulator-min-microvolt = <1800000>; > + regulator-name = "+V1.8_VDD_IO (PMIC BUCK4)"; > + }; > + > + reg_3v3_vio: buck5 { > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <3300000>; > + regulator-min-microvolt = <3300000>; > + regulator-name = "+V3.3_VIO (PMIC BUCK5)"; > + }; > + > + reg_vda_phy: ldo1 { > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <1800000>; > + regulator-min-microvolt = <1800000>; > + regulator-name = "+V1.8_VDA_PHY (PMIC LDO1)"; > + }; > + > + reg_2v5_eth: ldo2 { > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <2500000>; > + regulator-min-microvolt = <2500000>; > + regulator-name = "+V2.5_ETH (PMIC LDO2)"; > + }; > + > + reg_vda_dll: ldo3 { > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <800000>; > + regulator-min-microvolt = <800000>; > + regulator-name = "+V0.8_VDA_DLL (PMIC LDO3)"; > + }; > + > + reg_vda_pll: ldo4 { > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <1800000>; > + regulator-min-microvolt = <1800000>; > + regulator-name = "+V0.8_VDA_PLL (PMIC LDO4)"; > + }; > + }; > + }; > + > + temperature-sensor@4f { > + compatible = "ti,tmp1075"; > + reg = <0x4f>; > + }; > + > + som_eeprom: eeprom@50 { > + compatible = "st,24c02", "atmel,24c02"; > + reg = <0x50>; > + pagesize = <16>; > + }; > +}; > + > +&wkup0_crit { > + temperature = <105000>; > +}; > + > +&wkup0_thermal { > + trips { > + wkup0_alert0: trip-point0 { > + temperature = <70000>; > + hysteresis = <2000>; > + type = "active"; > + }; > + > + wkup0_alert1: trip-point1 { > + temperature = <85000>; > + hysteresis = <2000>; > + type = "active"; > + }; > + }; > +}; > + > +&wkup1_crit { > + temperature = <105000>; > +}; > + > +&wkup1_thermal { > + trips { > + wkup1_alert0: trip-point0 { > + temperature = <70000>; > + hysteresis = <2000>; > + type = "active"; > + }; > + > + wkup1_alert1: trip-point1 { > + temperature = <85000>; > + hysteresis = <2000>; > + type = "active"; > + }; > + }; > +}; > + > +&wkup_gpio_intr { > + status = "okay"; > +}; > + > +/* Aquila UART_2 */ > +&wkup_uart0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_wkup_uart0>; > + status = "disabled"; > +}; > + > +#include "k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi" > +#include "k3-j784s4-ti-ipc-firmware.dtsi" ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v1 2/3] arm64: dts: ti: Add Aquila AM69 Support 2025-11-04 17:41 ` Andrew Davis @ 2025-11-05 11:53 ` Francesco Dolcini 2025-11-05 20:01 ` Andrew Davis 0 siblings, 1 reply; 13+ messages in thread From: Francesco Dolcini @ 2025-11-05 11:53 UTC (permalink / raw) To: Andrew Davis Cc: Francesco Dolcini, Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Parth Pancholi, linux-arm-kernel, devicetree, linux-kernel, Emanuele Ghidoli, Ernest Van Hoecke, João Paulo Gonçalves, Francesco Dolcini Hello Andrew, thanks for the review On Tue, Nov 04, 2025 at 11:41:54AM -0600, Andrew Davis wrote: > On 11/4/25 8:52 AM, Francesco Dolcini wrote: > > From: Parth Pancholi <parth.pancholi@toradex.com> > > > > Add support for the Toradex Aquila AM69 and its Development Carrier > > Board. > > > > The Aquila AM69 SoM is based on the TI AM69 SoC from the Jacinto 7 > > family and is designed for high-end embedded computing, featuring up to > > 32GB of LPDDR4 and 256GB eMMC storage, extensive multimedia support (3x > > Quad CSI, 2x Quad DSI, DisplayPort, 5x Audio I2S/TDM), six Ethernet > > interfaces (1x 1G, 4x 2.5G SGMII, 1x 10G), USB 3.2 Host/DRD support, and > > a Wi-Fi 7/BT 5.3 module, alongside an RX8130 RTC, I2C EEPROM and > > Temperature Sensor, and optional TPM 2.0 module. > > > > Link: https://www.toradex.com/computer-on-modules/aquila-arm-family/ti-am69 > > Link: https://www.toradex.com/products/carrier-board/aquila-development-board-kit > > Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com> > > Co-developed-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> > > Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> > > Co-developed-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com> > > Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com> > > Co-developed-by: João Paulo Gonçalves <joao.goncalves@toradex.com> > > Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com> > > Co-developed-by: Francesco Dolcini <francesco.dolcini@toradex.com> > > Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> > > --- > > arch/arm64/boot/dts/ti/Makefile | 1 + > > arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts | 576 ++++++ > > arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi | 1840 +++++++++++++++++ > > 3 files changed, 2417 insertions(+) > > create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts > > create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi > > > > diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile > > index 361248dcfff4..6ce652fe98fa 100644 > > --- a/arch/arm64/boot/dts/ti/Makefile > > +++ b/arch/arm64/boot/dts/ti/Makefile > > @@ -153,6 +153,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo > > dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo > > # Boards with J784s4 SoC > > +dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dev.dtb > > dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb > > dtb-$(CONFIG_ARCH_K3) += k3-am69-sk-pcie0-ep.dtbo > > dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb > > diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts b/arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts > > new file mode 100644 > > index 000000000000..c7ce804eac70 > > --- /dev/null > > +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts > > @@ -0,0 +1,576 @@ > > +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT > > +/* > > + * Copyright (C) 2025 Toradex > > + * > > + * https://www.toradex.com/computer-on-modules/aquila-arm-family/ti-am69 > > + * https://www.toradex.com/products/carrier-board/aquila-development-board-kit > > + */ > > + > > +/dts-v1/; > > + > > +#include <dt-bindings/pwm/pwm.h> > > +#include "k3-am69-aquila.dtsi" > > + > > [...] > > > +/* Aquila SPI_2 */ > > +&main_spi0 { > > + status = "okay"; > > +}; > > + > > +/* Aquila SPI_1 */ > > +&main_spi2 { > > + status = "okay"; > > Why enable this with nothing connected to it? It's a development carrier board, the SPI pins go to a pins header, accessible to the user, where anything can be hooked up for prototyping/testing. One use case would be to just bind this in userspace to spidev for some prototyping/testing. > [...] > > > +/* Aquila SPI_1 */ > > +&main_spi2 { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_main_spi2>, <&pinctrl_main_spi2_cs0>; > > + status = "disabled"; > > This is already disabled by default in the SoC dtsi file. Yes, known. Is this an issue? This node must be disabled, no matter what is present in any included dtsi file, it's a deliberate decision. This dtsi file describes a SoM, the used pins/functions are defined on the pinout, but this node cannot be enabled unless the SoM is mated with a carrier board that is exposing it. Francesco ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v1 2/3] arm64: dts: ti: Add Aquila AM69 Support 2025-11-05 11:53 ` Francesco Dolcini @ 2025-11-05 20:01 ` Andrew Davis 2025-11-06 10:19 ` Francesco Dolcini 0 siblings, 1 reply; 13+ messages in thread From: Andrew Davis @ 2025-11-05 20:01 UTC (permalink / raw) To: Francesco Dolcini Cc: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Parth Pancholi, linux-arm-kernel, devicetree, linux-kernel, Emanuele Ghidoli, Ernest Van Hoecke, João Paulo Gonçalves, Francesco Dolcini On 11/5/25 5:53 AM, Francesco Dolcini wrote: > Hello Andrew, > thanks for the review > > On Tue, Nov 04, 2025 at 11:41:54AM -0600, Andrew Davis wrote: >> On 11/4/25 8:52 AM, Francesco Dolcini wrote: >>> From: Parth Pancholi <parth.pancholi@toradex.com> >>> >>> Add support for the Toradex Aquila AM69 and its Development Carrier >>> Board. >>> >>> The Aquila AM69 SoM is based on the TI AM69 SoC from the Jacinto 7 >>> family and is designed for high-end embedded computing, featuring up to >>> 32GB of LPDDR4 and 256GB eMMC storage, extensive multimedia support (3x >>> Quad CSI, 2x Quad DSI, DisplayPort, 5x Audio I2S/TDM), six Ethernet >>> interfaces (1x 1G, 4x 2.5G SGMII, 1x 10G), USB 3.2 Host/DRD support, and >>> a Wi-Fi 7/BT 5.3 module, alongside an RX8130 RTC, I2C EEPROM and >>> Temperature Sensor, and optional TPM 2.0 module. >>> >>> Link: https://www.toradex.com/computer-on-modules/aquila-arm-family/ti-am69 >>> Link: https://www.toradex.com/products/carrier-board/aquila-development-board-kit >>> Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com> >>> Co-developed-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> >>> Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> >>> Co-developed-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com> >>> Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com> >>> Co-developed-by: João Paulo Gonçalves <joao.goncalves@toradex.com> >>> Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com> >>> Co-developed-by: Francesco Dolcini <francesco.dolcini@toradex.com> >>> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> >>> --- >>> arch/arm64/boot/dts/ti/Makefile | 1 + >>> arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts | 576 ++++++ >>> arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi | 1840 +++++++++++++++++ >>> 3 files changed, 2417 insertions(+) >>> create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts >>> create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi >>> >>> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile >>> index 361248dcfff4..6ce652fe98fa 100644 >>> --- a/arch/arm64/boot/dts/ti/Makefile >>> +++ b/arch/arm64/boot/dts/ti/Makefile >>> @@ -153,6 +153,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo >>> dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo >>> # Boards with J784s4 SoC >>> +dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dev.dtb >>> dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb >>> dtb-$(CONFIG_ARCH_K3) += k3-am69-sk-pcie0-ep.dtbo >>> dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb >>> diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts b/arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts >>> new file mode 100644 >>> index 000000000000..c7ce804eac70 >>> --- /dev/null >>> +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts >>> @@ -0,0 +1,576 @@ >>> +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT >>> +/* >>> + * Copyright (C) 2025 Toradex >>> + * >>> + * https://www.toradex.com/computer-on-modules/aquila-arm-family/ti-am69 >>> + * https://www.toradex.com/products/carrier-board/aquila-development-board-kit >>> + */ >>> + >>> +/dts-v1/; >>> + >>> +#include <dt-bindings/pwm/pwm.h> >>> +#include "k3-am69-aquila.dtsi" >>> + >> >> [...] >> >>> +/* Aquila SPI_2 */ >>> +&main_spi0 { >>> + status = "okay"; >>> +}; >>> + >>> +/* Aquila SPI_1 */ >>> +&main_spi2 { >>> + status = "okay"; >> >> Why enable this with nothing connected to it? > > It's a development carrier board, the SPI pins go to a pins header, > accessible to the user, where anything can be hooked up for > prototyping/testing. > Sure, and when a device is attached to that pin header it will need described in DT with a node for that attached device and in that node/overlay is where you enable the nodes you make use of. > One use case would be to just bind this in userspace to spidev for some > prototyping/testing. > But you are not adding a spidev node here, you are attaching nothing but enabling the node anyway. > >> [...] >> >>> +/* Aquila SPI_1 */ >>> +&main_spi2 { >>> + pinctrl-names = "default"; >>> + pinctrl-0 = <&pinctrl_main_spi2>, <&pinctrl_main_spi2_cs0>; >>> + status = "disabled"; >> >> This is already disabled by default in the SoC dtsi file. > > Yes, known. Is this an issue? > > This node must be disabled, no matter what is present in any included > dtsi file, it's a deliberate decision. > > This dtsi file describes a SoM, the used pins/functions are defined on > the pinout, but this node cannot be enabled unless the SoM is mated with > a carrier board that is exposing it. Same as my point above, you shouldn't enable nodes that are not used or have anything attached. The SoM only has some edge connectors so it should not be enabled at the SoM level, that we seem to agree, but the carrier board doesn't connect those lines to anything either. They just run to a pin header with nothing attached, how is that header any different than the pins on the edge of the SoM? Anyway, the right spot to enable would be when you bind a device to the SPI, which it seems you do in overlays[0], so that would be were you set status = "okay" and all the pinmux info for that SPI device and carrier board combination. Andrew [0] https://developer.toradex.com/torizon/os-customization/use-cases/device-tree-overlays-on-torizon/#spidev > > Francesco > ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v1 2/3] arm64: dts: ti: Add Aquila AM69 Support 2025-11-05 20:01 ` Andrew Davis @ 2025-11-06 10:19 ` Francesco Dolcini 2025-11-06 13:32 ` Andrew Davis 2025-11-10 4:36 ` Vignesh Raghavendra 0 siblings, 2 replies; 13+ messages in thread From: Francesco Dolcini @ 2025-11-06 10:19 UTC (permalink / raw) To: Andrew Davis Cc: Francesco Dolcini, Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Parth Pancholi, linux-arm-kernel, devicetree, linux-kernel, Emanuele Ghidoli, Ernest Van Hoecke, João Paulo Gonçalves, Francesco Dolcini Hello Andrew, On Wed, Nov 05, 2025 at 02:01:35PM -0600, Andrew Davis wrote: > On 11/5/25 5:53 AM, Francesco Dolcini wrote: > > On Tue, Nov 04, 2025 at 11:41:54AM -0600, Andrew Davis wrote: > > > On 11/4/25 8:52 AM, Francesco Dolcini wrote: > > > > From: Parth Pancholi <parth.pancholi@toradex.com> > > > > > > > > Add support for the Toradex Aquila AM69 and its Development Carrier > > > > Board. > > > > > > > > The Aquila AM69 SoM is based on the TI AM69 SoC from the Jacinto 7 > > > > family and is designed for high-end embedded computing, featuring up to > > > > 32GB of LPDDR4 and 256GB eMMC storage, extensive multimedia support (3x > > > > Quad CSI, 2x Quad DSI, DisplayPort, 5x Audio I2S/TDM), six Ethernet > > > > interfaces (1x 1G, 4x 2.5G SGMII, 1x 10G), USB 3.2 Host/DRD support, and > > > > a Wi-Fi 7/BT 5.3 module, alongside an RX8130 RTC, I2C EEPROM and > > > > Temperature Sensor, and optional TPM 2.0 module. > > > > > > > > Link: https://www.toradex.com/computer-on-modules/aquila-arm-family/ti-am69 > > > > Link: https://www.toradex.com/products/carrier-board/aquila-development-board-kit > > > > Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com> > > > > Co-developed-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> > > > > Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> > > > > Co-developed-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com> > > > > Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com> > > > > Co-developed-by: João Paulo Gonçalves <joao.goncalves@toradex.com> > > > > Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com> > > > > Co-developed-by: Francesco Dolcini <francesco.dolcini@toradex.com> > > > > Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> > > > > --- > > > > arch/arm64/boot/dts/ti/Makefile | 1 + > > > > arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts | 576 ++++++ > > > > arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi | 1840 +++++++++++++++++ > > > > 3 files changed, 2417 insertions(+) > > > > create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts > > > > create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi > > > > > > > > diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile > > > > index 361248dcfff4..6ce652fe98fa 100644 > > > > --- a/arch/arm64/boot/dts/ti/Makefile > > > > +++ b/arch/arm64/boot/dts/ti/Makefile > > > > @@ -153,6 +153,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo > > > > dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo > > > > # Boards with J784s4 SoC > > > > +dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dev.dtb > > > > dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb > > > > dtb-$(CONFIG_ARCH_K3) += k3-am69-sk-pcie0-ep.dtbo > > > > dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb > > > > diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts b/arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts > > > > new file mode 100644 > > > > index 000000000000..c7ce804eac70 > > > > --- /dev/null > > > > +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts > > > > @@ -0,0 +1,576 @@ > > > > +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT > > > > +/* > > > > + * Copyright (C) 2025 Toradex > > > > + * > > > > + * https://www.toradex.com/computer-on-modules/aquila-arm-family/ti-am69 > > > > + * https://www.toradex.com/products/carrier-board/aquila-development-board-kit > > > > + */ > > > > + > > > > +/dts-v1/; > > > > + > > > > +#include <dt-bindings/pwm/pwm.h> > > > > +#include "k3-am69-aquila.dtsi" > > > > + > > > > > > [...] > > > > > > > +/* Aquila SPI_2 */ > > > > +&main_spi0 { > > > > + status = "okay"; > > > > +}; > > > > + > > > > +/* Aquila SPI_1 */ > > > > +&main_spi2 { > > > > + status = "okay"; > > > > > > Why enable this with nothing connected to it? > > > > It's a development carrier board, the SPI pins go to a pins header, > > accessible to the user, where anything can be hooked up for > > prototyping/testing. > > > > Sure, and when a device is attached to that pin header it will need > described in DT with a node for that attached device and in that > node/overlay is where you enable the nodes you make use of. > > > One use case would be to just bind this in userspace to spidev for some > > prototyping/testing. > > > > But you are not adding a spidev node here, you are attaching nothing > but enabling the node anyway. The idea would be that you can bind the spidev driver from userspace, without having to change anything in the DT. For this to be possible the SPI node must be enabled. My understanding is that this should be possible, and it's the suggested way to debug/prototype anything with spidev. If my understanding is not correct, I agree with you and there is no point in enabling this node. > > > [...] > > > > > > > +/* Aquila SPI_1 */ > > > > +&main_spi2 { > > > > + pinctrl-names = "default"; > > > > + pinctrl-0 = <&pinctrl_main_spi2>, <&pinctrl_main_spi2_cs0>; > > > > + status = "disabled"; > > > > > > This is already disabled by default in the SoC dtsi file. > > > > Yes, known. Is this an issue? > > > > This node must be disabled, no matter what is present in any included > > dtsi file, it's a deliberate decision. > > > > This dtsi file describes a SoM, the used pins/functions are defined on > > the pinout, but this node cannot be enabled unless the SoM is mated with > > a carrier board that is exposing it. > > Same as my point above, you shouldn't enable nodes that are not used > or have anything attached. The SoM only has some edge connectors so > it should not be enabled at the SoM level, that we seem to agree, but > the carrier board doesn't connect those lines to anything either. They > just run to a pin header with nothing attached, how is that header > any different than the pins on the edge of the SoM? You are commenting something unrelated here, or I am not understanding you. You commented that the status = "disabled" is redundant. We both agree that this node needs to be disabled in the SoM dtsi, and it is already like that. I would prefer to keep the redundant "disabled", because I see value on not having to rely on what is done on any included dtsi, where the original node is defined. I see this as a common pattern in multiple dts/dtsi file and is what I would prefer to have (and I do not see any kind of maintenance overhead on having it nor this being in conflict with dts-coding-style.rst). Vignesh, Nishanth, what is your expectation on this redundant `status = "disabled"` property? Francesco > Anyway, the right spot to enable would be when you bind a device to > the SPI, which it seems you do in overlays[0], so that would be were > you set status = "okay" and all the pinmux info for that SPI device > and carrier board combination. > > [0] https://developer.toradex.com/torizon/os-customization/use-cases/device-tree-overlays-on-torizon/#spidev ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v1 2/3] arm64: dts: ti: Add Aquila AM69 Support 2025-11-06 10:19 ` Francesco Dolcini @ 2025-11-06 13:32 ` Andrew Davis 2025-11-06 15:03 ` Francesco Dolcini 2025-11-10 4:36 ` Vignesh Raghavendra 1 sibling, 1 reply; 13+ messages in thread From: Andrew Davis @ 2025-11-06 13:32 UTC (permalink / raw) To: Francesco Dolcini Cc: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Parth Pancholi, linux-arm-kernel, devicetree, linux-kernel, Emanuele Ghidoli, Ernest Van Hoecke, João Paulo Gonçalves, Francesco Dolcini On 11/6/25 4:19 AM, Francesco Dolcini wrote: > Hello Andrew, > > On Wed, Nov 05, 2025 at 02:01:35PM -0600, Andrew Davis wrote: >> On 11/5/25 5:53 AM, Francesco Dolcini wrote: >>> On Tue, Nov 04, 2025 at 11:41:54AM -0600, Andrew Davis wrote: >>>> On 11/4/25 8:52 AM, Francesco Dolcini wrote: >>>>> From: Parth Pancholi <parth.pancholi@toradex.com> >>>>> >>>>> Add support for the Toradex Aquila AM69 and its Development Carrier >>>>> Board. >>>>> >>>>> The Aquila AM69 SoM is based on the TI AM69 SoC from the Jacinto 7 >>>>> family and is designed for high-end embedded computing, featuring up to >>>>> 32GB of LPDDR4 and 256GB eMMC storage, extensive multimedia support (3x >>>>> Quad CSI, 2x Quad DSI, DisplayPort, 5x Audio I2S/TDM), six Ethernet >>>>> interfaces (1x 1G, 4x 2.5G SGMII, 1x 10G), USB 3.2 Host/DRD support, and >>>>> a Wi-Fi 7/BT 5.3 module, alongside an RX8130 RTC, I2C EEPROM and >>>>> Temperature Sensor, and optional TPM 2.0 module. >>>>> >>>>> Link: https://www.toradex.com/computer-on-modules/aquila-arm-family/ti-am69 >>>>> Link: https://www.toradex.com/products/carrier-board/aquila-development-board-kit >>>>> Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com> >>>>> Co-developed-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> >>>>> Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> >>>>> Co-developed-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com> >>>>> Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com> >>>>> Co-developed-by: João Paulo Gonçalves <joao.goncalves@toradex.com> >>>>> Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com> >>>>> Co-developed-by: Francesco Dolcini <francesco.dolcini@toradex.com> >>>>> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> >>>>> --- >>>>> arch/arm64/boot/dts/ti/Makefile | 1 + >>>>> arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts | 576 ++++++ >>>>> arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi | 1840 +++++++++++++++++ >>>>> 3 files changed, 2417 insertions(+) >>>>> create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts >>>>> create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi >>>>> >>>>> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile >>>>> index 361248dcfff4..6ce652fe98fa 100644 >>>>> --- a/arch/arm64/boot/dts/ti/Makefile >>>>> +++ b/arch/arm64/boot/dts/ti/Makefile >>>>> @@ -153,6 +153,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo >>>>> dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo >>>>> # Boards with J784s4 SoC >>>>> +dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dev.dtb >>>>> dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb >>>>> dtb-$(CONFIG_ARCH_K3) += k3-am69-sk-pcie0-ep.dtbo >>>>> dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb >>>>> diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts b/arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts >>>>> new file mode 100644 >>>>> index 000000000000..c7ce804eac70 >>>>> --- /dev/null >>>>> +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts >>>>> @@ -0,0 +1,576 @@ >>>>> +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT >>>>> +/* >>>>> + * Copyright (C) 2025 Toradex >>>>> + * >>>>> + * https://www.toradex.com/computer-on-modules/aquila-arm-family/ti-am69 >>>>> + * https://www.toradex.com/products/carrier-board/aquila-development-board-kit >>>>> + */ >>>>> + >>>>> +/dts-v1/; >>>>> + >>>>> +#include <dt-bindings/pwm/pwm.h> >>>>> +#include "k3-am69-aquila.dtsi" >>>>> + >>>> >>>> [...] >>>> >>>>> +/* Aquila SPI_2 */ >>>>> +&main_spi0 { >>>>> + status = "okay"; >>>>> +}; >>>>> + >>>>> +/* Aquila SPI_1 */ >>>>> +&main_spi2 { >>>>> + status = "okay"; >>>> >>>> Why enable this with nothing connected to it? >>> >>> It's a development carrier board, the SPI pins go to a pins header, >>> accessible to the user, where anything can be hooked up for >>> prototyping/testing. >>> >> >> Sure, and when a device is attached to that pin header it will need >> described in DT with a node for that attached device and in that >> node/overlay is where you enable the nodes you make use of. >> >>> One use case would be to just bind this in userspace to spidev for some >>> prototyping/testing. >>> >> >> But you are not adding a spidev node here, you are attaching nothing >> but enabling the node anyway. > > The idea would be that you can bind the spidev driver from userspace, > without having to change anything in the DT. For this to be possible the > SPI node must be enabled. > > My understanding is that this should be possible, and it's the suggested > way to debug/prototype anything with spidev. If my understanding is not > correct, I agree with you and there is no point in enabling this node. > > >>>> [...] >>>> >>>>> +/* Aquila SPI_1 */ >>>>> +&main_spi2 { >>>>> + pinctrl-names = "default"; >>>>> + pinctrl-0 = <&pinctrl_main_spi2>, <&pinctrl_main_spi2_cs0>; >>>>> + status = "disabled"; >>>> >>>> This is already disabled by default in the SoC dtsi file. >>> >>> Yes, known. Is this an issue? >>> >>> This node must be disabled, no matter what is present in any included >>> dtsi file, it's a deliberate decision. >>> >>> This dtsi file describes a SoM, the used pins/functions are defined on >>> the pinout, but this node cannot be enabled unless the SoM is mated with >>> a carrier board that is exposing it. >> >> Same as my point above, you shouldn't enable nodes that are not used >> or have anything attached. The SoM only has some edge connectors so >> it should not be enabled at the SoM level, that we seem to agree, but >> the carrier board doesn't connect those lines to anything either. They >> just run to a pin header with nothing attached, how is that header >> any different than the pins on the edge of the SoM? > > You are commenting something unrelated here, or I am not understanding > you. Yes this was a bit of a tangent to the comment above. The point here was more on the pinmux, as a new carrier board might use these pins for something other than SPI, the pinmuxing shouldn't be done at the SoM dtsi level. Instead do it at the point the node is connected to some hardware on the carrier board in its DTS. > > You commented that the status = "disabled" is redundant. We both agree > that this node needs to be disabled in the SoM dtsi, and it is already > like that. > > I would prefer to keep the redundant "disabled", because I see value on > not having to rely on what is done on any included dtsi, where the > original node is defined. I see this as a common pattern in multiple > dts/dtsi file and is what I would prefer to have (and I do not see any > kind of maintenance overhead on having it nor this being in conflict > with dts-coding-style.rst). > We do make sure to disable nodes in base files that are incomplete and only enable them at the time they become complete. But if you have a strong preference for having this redundant status then I won't object. Andrew > Vignesh, Nishanth, what is your expectation on this redundant > `status = "disabled"` property? > > Francesco > > > >> Anyway, the right spot to enable would be when you bind a device to >> the SPI, which it seems you do in overlays[0], so that would be were >> you set status = "okay" and all the pinmux info for that SPI device >> and carrier board combination. >> >> [0] https://developer.toradex.com/torizon/os-customization/use-cases/device-tree-overlays-on-torizon/#spidev ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v1 2/3] arm64: dts: ti: Add Aquila AM69 Support 2025-11-06 13:32 ` Andrew Davis @ 2025-11-06 15:03 ` Francesco Dolcini 0 siblings, 0 replies; 13+ messages in thread From: Francesco Dolcini @ 2025-11-06 15:03 UTC (permalink / raw) To: Andrew Davis Cc: Francesco Dolcini, Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Parth Pancholi, linux-arm-kernel, devicetree, linux-kernel, Emanuele Ghidoli, Ernest Van Hoecke, João Paulo Gonçalves, Francesco Dolcini Hello Andrew, On Thu, Nov 06, 2025 at 07:32:44AM -0600, Andrew Davis wrote: > On 11/6/25 4:19 AM, Francesco Dolcini wrote: > > On Wed, Nov 05, 2025 at 02:01:35PM -0600, Andrew Davis wrote: > > > On 11/5/25 5:53 AM, Francesco Dolcini wrote: > > > > On Tue, Nov 04, 2025 at 11:41:54AM -0600, Andrew Davis wrote: > > > > > On 11/4/25 8:52 AM, Francesco Dolcini wrote: ... > > > > > > +/* Aquila SPI_1 */ > > > > > > +&main_spi2 { > > > > > > + pinctrl-names = "default"; > > > > > > + pinctrl-0 = <&pinctrl_main_spi2>, <&pinctrl_main_spi2_cs0>; > > > > > > + status = "disabled"; > > > > > > > > > > This is already disabled by default in the SoC dtsi file. > > > > > > > > Yes, known. Is this an issue? > > > > > > > > This node must be disabled, no matter what is present in any included > > > > dtsi file, it's a deliberate decision. > > > > > > > > This dtsi file describes a SoM, the used pins/functions are defined on > > > > the pinout, but this node cannot be enabled unless the SoM is mated with > > > > a carrier board that is exposing it. > > > > > > Same as my point above, you shouldn't enable nodes that are not used > > > or have anything attached. The SoM only has some edge connectors so > > > it should not be enabled at the SoM level, that we seem to agree, but > > > the carrier board doesn't connect those lines to anything either. They > > > just run to a pin header with nothing attached, how is that header > > > any different than the pins on the edge of the SoM? > > > > You are commenting something unrelated here, or I am not understanding > > you. > > Yes this was a bit of a tangent to the comment above. The point here > was more on the pinmux, as a new carrier board might use these pins > for something other than SPI, the pinmuxing shouldn't be done at the > SoM dtsi level. Instead do it at the point the node is connected to > some hardware on the carrier board in its DTS. Our SoM implements a specific pinout, with well defined functions, therefore the functionality of the pin is defined at the SoM level [1]. [1] https://docs1.toradex.com/116801-aquila_family_specification.pdf page 13, 14, 15 Francesco ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v1 2/3] arm64: dts: ti: Add Aquila AM69 Support 2025-11-06 10:19 ` Francesco Dolcini 2025-11-06 13:32 ` Andrew Davis @ 2025-11-10 4:36 ` Vignesh Raghavendra 2025-11-10 9:47 ` Francesco Dolcini 1 sibling, 1 reply; 13+ messages in thread From: Vignesh Raghavendra @ 2025-11-10 4:36 UTC (permalink / raw) To: Francesco Dolcini, Andrew Davis Cc: Nishanth Menon, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Parth Pancholi, linux-arm-kernel, devicetree, linux-kernel, Emanuele Ghidoli, Ernest Van Hoecke, João Paulo Gonçalves, Francesco Dolcini Hi Francesco, On 06/11/25 15:49, Francesco Dolcini wrote: >>> Yes, known. Is this an issue? >>> >>> This node must be disabled, no matter what is present in any included >>> dtsi file, it's a deliberate decision. >>> >>> This dtsi file describes a SoM, the used pins/functions are defined on >>> the pinout, but this node cannot be enabled unless the SoM is mated with >>> a carrier board that is exposing it. >> Same as my point above, you shouldn't enable nodes that are not used >> or have anything attached. The SoM only has some edge connectors so >> it should not be enabled at the SoM level, that we seem to agree, but >> the carrier board doesn't connect those lines to anything either. They >> just run to a pin header with nothing attached, how is that header >> any different than the pins on the edge of the SoM? > You are commenting something unrelated here, or I am not understanding > you. > > You commented that the status = "disabled" is redundant. We both agree > that this node needs to be disabled in the SoM dtsi, and it is already > like that. > > I would prefer to keep the redundant "disabled", because I see value on > not having to rely on what is done on any included dtsi, where the > original node is defined. One can always reverse compile the DTB to see if a node is enabled or not. > I see this as a common pattern in multiple > dts/dtsi file and is what I would prefer to have (and I do not see any > kind of maintenance overhead on having it nor this being in conflict > with dts-coding-style.rst). I cannot seem to find any precedence to such a pattern (adding status = "disabled" for nodes that are already disabled at SoC level dtsi.) Could you point me to some? > > Vignesh, Nishanth, what is your expectation on this redundant > `status = "disabled"` property? > Assuming such pattern exists, please add a note in the commit message in the next version. > Francesco > -- Regards Vignesh https://ti.com/opensource ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v1 2/3] arm64: dts: ti: Add Aquila AM69 Support 2025-11-10 4:36 ` Vignesh Raghavendra @ 2025-11-10 9:47 ` Francesco Dolcini 0 siblings, 0 replies; 13+ messages in thread From: Francesco Dolcini @ 2025-11-10 9:47 UTC (permalink / raw) To: Vignesh Raghavendra Cc: Francesco Dolcini, Andrew Davis, Nishanth Menon, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Parth Pancholi, linux-arm-kernel, devicetree, linux-kernel, Emanuele Ghidoli, Ernest Van Hoecke, João Paulo Gonçalves, Francesco Dolcini Hi Vignesh, On Mon, Nov 10, 2025 at 10:06:58AM +0530, Vignesh Raghavendra wrote: > On 06/11/25 15:49, Francesco Dolcini wrote: > >>> Yes, known. Is this an issue? > >>> > >>> This node must be disabled, no matter what is present in any included > >>> dtsi file, it's a deliberate decision. > >>> > >>> This dtsi file describes a SoM, the used pins/functions are defined on > >>> the pinout, but this node cannot be enabled unless the SoM is mated with > >>> a carrier board that is exposing it. > >> Same as my point above, you shouldn't enable nodes that are not used > >> or have anything attached. The SoM only has some edge connectors so > >> it should not be enabled at the SoM level, that we seem to agree, but > >> the carrier board doesn't connect those lines to anything either. They > >> just run to a pin header with nothing attached, how is that header > >> any different than the pins on the edge of the SoM? > > You are commenting something unrelated here, or I am not understanding > > you. > > > > You commented that the status = "disabled" is redundant. We both agree > > that this node needs to be disabled in the SoM dtsi, and it is already > > like that. > > > > I would prefer to keep the redundant "disabled", because I see value on > > not having to rely on what is done on any included dtsi, where the > > original node is defined. > > > One can always reverse compile the DTB to see if a node is enabled or not. Sure. My reason for having it explicitly disabled here is not to have to depend on anything that is happening on the included dtsi on this regard, given that we really want those disabled in the SoM. See for example https://lore.kernel.org/all/20251015111344.3639415-1-s-vadapalli@ti.com/ where you can see that our verdin am62 was not impacted by this change at all. To me this is just a benefit, without any drawback. > > I see this as a common pattern in multiple > > dts/dtsi file and is what I would prefer to have (and I do not see any > > kind of maintenance overhead on having it nor this being in conflict > > with dts-coding-style.rst). > > I cannot seem to find any precedence to such a pattern (adding status = > "disabled" for nodes that are already disabled at SoC level dtsi.) Could > you point me to some? Just a couple of examples, you can easily find more if needed k3-am62-verdin.dtsi:&main_spi1 nxp/imx/imx6qdl-phytec-phycore-som.dtsi:&fec > > Vignesh, Nishanth, what is your expectation on this redundant > > `status = "disabled"` property? > > > > Assuming such pattern exists, please add a note in the commit message in > the next version. With that said, it's a small thing, if you prefer me to change it just let me know and I'll send a v2 with this changed. Vignesh: do you prefer a v2 with a mention in the commit message on the `disabled` node, or that I just get rid of those? Anything else that you spotted on this patch and that should be changed? Francesco ^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v1 3/3] arm64: dts: ti: am69-aquila: Add Clover 2025-11-04 14:52 ` [PATCH v1 1/3] dt-bindings: arm: ti: add Toradex Aquila AM69 Francesco Dolcini 2025-11-04 14:52 ` [PATCH v1 2/3] arm64: dts: ti: Add Aquila AM69 Support Francesco Dolcini @ 2025-11-04 14:52 ` Francesco Dolcini 2025-11-04 17:20 ` [PATCH v1 1/3] dt-bindings: arm: ti: add Toradex Aquila AM69 Conor Dooley 2 siblings, 0 replies; 13+ messages in thread From: Francesco Dolcini @ 2025-11-04 14:52 UTC (permalink / raw) To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley Cc: João Paulo Gonçalves, linux-arm-kernel, devicetree, linux-kernel, Francesco Dolcini From: João Paulo Gonçalves <joao.goncalves@toradex.com> Add support for Aquila AM69 mated with Clover carrier board. Link: https://www.toradex.com/computer-on-modules/aquila-arm-family/ti-am69 Link: https://www.toradex.com/products/carrier-board/clover Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> --- arch/arm64/boot/dts/ti/Makefile | 1 + .../boot/dts/ti/k3-am69-aquila-clover.dts | 451 ++++++++++++++++++ 2 files changed, 452 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am69-aquila-clover.dts diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 6ce652fe98fa..38a93b689fe7 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -153,6 +153,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-csi2-quad-tevi-ov5640.dtbo # Boards with J784s4 SoC +dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-clover.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-aquila-dev.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb dtb-$(CONFIG_ARCH_K3) += k3-am69-sk-pcie0-ep.dtbo diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila-clover.dts b/arch/arm64/boot/dts/ti/k3-am69-aquila-clover.dts new file mode 100644 index 000000000000..55fd214a82e4 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila-clover.dts @@ -0,0 +1,451 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (C) 2025 Toradex + * + * https://www.toradex.com/computer-on-modules/aquila-arm-family/ti-am69 + * https://www.toradex.com/products/carrier-board/clover + */ + +/dts-v1/; + +#include <dt-bindings/pwm/pwm.h> +#include "k3-am69-aquila.dtsi" + +/ { + model = "Toradex Aquila AM69 on Clover Board"; + compatible = "toradex,aquila-am69-clover", + "toradex,aquila-am69", + "ti,j784s4"; + + aliases { + eeprom1 = &carrier_eeprom; + }; + + reg_3v3_dp: regulator-3v3-dp { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_21_dp>; + /* Aquila GPIO_21_DP (AQUILA B57) */ + gpio = <&main_gpio0 37 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "DP_3V3"; + startup-delay-us = <10000>; + }; + + /* Aquila DP_1 */ + dp-connector { + compatible = "dp-connector"; + dp-pwr-supply = <®_3v3_dp>; + label = "Display Port"; + type = "full-size"; + + port { + dp_connector_in: endpoint { + remote-endpoint = <&dp0_out>; + }; + }; + }; +}; + +/* On-module ETH_1 MDIO */ +&davinci_mdio { + status = "okay"; +}; + +&dp0_ports { + port@4 { + reg = <4>; + dp0_out: endpoint { + remote-endpoint = <&dp_connector_in>; + }; + }; +}; + +&dss { + status = "okay"; +}; + +&main0_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&main0_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&main0_alert1>; + }; + }; +}; + +&main1_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&main1_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&main1_alert1>; + }; + }; +}; + +&main2_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&main2_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&main2_alert1>; + }; + }; +}; + +&main3_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&main3_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&main3_alert1>; + }; + }; +}; + +&main4_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&main4_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&main4_alert1>; + }; + }; +}; + +/* Aquila ETH_2 */ +&main_cpsw0 { + status = "okay"; +}; + +/* Aquila ETH_2 SGMII PHY */ +&main_cpsw0_port8 { + phy-handle = <&cpsw0_port8_phy4>; + status = "okay"; +}; + +/* Aquila ETH_2_XGMII_MDIO */ +&main_cpsw0_mdio { + status = "okay"; + + cpsw0_port8_phy4: ethernet-phy@4 { + reg = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_eth2_int>; + interrupt-parent = <&main_gpio0>; + interrupts = <44 IRQ_TYPE_EDGE_FALLING>; + }; +}; + +/* Aquila PWM_1 */ +&main_ehrpwm0 { + status = "okay"; +}; + +/* Aquila PWM_2 */ +&main_ehrpwm1 { + status = "okay"; +}; + +&main_gpio0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_01>, /* Aquila GPIO_01 */ + <&pinctrl_gpio_02>, /* Aquila GPIO_02 */ + <&pinctrl_gpio_03>; /* Aquila GPIO_03 */ +}; + +/* Aquila I2C_6 */ +&main_i2c5 { + status = "okay"; +}; + +/* Aquila CAN_1 */ +&main_mcan10 { + status = "okay"; +}; + +/* Aquila CAN_3 */ +&main_mcan13 { + status = "okay"; +}; + +/* Aquila SD_1 */ +&main_sdhci1 { + status = "okay"; +}; + +/* Aquila SPI_2 */ +&main_spi0 { + status = "okay"; +}; + +/* Aquila SPI_1 */ +&main_spi2 { + pinctrl-0 = <&pinctrl_main_spi2>, + <&pinctrl_main_spi2_cs0>, + <&pinctrl_gpio_05>; + cs-gpios = <0>, <&wkup_gpio0 29 GPIO_ACTIVE_LOW>; + status = "okay"; + + tpm@1 { + compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; + reg = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_06>; + interrupt-parent = <&wkup_gpio0>; + interrupts = <30 IRQ_TYPE_EDGE_FALLING>; + spi-max-frequency = <18500000>; + }; +}; + +/* Aquila UART_1 */ +&main_uart4 { + status = "okay"; +}; + +/* Aquila UART_3, used as the Linux console */ +&main_uart8 { + status = "okay"; +}; + +&mcu_cpsw { + status = "okay"; +}; + +/* On-module ETH_1 RGMII */ +&mcu_cpsw_port1 { + status = "okay"; +}; + +/* Aquila I2C_1 */ +&mcu_i2c0 { + clock-frequency = <100000>; + status = "okay"; + + fan_controller: fan@18 { + compatible = "ti,amc6821"; + reg = <0x18>; + #pwm-cells = <2>; + + fan: fan { + cooling-levels = <102 179 255>; + #cooling-cells = <2>; + pwms = <&fan_controller 40000 PWM_POLARITY_INVERTED>; + }; + }; + + temperature-sensor@4f { + compatible = "ti,tmp1075"; + reg = <0x4f>; + }; + + /* USB-C OTG (TCPC USB PD PHY) */ + tcpc@52 { + compatible = "nxp,ptn5110", "tcpci"; + reg = <0x52>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb1_int>; + interrupt-parent = <&main_gpio0>; + interrupts = <28 IRQ_TYPE_EDGE_FALLING>; + + connector { + compatible = "usb-c-connector"; + data-role = "dual"; + label = "USB-C OTG"; + power-role = "dual"; + try-power-role = "sink"; + self-powered; + source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; + sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; + op-sink-microwatt = <1000000>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usb_1_con_hs: endpoint { + remote-endpoint = <&usb0_hs>; + }; + }; + + port@1 { + reg = <1>; + + usb_1_con_ss: endpoint { + remote-endpoint = <&usb0_ss_mux>; + }; + }; + }; + }; + }; + + carrier_eeprom: eeprom@57 { + compatible = "st,24c02", "atmel,24c02"; + reg = <0x57>; + pagesize = <16>; + }; +}; + +/* Aquila I2C_2 */ +&mcu_i2c1 { + status = "okay"; +}; + +/* Aquila CAN_2 */ +&mcu_mcan0 { + status = "okay"; +}; + +/* Aquila CAN_4 */ +&mcu_mcan1 { + status = "okay"; +}; + +/* Aquila UART_4 */ +&mcu_uart0 { + status = "okay"; +}; + +&mhdp { + status = "okay"; +}; + +/* Aquila QSPI_1 */ +&ospi0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mcu_ospi0_4bit>, <&pinctrl_mcu_ospi0_cs0>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <66000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + cdns,read-delay = <0>; + cdns,tchsh-ns = <3>; + cdns,tsd2d-ns = <10>; + cdns,tshsl-ns = <30>; + cdns,tslch-ns = <8>; + }; +}; + +/* Aquila PCIE_1 */ +&pcie0_rc { + status = "okay"; +}; + +/* Aquila PCIE_2 */ +&pcie1_rc { + status = "okay"; +}; + +&serdes2 { + status = "okay"; +}; + +&serdes4 { + status = "okay"; +}; + +&serdes_wiz2 { + status = "okay"; +}; + +&serdes_wiz4 { + status = "okay"; +}; + +/* Aquila ADC_[1-4] */ +&tscadc0 { + status = "okay"; +}; + +&usbss0 { + status = "okay"; +}; + +&usb0ss_mux { + status = "okay"; + + port { + usb0_ss_mux: endpoint { + remote-endpoint = <&usb_1_con_ss>; + }; + }; +}; + +&usb0 { + status = "okay"; + + port { + usb0_hs: endpoint { + remote-endpoint = <&usb_1_con_hs>; + }; + }; +}; + +&wkup0_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&wkup0_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&wkup0_alert1>; + }; + }; +}; + +&wkup1_thermal { + cooling-maps { + map0 { + cooling-device = <&fan 1 1>; + trip = <&wkup1_alert0>; + }; + + map1 { + cooling-device = <&fan 2 2>; + trip = <&wkup1_alert1>; + }; + }; +}; + +&wkup_gpio0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_04>; /* Aquila GPIO_04 */ +}; + +/* Aquila UART_2 */ +&wkup_uart0 { + status = "okay"; +}; -- 2.47.3 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH v1 1/3] dt-bindings: arm: ti: add Toradex Aquila AM69 2025-11-04 14:52 ` [PATCH v1 1/3] dt-bindings: arm: ti: add Toradex Aquila AM69 Francesco Dolcini 2025-11-04 14:52 ` [PATCH v1 2/3] arm64: dts: ti: Add Aquila AM69 Support Francesco Dolcini 2025-11-04 14:52 ` [PATCH v1 3/3] arm64: dts: ti: am69-aquila: Add Clover Francesco Dolcini @ 2025-11-04 17:20 ` Conor Dooley 2 siblings, 0 replies; 13+ messages in thread From: Conor Dooley @ 2025-11-04 17:20 UTC (permalink / raw) To: Francesco Dolcini Cc: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring, Krzysztof Kozlowski, Conor Dooley, João Paulo Gonçalves, linux-arm-kernel, devicetree, linux-kernel, Francesco Dolcini [-- Attachment #1: Type: text/plain, Size: 737 bytes --] On Tue, Nov 04, 2025 at 03:52:35PM +0100, Francesco Dolcini wrote: > From: João Paulo Gonçalves <joao.goncalves@toradex.com> > > Add DT compatible strings for the Toradex Aquila AM69 SoM and its > supported carrier boards: the Aquila Development Board and the Clover > carrier board. > > Link: https://www.toradex.com/computer-on-modules/aquila-arm-family/ti-am69 > Link: https://www.toradex.com/products/carrier-board/aquila-development-board-kit > Link: https://www.toradex.com/products/carrier-board/clover > Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com> > Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> pw-bot: not-applicable [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] ^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2025-11-10 9:47 UTC | newest] Thread overview: 13+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2025-11-04 14:49 [PATCH v1 0/3] arm64: dts: ti: Add Aquila AM69 Support Francesco Dolcini 2025-11-04 14:52 ` [PATCH v1 1/3] dt-bindings: arm: ti: add Toradex Aquila AM69 Francesco Dolcini 2025-11-04 14:52 ` [PATCH v1 2/3] arm64: dts: ti: Add Aquila AM69 Support Francesco Dolcini 2025-11-04 17:41 ` Andrew Davis 2025-11-05 11:53 ` Francesco Dolcini 2025-11-05 20:01 ` Andrew Davis 2025-11-06 10:19 ` Francesco Dolcini 2025-11-06 13:32 ` Andrew Davis 2025-11-06 15:03 ` Francesco Dolcini 2025-11-10 4:36 ` Vignesh Raghavendra 2025-11-10 9:47 ` Francesco Dolcini 2025-11-04 14:52 ` [PATCH v1 3/3] arm64: dts: ti: am69-aquila: Add Clover Francesco Dolcini 2025-11-04 17:20 ` [PATCH v1 1/3] dt-bindings: arm: ti: add Toradex Aquila AM69 Conor Dooley
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