Re: [PATCH v5 2/2] iio: adc: Add the NXP SAR ADC support for the s32g2/3 platforms

Andy Shevchenko
2025-10-31T12:45:35Z

On Fri, Oct 31, 2025 at 12:32:03PM +0100, Daniel Lezcano wrote:
> On 10/30/25 10:28, Andy Shevchenko wrote:
> > On Thu, Oct 30, 2025 at 09:27:21AM +0100, Daniel Lezcano wrote:
> > > On 10/18/25 22:12, Andy Shevchenko wrote:
> > > > On Fri, Oct 17, 2025 at 06:42:38PM +0200, Daniel Lezcano wrote:

[ ... ]

> > > > > + dma_samples = (u32 *)dma_buf->buf;
> > > >
> > > > Is it aligned properly for this type of casting?
> > >
> > > TBH, I don't know the answer :/
> > >
> > > How can I check that ?
> >
> > Is buf defined as a pointer to u32 / int or bigger? or is it just byte buffer?
> > If the latter, how does the address of it being formed? Does it come from a heap
> > (memory allocator)? If yes, we are fine, as this is usually the case for all
> > (k)malloc'ed memory.
>
> buf is a byte buffer allocated with dmam_alloc_coherent(..., GFP_KERNEL)

We are fine :-)

...

> > > > > + dmaengine_tx_status(info->dma_chan, info->cookie, &state);
> > > >
> > > > No return value check?
> > >
> > > The return value is not necessary here because the caller of the callback
> > > will check with dma_submit_error() in case of error which covers the
> > > DMA_ERROR case and the other cases are not useful because the residue is
> > > taken into account right after.
> >
> > In some cases it might return DMA_PAUSE (and actually this is the correct way
> > to get residue, one needs to pause the channel to read it, otherwise it will
> > give outdated / incorrect information).
>
> But if the residue is checked in the callback routine without checking
> DMA_PAUSED, the result is the same no ?

DMA in some corner cases might have already be charged for the next transfer.
Do you have a synchronisation between DMA start and residue check?

I.o.w. this may work for your case, but in general it's not guaranteed. The proper
read of residue is to: pause DMA --> read residue --> resume DMA.

--
With Best Regards,
Andy Shevchenko