From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CB2C71C84DC; Sun, 9 Nov 2025 15:08:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762700934; cv=none; b=MOwzVuL3kbnSUslvfwYOm5rYfvmwUblsbxXNt+l9VrwU7br0S0XRQQDL0RGRCLOGJIodZfjz/BlUo00xOXjsz5QIPt0y0Vns8dG0ObesTDyXFQ42pwd5TSKOIUQR5nLM+JADoNFYrJBkF2cmHtPvN7zrkyWKHSNX+O5k8ZP0c4Q= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762700934; c=relaxed/simple; bh=UsiRGVkkiN8UxPf6zagckvEmaIPz91rtZ6xa8MBMRjY=; h=Date:From:To:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=MsjJHKjtsEV9UQbpQxr26V+ki+sTbZ+n+C3LITkVvpFH8co3tcBshHjBkljRRCh3vjPKNXZ0VYKLq8KMtPO9O7MzfebUtxnSF0DMoDgq5bKdP+D+hb6O6ReuwJrxtCyH1x+FVAQ3A5ndIDnxsLw/LGfVkjCGtMSW8nnE3mjRLcY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=jVgzaT62; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="jVgzaT62" Received: by smtp.kernel.org (Postfix) with ESMTPSA id EB105C4CEF8; Sun, 9 Nov 2025 15:08:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1762700934; bh=UsiRGVkkiN8UxPf6zagckvEmaIPz91rtZ6xa8MBMRjY=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=jVgzaT62BeuiE95+q8cRtVX4MIDhLS9H6ljBrxfe3qu9H+iBS1l+wUEtg1/iswda9 G+KU5hSe8K/3WxiPDrO3qwu+JZuUrXdaIZGViZ1fzSHXTAdUY/ycwmWQtTG/cDLJmj 3anF6J/o9puA6SJsUp9CWTirxoBOjRbZmLTC6g5pqrMG55AlaeBrLjlRBVwjqsdWQR w5eLT65XDwRbf49W5ur8qyhR6skr85b5h+tWn084DEStI/TeQGzTyN1GWDwRBPXWve 9w7558vYs6anJWhkd3Cds3QhAkjYqGQ3M37IO/Dd6AaqsOLxjkRodYUetYr03E2vc5 knFK9VkoxwFKg== Date: Sun, 9 Nov 2025 15:08:46 +0000 From: Jonathan Cameron To: "Herve Codina (Schneider Electric)" Cc: Wolfram Sang , David Lechner , Nuno =?UTF-8?B?U8Oh?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Liam Girdwood , Mark Brown , linux-iio@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Pascal Eberhard , Miquel Raynal , Thomas Petazzoni Subject: Re: [PATCH v3 0/4] Add support for the Renesas RZ/N1 ADC Message-ID: <20251109150846.25c7ae49@jic23-huawei> In-Reply-To: <20251103141834.71677-1-herve.codina@bootlin.com> References: <20251103141834.71677-1-herve.codina@bootlin.com> X-Mailer: Claws Mail 4.3.1 (GTK 3.24.51; x86_64-pc-linux-gnu) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On Mon, 3 Nov 2025 15:18:30 +0100 "Herve Codina (Schneider Electric)" wrote: > Hi, >=20 > The Renesas RZ/N1 ADC controller is the ADC controller available in the > Renesas RZ/N1 SoCs family. >=20 > It can use up to two internal ADC cores (ADC1 and ADC2) those internal > cores are handled through ADC controller virtual channels. >=20 > Best regards, > Herve Codina >=20 > Changes v2 -> v3: >=20 Applied 1-2,4 to the togreg branch of iio.git. A little bit of merge noise due to another Renesas ADC driver being added recently, but only in Makefile / Kconfig so hopefully I didn't mess up merging them. > v2: https://lore.kernel.org/lkml/20251029144644.667561-1-herve.codina@boo= tlin.com/ >=20 > Patch 1: > - Add 'Reviewed-by: Rob Herring'. >=20 > Patch 2: > - Add missing header files. > - Use fixed-width values for register definitions. > - Split comments and remove a redundant 'else'. > - Return the error in the 'switch case' default statement. > - Leave a trailing comma in struct iio_info. > - Move *_vref_mv to *_vref_mV. > - Split the DEFINE_RUNTIME_DEV_PM_OPS(). > - Update error code handling in rzn1_adc_core_get_regulators(). > - Pass rzn1_adc in platform_set_drvdata(), update suspend/resume > function accordingly. > - Add 'Reviewed-by: Nuno S=C3=A1' >=20 > Patches 3 and 4: > No change. >=20 > Changes v1 -> v2: >=20 > v1: https://lore.kernel.org/lkml/20251015142816.1274605-1-herve.codina@bo= otlin.com/ >=20 > Rebase on top of v6.18-rc3 to have commit db82b8dbf5f0 ("PM: runtime: > Fix conditional guard definitions") >=20 > Patch 1: > - Remove unneeded 'dependencies' part. > - Rename "adc-clk" clock to "adc". > - Move 'additionalProperties: false' just before the example. > - Use const instead of enum for the "renesas,r9a06g032-adc" > compatible string. > - Fix the ACD typo. >=20 > Patch 2: > - Fix the ACD typo. > - Rename "adc-clk" clock to "adc". > - Update included headers and sort them. > - Align register definitions at the same column. > - Inline the FIELD_GET() instead of having macros. > - Introduce RZN1_ADC_NO_CHANNEL > - Get Vref voltage value at probe(). > - Remove the bitmap in rzn1_adc_set_iio_dev_channels(). > - Use dev_err_probe() in rzn1_adc_set_iio_dev_channels(). > - Use auto-cleanup variant for PM runtime "resume and get". > - Use scoped_guard() for mutex. > - Use devm_mutex_init(). > - Use the fixed "rzn1-adc" string for indio_dev->name. > - Use DEFINE_RUNTIME_DEV_PM_OPS(). > - Fix rzn1_adc_of_match table and remove of_match_ptr(). > - Add a comment related to decoupling between IIO chans and ADC1 or > ADC2 core chans > - Update and add several comments related to ADC core usage and the > relationship with ADC core regulator presence. > - Remove clocks and regulators handling from PM runtime > suspend()/remove(). > - Simplify the driver removing the no more relevant struct > rzn1_adc_core. >=20 > Patch 3: > - Rename "adc-clk" clock to "adc". > - Add 'Reviewed-by: Wolfram Sang' >=20 > Patch 4 > - Removed the linux-iio list >=20 > Herve Codina (Schneider Electric) (4): > dt-bindings: iio: adc: Add the Renesas RZ/N1 ADC > iio: adc: Add support for the Renesas RZ/N1 ADC > ARM: dts: renesas: r9a06g032: Add the ADC device > MAINTAINERS: Add the Renesas RZ/N1 ADC driver entry >=20 > .../bindings/iio/adc/renesas,rzn1-adc.yaml | 111 ++++ > MAINTAINERS | 7 + > arch/arm/boot/dts/renesas/r9a06g032.dtsi | 10 + > drivers/iio/adc/Kconfig | 10 + > drivers/iio/adc/Makefile | 1 + > drivers/iio/adc/rzn1-adc.c | 490 ++++++++++++++++++ > 6 files changed, 629 insertions(+) > create mode 100644 Documentation/devicetree/bindings/iio/adc/renesas,rzn= 1-adc.yaml > create mode 100644 drivers/iio/adc/rzn1-adc.c >=20