From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3B53C3074B1; Mon, 10 Nov 2025 11:10:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762773010; cv=none; b=mgy4dhaOpd7pP+FhZlmQZH8KBwCxoqDVdMsZbQ4PQrnABNORBP5EVizmNsCHeFtWyA4gX1J0tJE4jIk3zr4orYRq4xbkcsUl0Lg+20s7K8zBvOJ2/vsQkis5ezKZ5wlh369tYg3mmunaV7nST7Zu1689ZwjcevIuGx2vrT1F0x4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762773010; c=relaxed/simple; bh=zljtQnS+2Qz4N9Z49g+pp/nzPcJ7uvBhD0RAnySzk5E=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=K+Sd3uFaWVbCNabBFSnbbF5LgnDU4fIAUhUU9YjCMbS6LWlA0nCZnGYKCOCzx8x6jBKl+5pwpWQIlQmJpgvt6NHnp74p2mLHRt4Z5OtoKaoUIHD+kPS+aAyI2bMNMczAd1GTbi0WXBt2MYYFqYhZdq2YSI7Ckc3coHEbNJieJBI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Mon, 10 Nov 2025 19:09:56 +0800 Received: from [127.0.1.1] (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Mon, 10 Nov 2025 19:09:56 +0800 From: Jacky Chou Date: Mon, 10 Nov 2025 19:09:25 +0800 Subject: [PATCH net-next v4 1/4] dt-bindings: net: ftgmac100: Add delay properties for AST2600 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20251110-rgmii_delay_2600-v4-1-5cad32c766f7@aspeedtech.com> References: <20251110-rgmii_delay_2600-v4-0-5cad32c766f7@aspeedtech.com> In-Reply-To: <20251110-rgmii_delay_2600-v4-0-5cad32c766f7@aspeedtech.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Po-Yu Chuang , Joel Stanley , Andrew Jeffery CC: , , , , , , Jacky Chou X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1762772996; l=3254; i=jacky_chou@aspeedtech.com; s=20251031; h=from:subject:message-id; bh=zljtQnS+2Qz4N9Z49g+pp/nzPcJ7uvBhD0RAnySzk5E=; b=JF/pagcrYhTK7ZxwYyIybgm7E89Z7QEgnZQWmY/UkmSNk5GZp7n5T8Ktt+zlxasLZ++nuKyhZ 86jGvJ8v9ClBUkOONO01GguRXOmbbisez7+OpQG9VQRPW8lC0VwjDpF X-Developer-Key: i=jacky_chou@aspeedtech.com; a=ed25519; pk=8XBx7KFM1drEsfCXTH9QC2lbMlGU4XwJTA6Jt9Mabdo= The AST2600 contains two dies, each with its own MAC, and these MACs require different delay configurations. Previously, these delay values were configured during the bootloader stage rather than in the driver. This change introduces the use of the standard properties defined in ethernet-controller.yaml to configure the delay values directly in the driver. Add the new property, "aspeed,rgmii-delay-ps", to specify per step of RGMII delay in different MACs. And for Aspeed platform, the total steps of RGMII delay configuraion is 32 steps, so the total delay is "apseed,rgmii-delay-ps' * 32. Default delay values are declared so that tx-internal-delay-ps and rx-internal-delay-ps become optional. If these properties are not present, the driver will use the default values instead. Add conditional schema constraints for Aspeed AST2600 MAC controllers: - For MAC0/1, aspeed,rgmii-delay-ps property is 45 ps - For MAC2/3, aspeed,rgmii-delay-ps property is 250 ps - Both require the "aspeed,scu" and "aspeed,rgmii-delay-ps" properties. Other compatible values remain unrestricted. Signed-off-by: Jacky Chou --- .../devicetree/bindings/net/faraday,ftgmac100.yaml | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/Documentation/devicetree/bindings/net/faraday,ftgmac100.yaml b/Documentation/devicetree/bindings/net/faraday,ftgmac100.yaml index d14410018bcf..66377cff737f 100644 --- a/Documentation/devicetree/bindings/net/faraday,ftgmac100.yaml +++ b/Documentation/devicetree/bindings/net/faraday,ftgmac100.yaml @@ -69,6 +69,36 @@ properties: mdio: $ref: /schemas/net/mdio.yaml# + aspeed,scu: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the SCU (System Control Unit) syscon node for Aspeed platform. + This reference is used by the MAC controller to configure the RGMII delays. + + aspeed,rgmii-delay-ps: + description: + Speccify the one step for RGMII delay. In AST2600, MAC0 and MAC1 are 45 ps, + MAC2 and MAC3 are 250 ps. + type: integer + + rx-internal-delay-ps: + description: + RGMII Receive Clock Delay defined in pico seconds. There are 32 + steps of RGMII delay for Aspeed platform. According to the + aspeed,delay-ps to specify the one step delay, the total delay is + calculated by aspeed,delay-ps * 32. A value of 0 ps will disable any + delay. The Default is no delay. + default: 0 + + tx-internal-delay-ps: + description: + RGMII Transmit Clock Delay defined in pico seconds. There are 32 + steps of RGMII delay for Aspeed platform. According to the + aspeed,delay-ps to specify the one step delay, the total delay is + calculated by aspeed,delay-ps * 32. A value of 0 ps will disable any + delay. The Default is no delay. + default: 0 + required: - compatible - reg @@ -85,6 +115,11 @@ allOf: then: properties: resets: true + rx-internal-delay-ps: true + tx-internal-delay-ps: true + required: + - aspeed,rgmii-delay-ps + - aspeed,scu else: properties: resets: false -- 2.34.1