* [PATCH v8 1/5] media: dt-bindings: nxp,imx8mq-mipi-csi2: Add i.MX8ULP compatible string
2025-11-13 10:27 [PATCH v8 0/5] Add MIPI CSI-2 support for i.MX8ULP Guoniu Zhou
@ 2025-11-13 10:27 ` Guoniu Zhou
2025-11-13 10:27 ` [PATCH v8 2/5] media: imx8mq-mipi-csi2: Use devm_clk_bulk_get_all() to fetch clocks Guoniu Zhou
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Guoniu Zhou @ 2025-11-13 10:27 UTC (permalink / raw)
To: Rui Miguel Silva, Laurent Pinchart, Martin Kepplinger,
Purism Kernel Team, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, Philipp Zabel, Frank Li
Cc: linux-media, devicetree, imx, linux-arm-kernel, linux-kernel,
Guoniu Zhou, Conor Dooley
From: Guoniu Zhou <guoniu.zhou@nxp.com>
The CSI-2 receiver in the i.MX8ULP is almost identical to the version
present in the i.MX8QXP/QM, but i.MX8ULP CSI-2 controller needs pclk
clock as the input clock for its APB interface of Control and Status
register(CSR). So add compatible string fsl,imx8ulp-mipi-csi2 and
increase maxItems of Clocks (clock-names) to 4 from 3. And keep the
same restriction for existing compatible.
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com>
---
.../bindings/media/nxp,imx8mq-mipi-csi2.yaml | 49 +++++++++++++++++++---
1 file changed, 43 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml
index 3389bab266a9adbda313c8ad795b998641df12f3..4fcfc4fd35651e0cd6e80b97cc0b12301b65b684 100644
--- a/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml
+++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml
@@ -20,6 +20,7 @@ properties:
- enum:
- fsl,imx8mq-mipi-csi2
- fsl,imx8qxp-mipi-csi2
+ - fsl,imx8ulp-mipi-csi2
- items:
- const: fsl,imx8qm-mipi-csi2
- const: fsl,imx8qxp-mipi-csi2
@@ -39,12 +40,16 @@ properties:
clock that the RX DPHY receives.
- description: ui is the pixel clock (phy_ref up to 333Mhz).
See the reference manual for details.
+ - description: pclk is clock for csr APB interface.
+ minItems: 3
clock-names:
items:
- const: core
- const: esc
- const: ui
+ - const: pclk
+ minItems: 3
power-domains:
maxItems: 1
@@ -130,21 +135,53 @@ allOf:
compatible:
contains:
enum:
- - fsl,imx8qxp-mipi-csi2
+ - fsl,imx8mq-mipi-csi2
+ then:
+ properties:
+ reg:
+ maxItems: 1
+ resets:
+ minItems: 3
+ clocks:
+ maxItems: 3
+ clock-names:
+ maxItems: 3
+ required:
+ - fsl,mipi-phy-gpr
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: fsl,imx8qxp-mipi-csi2
then:
properties:
reg:
minItems: 2
resets:
maxItems: 1
- else:
+ clocks:
+ maxItems: 3
+ clock-names:
+ maxItems: 3
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - fsl,imx8ulp-mipi-csi2
+ then:
properties:
reg:
- maxItems: 1
+ minItems: 2
resets:
- minItems: 3
- required:
- - fsl,mipi-phy-gpr
+ minItems: 2
+ maxItems: 2
+ clocks:
+ minItems: 4
+ clock-names:
+ minItems: 4
additionalProperties: false
--
2.34.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH v8 2/5] media: imx8mq-mipi-csi2: Use devm_clk_bulk_get_all() to fetch clocks
2025-11-13 10:27 [PATCH v8 0/5] Add MIPI CSI-2 support for i.MX8ULP Guoniu Zhou
2025-11-13 10:27 ` [PATCH v8 1/5] media: dt-bindings: nxp,imx8mq-mipi-csi2: Add i.MX8ULP compatible string Guoniu Zhou
@ 2025-11-13 10:27 ` Guoniu Zhou
2025-11-13 10:27 ` [PATCH v8 3/5] media: imx8mq-mipi-csi2: Explicitly release reset Guoniu Zhou
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Guoniu Zhou @ 2025-11-13 10:27 UTC (permalink / raw)
To: Rui Miguel Silva, Laurent Pinchart, Martin Kepplinger,
Purism Kernel Team, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, Philipp Zabel, Frank Li
Cc: linux-media, devicetree, imx, linux-arm-kernel, linux-kernel,
Guoniu Zhou
From: Guoniu Zhou <guoniu.zhou@nxp.com>
Use devm_clk_bulk_get_all() helper to simplify clock handle code.
No functional changes intended.
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com>
---
drivers/media/platform/nxp/imx8mq-mipi-csi2.c | 57 ++++++++++-----------------
1 file changed, 20 insertions(+), 37 deletions(-)
diff --git a/drivers/media/platform/nxp/imx8mq-mipi-csi2.c b/drivers/media/platform/nxp/imx8mq-mipi-csi2.c
index 371b4e81328c107269f89da23818ab0abd0179da..40db2676bade94e8e750381b1237fd02aee9d0ed 100644
--- a/drivers/media/platform/nxp/imx8mq-mipi-csi2.c
+++ b/drivers/media/platform/nxp/imx8mq-mipi-csi2.c
@@ -71,21 +71,6 @@ enum {
ST_SUSPENDED = 4,
};
-enum imx8mq_mipi_csi_clk {
- CSI2_CLK_CORE,
- CSI2_CLK_ESC,
- CSI2_CLK_UI,
- CSI2_NUM_CLKS,
-};
-
-static const char * const imx8mq_mipi_csi_clk_id[CSI2_NUM_CLKS] = {
- [CSI2_CLK_CORE] = "core",
- [CSI2_CLK_ESC] = "esc",
- [CSI2_CLK_UI] = "ui",
-};
-
-#define CSI2_NUM_CLKS ARRAY_SIZE(imx8mq_mipi_csi_clk_id)
-
struct imx8mq_plat_data {
int (*enable)(struct csi_state *state, u32 hs_settle);
void (*disable)(struct csi_state *state);
@@ -111,7 +96,9 @@ struct csi_state {
struct device *dev;
const struct imx8mq_plat_data *pdata;
void __iomem *regs;
- struct clk_bulk_data clks[CSI2_NUM_CLKS];
+ struct clk_bulk_data *clks;
+ struct clk *esc_clk;
+ u32 num_clks;
struct reset_control *rst;
struct regulator *mipi_phy_regulator;
@@ -384,24 +371,16 @@ static void imx8mq_mipi_csi_set_params(struct csi_state *state)
CSI2RX_SEND_LEVEL);
}
-static int imx8mq_mipi_csi_clk_enable(struct csi_state *state)
-{
- return clk_bulk_prepare_enable(CSI2_NUM_CLKS, state->clks);
-}
-
-static void imx8mq_mipi_csi_clk_disable(struct csi_state *state)
+static struct clk *find_esc_clk(struct csi_state *state)
{
- clk_bulk_disable_unprepare(CSI2_NUM_CLKS, state->clks);
-}
-
-static int imx8mq_mipi_csi_clk_get(struct csi_state *state)
-{
- unsigned int i;
+ int i;
- for (i = 0; i < CSI2_NUM_CLKS; i++)
- state->clks[i].id = imx8mq_mipi_csi_clk_id[i];
+ for (i = 0; i < state->num_clks; i++) {
+ if (!strcmp(state->clks[i].id, "esc"))
+ return state->clks[i].clk;
+ }
- return devm_clk_bulk_get(state->dev, CSI2_NUM_CLKS, state->clks);
+ return ERR_PTR(-ENODEV);
}
static int imx8mq_mipi_csi_calc_hs_settle(struct csi_state *state,
@@ -456,7 +435,7 @@ static int imx8mq_mipi_csi_calc_hs_settle(struct csi_state *state,
* documentation recommends picking a value away from the boundaries.
* Let's pick the average.
*/
- esc_clk_rate = clk_get_rate(state->clks[CSI2_CLK_ESC].clk);
+ esc_clk_rate = clk_get_rate(state->esc_clk);
if (!esc_clk_rate) {
dev_err(state->dev, "Could not get esc clock rate.\n");
return -EINVAL;
@@ -783,7 +762,7 @@ static void imx8mq_mipi_csi_pm_suspend(struct device *dev)
if (state->state & ST_POWERED) {
imx8mq_mipi_csi_stop_stream(state);
- imx8mq_mipi_csi_clk_disable(state);
+ clk_bulk_disable_unprepare(state->num_clks, state->clks);
state->state &= ~ST_POWERED;
}
@@ -801,7 +780,7 @@ static int imx8mq_mipi_csi_pm_resume(struct device *dev)
if (!(state->state & ST_POWERED)) {
state->state |= ST_POWERED;
- ret = imx8mq_mipi_csi_clk_enable(state);
+ ret = clk_bulk_prepare_enable(state->num_clks, state->clks);
}
if (state->state & ST_STREAMING) {
sd_state = v4l2_subdev_lock_and_get_active_state(sd);
@@ -1027,9 +1006,13 @@ static int imx8mq_mipi_csi_probe(struct platform_device *pdev)
if (IS_ERR(state->regs))
return PTR_ERR(state->regs);
- ret = imx8mq_mipi_csi_clk_get(state);
- if (ret < 0)
- return ret;
+ state->num_clks = devm_clk_bulk_get_all(dev, &state->clks);
+ if (state->num_clks < 0)
+ return dev_err_probe(dev, state->num_clks, "Failed to get clocks\n");
+
+ state->esc_clk = find_esc_clk(state);
+ if (IS_ERR(state->esc_clk))
+ return dev_err_probe(dev, PTR_ERR(state->esc_clk), "Couldn't find esc clock\n");
platform_set_drvdata(pdev, &state->sd);
--
2.34.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH v8 3/5] media: imx8mq-mipi-csi2: Explicitly release reset
2025-11-13 10:27 [PATCH v8 0/5] Add MIPI CSI-2 support for i.MX8ULP Guoniu Zhou
2025-11-13 10:27 ` [PATCH v8 1/5] media: dt-bindings: nxp,imx8mq-mipi-csi2: Add i.MX8ULP compatible string Guoniu Zhou
2025-11-13 10:27 ` [PATCH v8 2/5] media: imx8mq-mipi-csi2: Use devm_clk_bulk_get_all() to fetch clocks Guoniu Zhou
@ 2025-11-13 10:27 ` Guoniu Zhou
2025-11-13 10:27 ` [PATCH v8 4/5] media: imx8mq-mipi-csi2: Add support for i.MX8ULP Guoniu Zhou
2025-11-13 10:27 ` [PATCH v8 5/5] arm64: dts: imx8ulp: Add CSI and ISI Nodes Guoniu Zhou
4 siblings, 0 replies; 6+ messages in thread
From: Guoniu Zhou @ 2025-11-13 10:27 UTC (permalink / raw)
To: Rui Miguel Silva, Laurent Pinchart, Martin Kepplinger,
Purism Kernel Team, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, Philipp Zabel, Frank Li
Cc: linux-media, devicetree, imx, linux-arm-kernel, linux-kernel,
Guoniu Zhou
From: Guoniu Zhou <guoniu.zhou@nxp.com>
Call reset_control_deassert() to explicitly release reset to make sure
reset bits are cleared since platform like i.MX8ULP can't clear reset
bits automatically.
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com>
---
drivers/media/platform/nxp/imx8mq-mipi-csi2.c | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/media/platform/nxp/imx8mq-mipi-csi2.c b/drivers/media/platform/nxp/imx8mq-mipi-csi2.c
index 40db2676bade94e8e750381b1237fd02aee9d0ed..05fa17e48fce428e7be95ebffa645c2e6dd0e36a 100644
--- a/drivers/media/platform/nxp/imx8mq-mipi-csi2.c
+++ b/drivers/media/platform/nxp/imx8mq-mipi-csi2.c
@@ -338,18 +338,14 @@ static int imx8mq_mipi_csi_sw_reset(struct csi_state *state)
{
int ret;
- /*
- * these are most likely self-clearing reset bits. to make it
- * more clear, the reset-imx7 driver should implement the
- * .reset() operation.
- */
ret = reset_control_assert(state->rst);
if (ret < 0) {
dev_err(state->dev, "Failed to assert resets: %d\n", ret);
return ret;
}
- return 0;
+ /* Explicitly release reset to make sure reset bits are cleared. */
+ return reset_control_deassert(state->rst);
}
static void imx8mq_mipi_csi_set_params(struct csi_state *state)
--
2.34.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH v8 4/5] media: imx8mq-mipi-csi2: Add support for i.MX8ULP
2025-11-13 10:27 [PATCH v8 0/5] Add MIPI CSI-2 support for i.MX8ULP Guoniu Zhou
` (2 preceding siblings ...)
2025-11-13 10:27 ` [PATCH v8 3/5] media: imx8mq-mipi-csi2: Explicitly release reset Guoniu Zhou
@ 2025-11-13 10:27 ` Guoniu Zhou
2025-11-13 10:27 ` [PATCH v8 5/5] arm64: dts: imx8ulp: Add CSI and ISI Nodes Guoniu Zhou
4 siblings, 0 replies; 6+ messages in thread
From: Guoniu Zhou @ 2025-11-13 10:27 UTC (permalink / raw)
To: Rui Miguel Silva, Laurent Pinchart, Martin Kepplinger,
Purism Kernel Team, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, Philipp Zabel, Frank Li
Cc: linux-media, devicetree, imx, linux-arm-kernel, linux-kernel,
Guoniu Zhou
From: Guoniu Zhou <guoniu.zhou@nxp.com>
The CSI-2 receiver in i.MX8ULP is almost same as i.MX8QXP/QM except
clocks and resets, so add compatible string for i.MX8ULP to handle
the difference and reuse platform data of i.MX8QXP/QM.
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com>
---
drivers/media/platform/nxp/imx8mq-mipi-csi2.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/media/platform/nxp/imx8mq-mipi-csi2.c b/drivers/media/platform/nxp/imx8mq-mipi-csi2.c
index 05fa17e48fce428e7be95ebffa645c2e6dd0e36a..f0bcb2baeabf2805f947ba92e5366438cc1d5ce9 100644
--- a/drivers/media/platform/nxp/imx8mq-mipi-csi2.c
+++ b/drivers/media/platform/nxp/imx8mq-mipi-csi2.c
@@ -1074,6 +1074,7 @@ static void imx8mq_mipi_csi_remove(struct platform_device *pdev)
static const struct of_device_id imx8mq_mipi_csi_of_match[] = {
{ .compatible = "fsl,imx8mq-mipi-csi2", .data = &imx8mq_data },
{ .compatible = "fsl,imx8qxp-mipi-csi2", .data = &imx8qxp_data },
+ { .compatible = "fsl,imx8ulp-mipi-csi2", .data = &imx8qxp_data },
{ /* sentinel */ },
};
MODULE_DEVICE_TABLE(of, imx8mq_mipi_csi_of_match);
--
2.34.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH v8 5/5] arm64: dts: imx8ulp: Add CSI and ISI Nodes
2025-11-13 10:27 [PATCH v8 0/5] Add MIPI CSI-2 support for i.MX8ULP Guoniu Zhou
` (3 preceding siblings ...)
2025-11-13 10:27 ` [PATCH v8 4/5] media: imx8mq-mipi-csi2: Add support for i.MX8ULP Guoniu Zhou
@ 2025-11-13 10:27 ` Guoniu Zhou
4 siblings, 0 replies; 6+ messages in thread
From: Guoniu Zhou @ 2025-11-13 10:27 UTC (permalink / raw)
To: Rui Miguel Silva, Laurent Pinchart, Martin Kepplinger,
Purism Kernel Team, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, Philipp Zabel, Frank Li
Cc: linux-media, devicetree, imx, linux-arm-kernel, linux-kernel,
Guoniu Zhou
From: Guoniu Zhou <guoniu.zhou@nxp.com>
The CSI-2 in the i.MX8ULP is almost identical to the version present
in the i.MX8QXP/QM and is routed to the ISI. Add both the ISI and CSI
nodes and mark them as disabled by default since capture is dependent
on an attached camera.
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 67 ++++++++++++++++++++++++++++++
1 file changed, 67 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index 13b01f3aa2a4950c37e72e04f6bfb5995dc19178..99271d55dfb60ed2cbfe664d928be179eb257674 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -7,6 +7,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/imx8ulp-power.h>
+#include <dt-bindings/reset/imx8ulp-pcc-reset.h>
#include <dt-bindings/thermal/thermal.h>
#include "imx8ulp-pinfunc.h"
@@ -842,6 +843,72 @@ spdif: spdif@2dab0000 {
dma-names = "rx", "tx";
status = "disabled";
};
+
+ isi: isi@2dac0000 {
+ compatible = "fsl,imx8ulp-isi";
+ reg = <0x2dac0000 0x10000>;
+ interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pcc5 IMX8ULP_CLK_ISI>,
+ <&cgc2 IMX8ULP_CLK_LPAV_AXI_DIV>;
+ clock-names = "axi", "apb";
+ power-domains = <&scmi_devpd IMX8ULP_PD_ISI>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ isi_in: endpoint {
+ remote-endpoint = <&mipi_csi_out>;
+ };
+ };
+ };
+ };
+
+ mipi_csi: csi@2daf0000 {
+ compatible = "fsl,imx8ulp-mipi-csi2";
+ reg = <0x2daf0000 0x10000>,
+ <0x2dad0000 0x10000>;
+ clocks = <&pcc5 IMX8ULP_CLK_CSI>,
+ <&pcc5 IMX8ULP_CLK_CSI_CLK_ESC>,
+ <&pcc5 IMX8ULP_CLK_CSI_CLK_UI>,
+ <&pcc5 IMX8ULP_CLK_CSI_REGS>;
+ clock-names = "core", "esc", "ui", "pclk";
+ assigned-clocks = <&pcc5 IMX8ULP_CLK_CSI>,
+ <&pcc5 IMX8ULP_CLK_CSI_CLK_ESC>,
+ <&pcc5 IMX8ULP_CLK_CSI_CLK_UI>,
+ <&pcc5 IMX8ULP_CLK_CSI_REGS>;
+ assigned-clock-parents = <&cgc2 IMX8ULP_CLK_PLL4_PFD1_DIV1>,
+ <&cgc2 IMX8ULP_CLK_PLL4_PFD1_DIV2>,
+ <&cgc2 IMX8ULP_CLK_PLL4_PFD0_DIV1>;
+ assigned-clock-rates = <200000000>,
+ <80000000>,
+ <100000000>,
+ <79200000>;
+ power-domains = <&scmi_devpd IMX8ULP_PD_MIPI_CSI>;
+ resets = <&pcc5 PCC5_CSI_SWRST>,
+ <&pcc5 PCC5_CSI_REGS_SWRST>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csi_out: endpoint {
+ remote-endpoint = <&isi_in>;
+ };
+ };
+ };
+ };
};
gpiod: gpio@2e200000 {
--
2.34.1
^ permalink raw reply related [flat|nested] 6+ messages in thread