From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BEE1A2C0287; Thu, 13 Nov 2025 05:43:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=92.121.34.13 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763012593; cv=none; b=rZpo0tPVg/LC9zyFMCHYsBdpZCNTfGjL3UrVsj9ikPQybkDF8WSZ5e4dA3mnoYvdr2siPgya4hrzlsZYWuRi8i7OPz3zid45COEWHH6apodnOVIPc+65sxHjpWStDD4HKOLkBCOLH0iBoBB8zQ+GXVn+cS0E8VQ2hMRFz9e6MhY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763012593; c=relaxed/simple; bh=jOxd00r+YwWXv1MXTgcYRx4BSLk5Y60wWxXG9PQxRZU=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=FcsmXrgV1nEyqaq6IFLVLyQPjQ2GDMmQx7rUtiazv0l6n3TIcwtaY2a+yivvPYSeJCS0Nj09BElelliZNUTYSZulr2TAgh92NPbQIwg3m0nr4qwgGWNKUC5E4mV1BlVWQUIYgKSMOT/VuijbInX6lM28j2nidJSvMdr+Kq00xKA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com; spf=pass smtp.mailfrom=nxp.com; arc=none smtp.client-ip=92.121.34.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nxp.com Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id A901C1A1AA3; Thu, 13 Nov 2025 06:42:59 +0100 (CET) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 731C51A3AAF; Thu, 13 Nov 2025 06:42:59 +0100 (CET) Received: from lsv03900.swis.in-blr01.nxp.com (lsv03900.swis.in-blr01.nxp.com [10.12.177.15]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 456CC18000A0; Thu, 13 Nov 2025 13:42:58 +0800 (+08) From: Lakshay Piplani To: alexandre.belloni@bootlin.com, linux-rtc@vger.kernel.org, linux-kernel@vger.kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org Cc: pankit.garg@nxp.com, vikash.bansal@nxp.com, priyanka.jain@nxp.com, shashank.rebbapragada@nxp.com, Lakshay Piplani Subject: [PATCH v6 1/2] dt-bindings: rtc: Add pcf85053 support Date: Thu, 13 Nov 2025 11:12:42 +0530 Message-Id: <20251113054243.4045820-1-lakshay.piplani@nxp.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Virus-Scanned: ClamAV using ClamSMTP Add device tree bindings for NXP PCF85053 RTC chip. Signed-off-by: Pankit Garg Signed-off-by: Lakshay Piplani --- V5 -> V6: - Dropped driver-specific commentary from property descriptions. - Simplified and clarified descriptions for better readability. V4 -> V5: - Updated schema validation logic to enforce correct combinations of 'nxp,interface' and 'nxp,write-access' using oneOf clauses. - Refined property descriptions for clarity and hardware alignment. V3 -> V4: Add dedicated nxp,pcf85053.yaml. Remove entry from trivial-rtc.yaml. V2 -> V3: Moved MAINTAINERS file changes to the driver patch V1 -> V2: Handled dt-bindings by trivial-rtc.yaml .../devicetree/bindings/rtc/nxp,pcf85053.yaml | 114 ++++++++++++++++++ 1 file changed, 114 insertions(+) create mode 100644 Documentation/devicetree/bindings/rtc/nxp,pcf85053.yaml diff --git a/Documentation/devicetree/bindings/rtc/nxp,pcf85053.yaml b/Documentation/devicetree/bindings/rtc/nxp,pcf85053.yaml new file mode 100644 index 000000000000..81cfceabc04c --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/nxp,pcf85053.yaml @@ -0,0 +1,114 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2025 NXP +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/nxp,pcf85053.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP PCF85053 Real Time Clock + +maintainers: + - Pankit Garg + - Lakshay Piplani + +properties: + compatible: + enum: + - nxp,pcf85053 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + nxp,interface: + $ref: /schemas/types.yaml#/definitions/string + enum: [ primary, secondary ] + description: | + Identifies this host's logical role in a multi-host topology for the + PCF85053 RTC. The device exposes a "TWO" ownership bit in the CTRL + register that gates which host may write time/alarm registers. + - "primary": Designated host that *may* claim write ownership (set + CTRL.TWO=1) **if** write-access is explicitly requested. + - "secondary": Peer host that writes only when CTRL.TWO=0 (default). + + This property determines the intended role of the host in relation to + the write ownership. + + The actual role depends on whether 'nxp,write-access' is also specified. + Supported configurations are:- + 1. Primary with 'nxp,write-access' -> primary claims write ownership. + 2. Primary without 'nxp,write-access' -> primary is ready only; secondary may write. + 3. Secondary (must not specify 'nxp,write-access') -> Secondary writes only + when no primary claims ownership. + + nxp,write-access: + type: boolean + description: | + Indicates that write ownership of the PCF85053 RTC should be claimed by setting + CTRL.TWO=1. This property is only valid when acting as the primary interface + (nxp,interface="primary"). + +required: + - compatible + - reg + - nxp,interface + +additionalProperties: false + +allOf: + - $ref: rtc.yaml# + - if: + properties: + nxp,interface: + const: secondary + then: + not: + required: [ "nxp,write-access" ] + +examples: + # Single host example. + - | + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + rtc@6f { + compatible = "nxp,pcf85053"; + reg = <0x6f>; + nxp,interface = "primary"; + nxp,write-access; + interrupt-parent = <&gpio2>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + }; + }; + + # Dual-host example: one primary that claims writes; one secondary that never claims writes. + - | + #include + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + rtc@6f { + compatible = "nxp,pcf85053"; + reg = <0x6f>; + nxp,interface = "primary"; + nxp,write-access; + interrupt-parent = <&gpio2>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + }; + }; + + i2c1 { + #address-cells = <1>; + #size-cells = <0>; + + rtc@6f { + compatible = "nxp,pcf85053"; + reg = <0x6f>; + nxp,interface = "secondary"; + }; + }; -- 2.25.1