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Fri, 14 Nov 2025 05:38:11 -0800 (PST) Received: from SMW024614.wbi.nxp.com ([128.77.115.158]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b734fedb2cfsm385330666b.71.2025.11.14.05.38.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Nov 2025 05:38:10 -0800 (PST) From: Laurentiu Mihalcea To: Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Fabio Estevam , Philipp Zabel , Daniel Baluta , Shengjiu Wang , Frank Li Cc: devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Pengutronix Kernel Team Subject: [PATCH v5 0/6] Add support for i.MX8ULP's SIM LPAV Date: Fri, 14 Nov 2025 05:37:32 -0800 Message-ID: <20251114133738.1762-1-laurentiumihalcea111@gmail.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Laurentiu Mihalcea The LPAV System Integration Module (SIM) is an IP found inside i.MX8ULP's LPAV subsystem, which offers clock gating, reset line assertion/de-assertion, and various other misc. options. This series adds support for the IP by introducing a new clock HW provider driver and by modifying i.MX8MP's AUDIOMIX block control reset driver to allow it to be used for i.MX8ULP's SIM LPAV as well. This series is a spin-off from [1]. [1]: https://lore.kernel.org/lkml/20240922174225.75948-1-laurentiumihalcea111@gmail.com/ --- Changes in v5: * drop patches that were already picked up by Philipp/Abel. * include the "bits.h" header. * replace mask with bit index. * link to v4: https://lore.kernel.org/lkml/20251104120301.913-1-laurentiumihalcea111@gmail.com/ Changes in v4: * shorten commit message for patch 5 * drop base from "struct imx8mp_audiomix_reset" and use local variable * imx8mp_audiomix_reset_get_regmap() now takes "struct imx8mp_audiomix_reset *" as its argument instead of a "struct device *" * use base pointer as the data argument for devm_add_action_or_reset() * shorten commit message for patch 6 * drop regmap field from "struct clk_imx8ulp_sim_lpav_data", use local variable and let devres manage it * drop base field from "struct clk_imx8ulp_sim_lpav_data", use local variable and let devres manage it. * CONFIG_CLK_IMX8ULP now selects CONFIG_AUXILIARY_BUS, which is needed for devm_auxiliary_device_create(). * drop static definition of "struct regmap_config" and change to using local one in the clock driver. * link to v3: https://lore.kernel.org/lkml/20251029135229.890-1-laurentiumihalcea111@gmail.com/ Changes in v3: * rename "lpav_bus", "hifi_core", and "hifi_plat" to "bus", "core", "plat" * don't assign the "name" field of "struct clk_parent_data". Previously, we were assigning the local parent name to this field, which wouldn't have worked anyways if, for whatever reason, the fallback mechanism would kick in. * replace the whole auxiliary reset driver creation chunk by a single devm_auxiliary_device_create() call. * replace the "shift" field from "struct imx8mp_reset_map" with the usage of ffs() * shorten commit description for patch 6 * cast "id->driver_data" to "void *" instead of the previous "const struct imx8mp_reset_info *", which makes the line shorter. * open question resulting from Peng Fan's comment on V2: how to access interconnect QoS registers? do we need to model the sim_lpav as an interconnect provider as well or is it fine to have another interconnect provider that references the sim_lpav node and accesses its registers via regmap (dev_get_regmap(), specifically, NOT syscon). * link to v2: https://lore.kernel.org/lkml/20251017112025.11997-1-laurentiumihalcea111@gmail.com/ Changes in v2: * drop redundant description for "#clock-cells"/"#reset-cells" properties from binding * make "mux-controller" and "#reset-cells" properties mandatory * add "mux-controller" child to binding example node * drop the compatiblity with syscon - this was never actually needed and it was done to allow using "mmio-mux", which requires a syscon parent * modify the auxiliary reset driver to use regmap - this will allow the mux controller, clock control and reset control APIs to use the same spinlock. * rename "imx8ulp-reset-sim-lpav.h" to "fsl,imx8ulp-sim-lpav.h" * drop the "IMX8ULP_CLK_SIM_LPAV_END" macro, which doesn't belong to the binding headers * fix the values of "IMX8MP_AUDIOMIX_EARC_RESET_MASK" and "IMX8MP_AUDIOMIX_EARC_PHY_RESET_MASK", which were previously incorrect * drop redundant macros from auxiliary reset driver - replace their occurrences with their values * squash the binding-related macro additions into the binding patch * add mux-controller child node to the sim_lpav node * make the "gates" array static * link to v1: https://lore.kernel.org/lkml/20250804155407.285353-1-laurentiumihalcea111@gmail.com/ --- Laurentiu Mihalcea (6): reset: imx8mp-audiomix: Drop unneeded macros reset: imx8mp-audiomix: Replace mask with bit index reset: imx8mp-audiomix: Switch to using regmap API reset: imx8mp-audiomix: Extend the driver usage reset: imx8mp-audiomix: Support i.MX8ULP SIM LPAV arm64: dts: imx8ulp: add sim lpav node arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 17 +++ drivers/reset/reset-imx8mp-audiomix.c | 170 +++++++++++++++------ 2 files changed, 141 insertions(+), 46 deletions(-) -- 2.43.0