* [PATCH v7 0/3] spi: support the SpacemiT K1 SPI controller
@ 2025-11-14 18:57 Alex Elder
2025-11-14 18:57 ` [PATCH v7 1/3] dt-bindings: spi: add SpacemiT K1 SPI support Alex Elder
2025-11-14 18:57 ` [PATCH v7 3/3] riscv: dts: spacemit: define a SPI controller node Alex Elder
0 siblings, 2 replies; 3+ messages in thread
From: Alex Elder @ 2025-11-14 18:57 UTC (permalink / raw)
To: broonie, dlan
Cc: robh, krzk+dt, conor+dt, pjw, palmer, aou, alex, p.zabel,
devicetree, linux-spi, spacemit, linux-riscv, linux-kernel
This series adds support for the SPI controller found in the SpacemiT
K1 SoC. The driver currently supports only master mode. The controller
has two 32-entry FIFOs and supports PIO and DMA for transfers.
Version 7 fixes two bugs, and now builds the driver as a kernel module
by default.
(Note, this is a distinct series from the QSPI driver, which was
merged recently.)
-Alex
This series is available here:
https://github.com/riscstar/linux/tree/outgoing/spi-v7
Between version 6 and version 7:
- DIV_ROUND_UP_ULL() is now used when setting the speed, to address
two errors reported by the Intel kernel test robot on 32-bit builds
- Fixed a bug interpreting the resource pointer in k1_spi_dma_cleanup()
- The driver is now built as a module by default, if ARCH_SPACEMIT
is defined
Here is version 6 of this series:
https://lore.kernel.org/lkml/20251027125504.297033-1-elder@riscstar.com/
Between version 5 and version 6:
- Rebase only
Here is version 5 of this series:
https://lore.kernel.org/lkml/20251013123309.2252042-1-elder@riscstar.com/
Between version 4 and version 5:
- Added Yixun's Reviewed-by tag on patch 3
Here is version 4 of this series:
https://lore.kernel.org/lkml/20250925121714.2514932-1-elder@riscstar.com/
Between version 3 and version 4 (all suggested by Yixun):
- Fixed an underrun/overrun comment error
- Renamed a pinctrl node
- Formatted dmas and dma-names properties on one line
Here is version 3 of this series:
https://lore.kernel.org/lkml/20250922161717.1590690-1-elder@riscstar.com/
Between version 2 and version 3:
- Add Conor's Acked-by to patch 1
- Add Rob's Reviewed-by to patch 1
- Added imply_PDMA to the SPI_SPACEMIT_K1 Kconfig option
- Fixed a bug pointed out by Vivian (and Troy) in word-sized reads
- Added a comment stating we use 1, 2, or 4 bytes per word
- Cleaned up DMA channels properly in case of failure setting up
- No longer use devm_*() for allocating DMA channels or buffer
- Moved the SPI controller into the dma-bus memory region
Here is version 2 of this series:
https://lore.kernel.org/lkml/20250919155914.935608-1-elder@riscstar.com/
Between version 1 and version 2:
- Use enum rather than const for the binding compatible string
- Omit the label and status property in the binding example
- The spi-spacemit-k1.o make target is now added in sorted order
- The SPI_SPACEMIT_K1 config option is added in sorted order
- The SPI_SPACEMIT_K1 config does *not* depend on MMP_PDMA,
however MMP_PDMA is checked at runtime, and if not enabled,
DMA will not be used
- Read/modify/writes of registers no longer use an additional
"virt" variable to hold the address accessed
- The k1_spi_driver_data->ioaddr field has been renamed base
- The DMA address for the base address is maintained, rather than
saving the DMA address of the data register
- The spi-max-frequency property value is now bounds checked
- A local variable is now initialized to 0 in k1_spi_write_word()
- The driver name is now "k1-spi"
- DT aliases are used rather than spacemit,k1-ssp-id for bus number
- The order of two pin control properties was changed as requested
- Clock names and DMA names are now on one line in the "k1.dtsi"
- The interrupts property is used rather than interrupts-extended
- The order of two pin control properties was changed as requested
- Clock names and DMA names are now on one line in the "k1.dtsi"
- The interrupts property is used rather than interrupts-extended
Here is version 1 of this series:
https://lore.kernel.org/lkml/20250917220724.288127-1-elder@riscstar.com/
Alex Elder (3):
dt-bindings: spi: add SpacemiT K1 SPI support
spi: spacemit: introduce SpacemiT K1 SPI controller driver
riscv: dts: spacemit: define a SPI controller node
.../bindings/spi/spacemit,k1-spi.yaml | 84 ++
.../boot/dts/spacemit/k1-bananapi-f3.dts | 7 +
arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi | 20 +
arch/riscv/boot/dts/spacemit/k1.dtsi | 15 +
drivers/spi/Kconfig | 9 +
drivers/spi/Makefile | 1 +
drivers/spi/spi-spacemit-k1.c | 966 ++++++++++++++++++
7 files changed, 1102 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spacemit,k1-spi.yaml
create mode 100644 drivers/spi/spi-spacemit-k1.c
base-commit: 0f2995693867bfb26197b117cd55624ddc57582f
--
2.48.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH v7 1/3] dt-bindings: spi: add SpacemiT K1 SPI support
2025-11-14 18:57 [PATCH v7 0/3] spi: support the SpacemiT K1 SPI controller Alex Elder
@ 2025-11-14 18:57 ` Alex Elder
2025-11-14 18:57 ` [PATCH v7 3/3] riscv: dts: spacemit: define a SPI controller node Alex Elder
1 sibling, 0 replies; 3+ messages in thread
From: Alex Elder @ 2025-11-14 18:57 UTC (permalink / raw)
To: broonie, dlan
Cc: robh, krzk+dt, conor+dt, devicetree, linux-spi, spacemit,
linux-riscv, linux-kernel, Conor Dooley, Troy Mitchell
Add support for the SPI controller implemented by the SpacemiT K1 SoC.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Alex Elder <elder@riscstar.com>
---
.../bindings/spi/spacemit,k1-spi.yaml | 84 +++++++++++++++++++
1 file changed, 84 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spacemit,k1-spi.yaml
diff --git a/Documentation/devicetree/bindings/spi/spacemit,k1-spi.yaml b/Documentation/devicetree/bindings/spi/spacemit,k1-spi.yaml
new file mode 100644
index 0000000000000..e82c7f8d0b981
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spacemit,k1-spi.yaml
@@ -0,0 +1,84 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/spacemit,k1-spi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: SpacemiT K1 SoC Serial Peripheral Interface (SPI)
+
+maintainers:
+ - Alex Elder <elder@kernel.org>
+
+description:
+ The SpacemiT K1 SoC implements a SPI controller that has two 32-entry
+ FIFOs, for transmit and receive. Details are currently available in
+ section 18.2.1 of the K1 User Manual, found in the SpacemiT Keystone
+ K1 Documentation[1]. The controller transfers words using PIO. DMA
+ transfers are supported as well, if both TX and RX DMA channels are
+ specified,
+
+ [1] https://developer.spacemit.com/documentation
+
+allOf:
+ - $ref: /schemas/spi/spi-controller.yaml#
+
+properties:
+ compatible:
+ const: spacemit,k1-spi
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: Core clock
+ - description: Bus clock
+
+ clock-names:
+ items:
+ - const: core
+ - const: bus
+
+ resets:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ dmas:
+ items:
+ - description: RX DMA channel
+ - description: TX DMA channel
+
+ dma-names:
+ items:
+ - const: rx
+ - const: tx
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - resets
+ - interrupts
+
+unevaluatedProperties: false
+
+examples:
+ - |
+
+ #include <dt-bindings/clock/spacemit,k1-syscon.h>
+ spi@d401c000 {
+ compatible = "spacemit,k1-spi";
+ reg = <0xd401c000 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&syscon_apbc CLK_SSP3>,
+ <&syscon_apbc CLK_SSP3_BUS>;
+ clock-names = "core", "bus";
+ resets = <&syscon_apbc RESET_SSP3>;
+ interrupts = <55>;
+ dmas = <&pdma 20>, <&pdma 19>;
+ dma-names = "rx", "tx";
+ };
--
2.48.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH v7 3/3] riscv: dts: spacemit: define a SPI controller node
2025-11-14 18:57 [PATCH v7 0/3] spi: support the SpacemiT K1 SPI controller Alex Elder
2025-11-14 18:57 ` [PATCH v7 1/3] dt-bindings: spi: add SpacemiT K1 SPI support Alex Elder
@ 2025-11-14 18:57 ` Alex Elder
1 sibling, 0 replies; 3+ messages in thread
From: Alex Elder @ 2025-11-14 18:57 UTC (permalink / raw)
To: dlan
Cc: robh, krzk+dt, conor+dt, pjw, palmer, aou, alex, devicetree,
spacemit, linux-riscv, linux-kernel
Define a node for the fourth SoC SPI controller (number 3) on the
SpacemiT K1 SoC.
Enable it on the Banana Pi BPI-F3 board, which exposes this feature
via its GPIO block:
GPIO PIN 19: MOSI
GPIO PIN 21: MISO
GPIO PIN 23: SCLK
GPIO PIN 24: SS (inverted)
Define pincontrol configurations for the pins as used on that board.
(This was tested using a GigaDevice GD25Q64E SPI NOR chip.)
Reviewed-by: Yixun Lan <dlan@gentoo.org>
Signed-off-by: Alex Elder <elder@riscstar.com>
---
.../boot/dts/spacemit/k1-bananapi-f3.dts | 7 +++++++
arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi | 20 +++++++++++++++++++
arch/riscv/boot/dts/spacemit/k1.dtsi | 15 ++++++++++++++
3 files changed, 42 insertions(+)
diff --git a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
index 02f218a16318e..bdbfd04f21853 100644
--- a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
@@ -16,6 +16,7 @@ aliases {
serial0 = &uart0;
i2c2 = &i2c2;
i2c8 = &i2c8;
+ spi3 = &spi3;
};
chosen {
@@ -264,6 +265,12 @@ dldo7 {
};
};
+&spi3 {
+ pinctrl-0 = <&ssp3_0_cfg>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_2_cfg>;
diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
index e922e05ff856d..9b4f4949412f3 100644
--- a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
@@ -537,4 +537,24 @@ pwm14-1-pins {
drive-strength = <32>;
};
};
+
+ ssp3_0_cfg: ssp3-0-cfg {
+ ssp3-0-pins {
+ pinmux = <K1_PADCONF(75, 2)>, /* SCLK */
+ <K1_PADCONF(77, 2)>, /* MOSI */
+ <K1_PADCONF(78, 2)>; /* MISO */
+
+ bias-disable;
+ drive-strength = <19>;
+ power-source = <3300>;
+ };
+
+ ssp3-0-frm-pins {
+ pinmux = <K1_PADCONF(76, 2)>; /* FRM (frame) */
+
+ bias-pull-up = <0>;
+ drive-strength = <19>;
+ power-source = <3300>;
+ };
+ };
};
diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
index 7818ca4979b6a..cb4016886861e 100644
--- a/arch/riscv/boot/dts/spacemit/k1.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
@@ -919,6 +919,21 @@ qspi: spi@d420c000 {
status = "disabled";
};
+ spi3: spi@d401c000 {
+ compatible = "spacemit,k1-spi";
+ reg = <0x0 0xd401c000 0x0 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&syscon_apbc CLK_SSP3>,
+ <&syscon_apbc CLK_SSP3_BUS>;
+ clock-names = "core", "bus";
+ resets = <&syscon_apbc RESET_SSP3>;
+ interrupts = <55>;
+ dmas = <&pdma 20>, <&pdma 19>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
/* sec_uart1: 0xf0612000, not available from Linux */
};
--
2.48.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
end of thread, other threads:[~2025-11-14 18:57 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-11-14 18:57 [PATCH v7 0/3] spi: support the SpacemiT K1 SPI controller Alex Elder
2025-11-14 18:57 ` [PATCH v7 1/3] dt-bindings: spi: add SpacemiT K1 SPI support Alex Elder
2025-11-14 18:57 ` [PATCH v7 3/3] riscv: dts: spacemit: define a SPI controller node Alex Elder
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).