Re: [PATCH v11 04/10] PCI: cadence: Add support for High Perf Architecture (HPA) controller

[Bjorn Helgaas <helgaas@kernel.org>]

On Sat, Nov 08, 2025 at 10:02:59PM +0800, hans.zhang@cixtech.com wrote:
> From: Manikandan K Pillai <mpillai@cadence.com>
> 
> Add support for Cadence PCIe RP configuration for High Performance
> Architecture (HPA) controllers. The Cadence High Performance
> controllers are the latest PCIe controllers that have support for DMA,
> optional IDE and updated register set. Add register definitions for High
> Performance Architecture (HPA) PCIe controllers.

>  /**
>   * struct cdns_pcie - private data for Cadence PCIe controller drivers
>   * @reg_base: IO mapped register base
>   * @mem_res: start/end offsets in the physical system memory to map PCI accesses
> + * @msg_res: Region for send message to map PCI accesses
>   * @dev: PCIe controller
>   * @is_rc: tell whether the PCIe controller mode is Root Complex or Endpoint.
>   * @phy_count: number of supported PHY devices
> @@ -45,16 +85,20 @@ struct cdns_pcie_ops {
>   * @link: list of pointers to corresponding device link representations
>   * @ops: Platform-specific ops to control various inputs from Cadence PCIe
>   *       wrapper
> + * @cdns_pcie_reg_offsets: Register bank offsets for different SoC
>   */
>  struct cdns_pcie {
> -	void __iomem		*reg_base;
> -	struct resource		*mem_res;
> -	struct device		*dev;
> -	bool			is_rc;
> -	int			phy_count;
> -	struct phy		**phy;
> -	struct device_link	**link;
> -	const struct cdns_pcie_ops *ops;
> +	void __iomem		             *reg_base;
> +	void __iomem                         *mem_base;

  $ DIR=drivers/pci/
  $ find $DIR -type f -name \*.[ch] | xargs scripts/kernel-doc -none 2>&1
  Warning: drivers/pci/controller/cadence/pcie-cadence.h:101 struct member 'mem_base' not described in 'cdns_pcie'

Can you supply text for this doc?  We can amend the commit to include
it.