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Wed, 19 Nov 2025 00:45:44 -0800 (PST) From: Neil Armstrong Date: Wed, 19 Nov 2025 09:45:40 +0100 Subject: [PATCH v7 1/3] dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: Document lanes mapping when not using in USB-C complex Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20251119-topic-x1e80100-hdmi-v7-1-2bee0e66cc1b@linaro.org> References: <20251119-topic-x1e80100-hdmi-v7-0-2bee0e66cc1b@linaro.org> In-Reply-To: <20251119-topic-x1e80100-hdmi-v7-0-2bee0e66cc1b@linaro.org> To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: Xilin Wu , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=4548; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=Wwhv46WDe0N83GsQcFn0TZLW8DtrCuNOWijlSA0+FNo=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBpHYO2n8E2xlNYMqA/vWrlycejY8XU+ct7sH6PtbHN /QFQdl+JAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCaR2DtgAKCRB33NvayMhJ0clkEA CJJ1xBSkwbhKBqobEnJeg2Ffxcs8KjAGRW6ahppQTQkOnVDD5ju3l/aJdhj3RFJT5OQQ4xSTKVrGr3 5NstALKqjtkMw4CQIuZHBJZIB9uYQShPCY5koRh4dNTLzCZWm02VvGAYwiwB2Y8nYODf9iZYc48fUw 0txVzBsPT66ICYsF5CdY67molSRvFPUO25LTyAeYBndWLc0LIipqTKY+Ktxe2lETgWrCdv2Qc3Am2F FlDeDDZ+q9gzdfvuDd0vb2UuCBlW+fs41+TZmTxEgUd7jWvlwZXtOV90isO158jCOm1bd+G++6MXmO GRLBMnTB85QzwobTo7WwdB2T/mPudYiF2CvPoV0fdQKkRiSuCoxOdpHpTRIqDVgXcvj2yhUCRY+x2h HWQXIlHLYoburfnA3anl2vtG+H9Q55qYr6+30HBPENQJJoR3+YFV7YIojyqyOk+TBvznUoW7hh5kjn 9YcceGUb1F0Yu37ztPn65+Q4/Gob1pMdlcBGXM0R7ED6ohMjL5Bz5vVVM8qzkq8gKjsqGOfXEWMfrz 0mS7tnEEWkn7E+CP9ouBZUKcQOcdGpNkVkEd200qB9FcLk/0rJugj+ps/74tWDVxoZp63ts7xR+RG8 B7Scz44SzpLCCorqQpqNzdk/2Igjd1RpPBtWnxw2vKOUcwpkdqG+AxunFTnw== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE The QMP USB3/DP Combo PHY hosts an USB3 phy and a DP PHY on top of a combo glue to route either lanes to the 4 shared physical lanes. The routing of the lanes can be: - 2 DP + 2 USB3 - 4 DP - 2 USB3 The layout of the lanes was designed to be mapped and swapped related to the USB-C Power Delivery negociation, so it supports a finite set of mappings inherited by the USB-C Altmode layouts. Nevertheless those QMP Comby PHY can be used to drive a DisplayPort connector, DP->HDMI bridge, USB3 A Connector, etc... without an USB-C connector and no PD events. Document the data-lanes on numbered port@0 out endpoints, allowing us to document the lanes mapping to DisplayPort and/or USB3 connectors/peripherals. Reviewed-by: Rob Herring (Arm) Signed-off-by: Neil Armstrong --- .../phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml | 69 +++++++++++++++++++++- 1 file changed, 68 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml index c8bc512df08b..e0ec45b96bf5 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml @@ -78,10 +78,77 @@ properties: ports: $ref: /schemas/graph.yaml#/properties/ports + properties: port@0: - $ref: /schemas/graph.yaml#/properties/port + $ref: /schemas/graph.yaml#/$defs/port-base description: Output endpoint of the PHY + unevaluatedProperties: false + + properties: + endpoint: + $ref: /schemas/graph.yaml#/$defs/endpoint-base + unevaluatedProperties: false + + endpoint@0: + $ref: /schemas/graph.yaml#/$defs/endpoint-base + description: Display Port Output lanes of the PHY when used with static mapping, + The entry index is the DP lanes index, and the number is the PHY + signal in the order RX0, TX0, TX1, RX1. + unevaluatedProperties: false + + properties: + # Static lane mappings are mutually exclusive with typec-mux/orientation-mux + data-lanes: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 2 + maxItems: 4 + oneOf: + - items: # DisplayPort 1 lane, normal orientation + - const: 3 + - items: # DisplayPort 1 lane, flipped orientation + - const: 0 + - items: # DisplayPort 2 lanes, normal orientation + - const: 3 + - const: 2 + - items: # DisplayPort 2 lanes, flipped orientation + - const: 0 + - const: 1 + - items: # DisplayPort 4 lanes, normal orientation + - const: 3 + - const: 2 + - const: 1 + - const: 0 + - items: # DisplayPort 4 lanes, flipped orientation + - const: 0 + - const: 1 + - const: 2 + - const: 3 + required: + - data-lanes + + endpoint@1: + $ref: /schemas/graph.yaml#/$defs/endpoint-base + description: USB Output lanes of the PHY when used with static mapping. + The entry index is the USB3 lane in the order TX then RX, and the + number is the PHY signal in the order RX0, TX0, TX1, RX1. + unevaluatedProperties: false + + properties: + # Static lane mappings are mutually exclusive with typec-mux/orientation-mux + data-lanes: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 2 + oneOf: + - items: # USB3, normal orientation + - const: 1 + - const: 0 + - items: # USB3, flipped orientation + - const: 2 + - const: 3 + + required: + - data-lanes port@1: $ref: /schemas/graph.yaml#/properties/port -- 2.34.1