* [PATCH 0/4] Add USB3 PHY/Host nodes and enable on RZ/V2H and RZ/V2N
@ 2025-11-19 11:05 Prabhakar
2025-11-19 11:05 ` [PATCH 1/4] arm64: dts: renesas: r9a09g057: Add USB3 PHY/Host nodes Prabhakar
` (3 more replies)
0 siblings, 4 replies; 9+ messages in thread
From: Prabhakar @ 2025-11-19 11:05 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-renesas-soc, devicetree, linux-kernel, Prabhakar, Biju Das,
Fabrizio Castro, Lad Prabhakar
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Hi All,
This series of 4 patches adds USB3 PHY and xHCI host controller nodes to
the DTSI files for the Renesas RZ/V2H(P) (R9A09G057) and RZ/V2N (R9A09G056)
SoCs. Additionally, it enables the USB3.0 support on the respective EVKs.
The first two patches add the necessary USB3 PHY and xHCI host controller
nodes to the RZ/V2H DTSI file and enable them on the RZ/V2H EVK DTS file.
The next two patches perform similar additions and enablement for the
RZ/V2N DTSI and EVK DTS files.
Note,
1] This patch series applies on top of below patch series which is
already under review:
- https://lore.kernel.org/all/20251103200349.62087-1-prabhakar.mahadev-lad.rj@bp.renesas.com/
- https://lore.kernel.org/all/20251023212314.679303-1-prabhakar.mahadev-lad.rj@bp.renesas.com/
2] The corresponding USB3.0 PHY/xHCI DT binding patches have been submitted separately for review.
[0] https://lore.kernel.org/all/20251118180712.4191384-1-prabhakar.mahadev-lad.rj@bp.renesas.com/
[1] https://lore.kernel.org/all/20251101042440.648321-1-prabhakar.mahadev-lad.rj@bp.renesas.com/
Cheers,
Prabhakar
Lad Prabhakar (4):
arm64: dts: renesas: r9a09g057: Add USB3 PHY/Host nodes
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable USB3.0 PHYs and
xHCI controllers
arm64: dts: renesas: r9a09g056: Add USB3 PHY/Host nodes
arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable USB3.0 PHY and
xHCI controller
arch/arm64/boot/dts/renesas/r9a09g056.dtsi | 30 ++++++++++
.../dts/renesas/r9a09g056n48-rzv2n-evk.dts | 15 +++++
arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 60 +++++++++++++++++++
.../dts/renesas/r9a09g057h44-rzv2h-evk.dts | 30 ++++++++++
4 files changed, 135 insertions(+)
--
2.51.2
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 1/4] arm64: dts: renesas: r9a09g057: Add USB3 PHY/Host nodes
2025-11-19 11:05 [PATCH 0/4] Add USB3 PHY/Host nodes and enable on RZ/V2H and RZ/V2N Prabhakar
@ 2025-11-19 11:05 ` Prabhakar
2025-11-24 13:51 ` Geert Uytterhoeven
2025-11-19 11:05 ` [PATCH 2/4] arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable USB3.0 PHYs and xHCI controllers Prabhakar
` (2 subsequent siblings)
3 siblings, 1 reply; 9+ messages in thread
From: Prabhakar @ 2025-11-19 11:05 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-renesas-soc, devicetree, linux-kernel, Prabhakar, Biju Das,
Fabrizio Castro, Lad Prabhakar
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Add USB3 PHY/Host nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 60 ++++++++++++++++++++++
1 file changed, 60 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
index 25b534bd5652..8b8ed4fbb599 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
@@ -1087,6 +1087,66 @@ usb21phyrst: usb21phy-reset@15840000 {
status = "disabled";
};
+ xhci0: usb@15850000 {
+ compatible = "renesas,r9a09g057-xhci", "renesas,r9a09g047-xhci";
+ reg = <0 0x15850000 0 0x10000>;
+ interrupts = <GIC_SPI 759 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 758 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 757 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 756 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 755 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "all", "smi", "hse", "pme", "xhc";
+ clocks = <&cpg CPG_MOD 0xaf>;
+ power-domains = <&cpg>;
+ resets = <&cpg 0xaa>;
+ phys = <&usb3_phy0>, <&usb3_phy0>;
+ phy-names = "usb2-phy", "usb3-phy";
+ status = "disabled";
+ };
+
+ xhci1: usb@15860000 {
+ compatible = "renesas,r9a09g057-xhci", "renesas,r9a09g047-xhci";
+ reg = <0 0x15860000 0 0x10000>;
+ interrupts = <GIC_SPI 764 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 763 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 762 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 761 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 760 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "all", "smi", "hse", "pme", "xhc";
+ clocks = <&cpg CPG_MOD 0xb1>;
+ power-domains = <&cpg>;
+ resets = <&cpg 0xab>;
+ phys = <&usb3_phy1>, <&usb3_phy1>;
+ phy-names = "usb2-phy", "usb3-phy";
+ status = "disabled";
+ };
+
+ usb3_phy0: usb-phy@15870000 {
+ compatible = "renesas,r9a09g057-usb3-phy", "renesas,r9a09g047-usb3-phy";
+ reg = <0 0x15870000 0 0x10000>;
+ clocks = <&cpg CPG_MOD 0xb0>,
+ <&cpg CPG_CORE R9A09G057_USB3_0_CLKCORE>,
+ <&cpg CPG_CORE R9A09G057_USB3_0_REF_ALT_CLK_P>;
+ clock-names = "pclk", "core", "ref_alt_clk_p";
+ power-domains = <&cpg>;
+ resets = <&cpg 0xaa>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
+ usb3_phy1: usb-phy@15880000 {
+ compatible = "renesas,r9a09g057-usb3-phy", "renesas,r9a09g047-usb3-phy";
+ reg = <0 0x15880000 0 0x10000>;
+ clocks = <&cpg CPG_MOD 0xb2>,
+ <&cpg CPG_CORE R9A09G057_USB3_1_CLKCORE>,
+ <&cpg CPG_CORE R9A09G057_USB3_1_REF_ALT_CLK_P>;
+ clock-names = "pclk", "core", "ref_alt_clk_p";
+ power-domains = <&cpg>;
+ resets = <&cpg 0xab>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
sdhi0: mmc@15c00000 {
compatible = "renesas,sdhi-r9a09g057";
reg = <0x0 0x15c00000 0 0x10000>;
--
2.51.2
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/4] arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable USB3.0 PHYs and xHCI controllers
2025-11-19 11:05 [PATCH 0/4] Add USB3 PHY/Host nodes and enable on RZ/V2H and RZ/V2N Prabhakar
2025-11-19 11:05 ` [PATCH 1/4] arm64: dts: renesas: r9a09g057: Add USB3 PHY/Host nodes Prabhakar
@ 2025-11-19 11:05 ` Prabhakar
2025-11-24 13:55 ` Geert Uytterhoeven
2025-11-19 11:05 ` [PATCH 3/4] arm64: dts: renesas: r9a09g056: Add USB3 PHY/Host nodes Prabhakar
2025-11-19 11:05 ` [PATCH 4/4] arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable USB3.0 PHY and xHCI controller Prabhakar
3 siblings, 1 reply; 9+ messages in thread
From: Prabhakar @ 2025-11-19 11:05 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-renesas-soc, devicetree, linux-kernel, Prabhakar, Biju Das,
Fabrizio Castro, Lad Prabhakar
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Enable the USB3.0 (CH0) and USB3.1 (CH1) host controllers on the RZ/V2H
Evaluation Kit. The CN4 stacked connector on the EVK provides access to
both channels, with CH0 corresponding to USB3.0 and CH1 to USB3.1.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
.../dts/renesas/r9a09g057h44-rzv2h-evk.dts | 30 +++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
index d2d8ff3cb844..dd6f19d99a3e 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
+++ b/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
@@ -687,6 +687,16 @@ vbus {
};
};
+ usb30_pins: usb30 {
+ pinmux = <RZV2H_PORT_PINMUX(B, 0, 14)>, /* USB30_VBUSEN */
+ <RZV2H_PORT_PINMUX(B, 1, 14)>; /* USB30_OVRCURN */
+ };
+
+ usb31_pins: usb31 {
+ pinmux = <RZV2H_PORT_PINMUX(6, 2, 14)>, /* USB31_VBUSEN */
+ <RZV2H_PORT_PINMUX(6, 3, 14)>; /* USB31_OVRCURN */
+ };
+
xspi_pins: xspi0 {
ctrl {
pins = "XSPI0_RESET0N", "XSPI0_CS0N", "XSPI0_CKP";
@@ -753,10 +763,30 @@ &usb2_phy1 {
status = "okay";
};
+&usb3_phy0 {
+ status = "okay";
+};
+
+&usb3_phy1 {
+ status = "okay";
+};
+
&wdt1 {
status = "okay";
};
+&xhci0 {
+ pinctrl-0 = <&usb30_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&xhci1 {
+ pinctrl-0 = <&usb31_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
&xspi {
pinctrl-0 = <&xspi_pins>;
pinctrl-names = "default";
--
2.51.2
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 3/4] arm64: dts: renesas: r9a09g056: Add USB3 PHY/Host nodes
2025-11-19 11:05 [PATCH 0/4] Add USB3 PHY/Host nodes and enable on RZ/V2H and RZ/V2N Prabhakar
2025-11-19 11:05 ` [PATCH 1/4] arm64: dts: renesas: r9a09g057: Add USB3 PHY/Host nodes Prabhakar
2025-11-19 11:05 ` [PATCH 2/4] arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable USB3.0 PHYs and xHCI controllers Prabhakar
@ 2025-11-19 11:05 ` Prabhakar
2025-11-24 13:57 ` Geert Uytterhoeven
2025-11-19 11:05 ` [PATCH 4/4] arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable USB3.0 PHY and xHCI controller Prabhakar
3 siblings, 1 reply; 9+ messages in thread
From: Prabhakar @ 2025-11-19 11:05 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-renesas-soc, devicetree, linux-kernel, Prabhakar, Biju Das,
Fabrizio Castro, Lad Prabhakar
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Add USB3 PHY/Host nodes to RZ/V2N ("R9A09G056") SoC DTSI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r9a09g056.dtsi | 30 ++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g056.dtsi b/arch/arm64/boot/dts/renesas/r9a09g056.dtsi
index 68f7a8b68d91..5832aea664b1 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g056.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g056.dtsi
@@ -696,6 +696,36 @@ usb20phyrst: usb20phy-reset@15830000 {
status = "disabled";
};
+ xhci: usb@15850000 {
+ compatible = "renesas,r9a09g056-xhci", "renesas,r9a09g047-xhci";
+ reg = <0 0x15850000 0 0x10000>;
+ interrupts = <GIC_SPI 759 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 758 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 757 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 756 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 755 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "all", "smi", "hse", "pme", "xhc";
+ clocks = <&cpg CPG_MOD 0xaf>;
+ power-domains = <&cpg>;
+ resets = <&cpg 0xaa>;
+ phys = <&usb3_phy>, <&usb3_phy>;
+ phy-names = "usb2-phy", "usb3-phy";
+ status = "disabled";
+ };
+
+ usb3_phy: usb-phy@15870000 {
+ compatible = "renesas,r9a09g056-usb3-phy", "renesas,r9a09g047-usb3-phy";
+ reg = <0 0x15870000 0 0x10000>;
+ clocks = <&cpg CPG_MOD 0xb0>,
+ <&cpg CPG_CORE R9A09G056_USB3_0_CLKCORE>,
+ <&cpg CPG_CORE R9A09G056_USB3_0_REF_ALT_CLK_P>;
+ clock-names = "pclk", "core", "ref_alt_clk_p";
+ power-domains = <&cpg>;
+ resets = <&cpg 0xaa>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
sdhi0: mmc@15c00000 {
compatible = "renesas,sdhi-r9a09g056", "renesas,sdhi-r9a09g057";
reg = <0x0 0x15c00000 0 0x10000>;
--
2.51.2
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 4/4] arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable USB3.0 PHY and xHCI controller
2025-11-19 11:05 [PATCH 0/4] Add USB3 PHY/Host nodes and enable on RZ/V2H and RZ/V2N Prabhakar
` (2 preceding siblings ...)
2025-11-19 11:05 ` [PATCH 3/4] arm64: dts: renesas: r9a09g056: Add USB3 PHY/Host nodes Prabhakar
@ 2025-11-19 11:05 ` Prabhakar
2025-11-24 13:57 ` Geert Uytterhoeven
3 siblings, 1 reply; 9+ messages in thread
From: Prabhakar @ 2025-11-19 11:05 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-renesas-soc, devicetree, linux-kernel, Prabhakar, Biju Das,
Fabrizio Castro, Lad Prabhakar
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Enable the USB3.0 (CH0) host controllers on the RZ/V2N Evaluation Kit.
The CN4 connector on the EVK provides access to the USB3.0 channel.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
.../boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts
index b77276489b30..9fd904787c30 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts
+++ b/arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts
@@ -460,6 +460,11 @@ vbus {
};
};
+ usb3_pins: usb3 {
+ pinmux = <RZV2N_PORT_PINMUX(B, 0, 14)>, /* USB30_VBUSEN */
+ <RZV2N_PORT_PINMUX(B, 1, 14)>; /* USB30_OVRCURN */
+ };
+
xspi_pins: xspi0 {
ctrl {
pins = "XSPI0_RESET0N", "XSPI0_CS0N", "XSPI0_CKP";
@@ -510,10 +515,20 @@ &usb2_phy0 {
status = "okay";
};
+&usb3_phy {
+ status = "okay";
+};
+
&wdt1 {
status = "okay";
};
+&xhci {
+ pinctrl-0 = <&usb3_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
&xspi {
pinctrl-0 = <&xspi_pins>;
pinctrl-names = "default";
--
2.51.2
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 1/4] arm64: dts: renesas: r9a09g057: Add USB3 PHY/Host nodes
2025-11-19 11:05 ` [PATCH 1/4] arm64: dts: renesas: r9a09g057: Add USB3 PHY/Host nodes Prabhakar
@ 2025-11-24 13:51 ` Geert Uytterhoeven
0 siblings, 0 replies; 9+ messages in thread
From: Geert Uytterhoeven @ 2025-11-24 13:51 UTC (permalink / raw)
To: Prabhakar
Cc: Magnus Damm, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-renesas-soc, devicetree, linux-kernel, Biju Das,
Fabrizio Castro, Lad Prabhakar
On Wed, 19 Nov 2025 at 12:05, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Add USB3 PHY/Host nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v6.20.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/4] arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable USB3.0 PHYs and xHCI controllers
2025-11-19 11:05 ` [PATCH 2/4] arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable USB3.0 PHYs and xHCI controllers Prabhakar
@ 2025-11-24 13:55 ` Geert Uytterhoeven
0 siblings, 0 replies; 9+ messages in thread
From: Geert Uytterhoeven @ 2025-11-24 13:55 UTC (permalink / raw)
To: Prabhakar
Cc: Magnus Damm, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-renesas-soc, devicetree, linux-kernel, Biju Das,
Fabrizio Castro, Lad Prabhakar
On Wed, 19 Nov 2025 at 12:05, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Enable the USB3.0 (CH0) and USB3.1 (CH1) host controllers on the RZ/V2H
> Evaluation Kit. The CN4 stacked connector on the EVK provides access to
> both channels, with CH0 corresponding to USB3.0 and CH1 to USB3.1.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v6.20.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 3/4] arm64: dts: renesas: r9a09g056: Add USB3 PHY/Host nodes
2025-11-19 11:05 ` [PATCH 3/4] arm64: dts: renesas: r9a09g056: Add USB3 PHY/Host nodes Prabhakar
@ 2025-11-24 13:57 ` Geert Uytterhoeven
0 siblings, 0 replies; 9+ messages in thread
From: Geert Uytterhoeven @ 2025-11-24 13:57 UTC (permalink / raw)
To: Prabhakar
Cc: Magnus Damm, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-renesas-soc, devicetree, linux-kernel, Biju Das,
Fabrizio Castro, Lad Prabhakar
On Wed, 19 Nov 2025 at 12:05, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Add USB3 PHY/Host nodes to RZ/V2N ("R9A09G056") SoC DTSI.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v6.20.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 4/4] arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable USB3.0 PHY and xHCI controller
2025-11-19 11:05 ` [PATCH 4/4] arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable USB3.0 PHY and xHCI controller Prabhakar
@ 2025-11-24 13:57 ` Geert Uytterhoeven
0 siblings, 0 replies; 9+ messages in thread
From: Geert Uytterhoeven @ 2025-11-24 13:57 UTC (permalink / raw)
To: Prabhakar
Cc: Magnus Damm, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-renesas-soc, devicetree, linux-kernel, Biju Das,
Fabrizio Castro, Lad Prabhakar
On Wed, 19 Nov 2025 at 12:05, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Enable the USB3.0 (CH0) host controllers on the RZ/V2N Evaluation Kit.
> The CN4 connector on the EVK provides access to the USB3.0 channel.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v6.20.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 9+ messages in thread
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2025-11-19 11:05 [PATCH 0/4] Add USB3 PHY/Host nodes and enable on RZ/V2H and RZ/V2N Prabhakar
2025-11-19 11:05 ` [PATCH 1/4] arm64: dts: renesas: r9a09g057: Add USB3 PHY/Host nodes Prabhakar
2025-11-24 13:51 ` Geert Uytterhoeven
2025-11-19 11:05 ` [PATCH 2/4] arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable USB3.0 PHYs and xHCI controllers Prabhakar
2025-11-24 13:55 ` Geert Uytterhoeven
2025-11-19 11:05 ` [PATCH 3/4] arm64: dts: renesas: r9a09g056: Add USB3 PHY/Host nodes Prabhakar
2025-11-24 13:57 ` Geert Uytterhoeven
2025-11-19 11:05 ` [PATCH 4/4] arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable USB3.0 PHY and xHCI controller Prabhakar
2025-11-24 13:57 ` Geert Uytterhoeven
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