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(unknown []) by gzga-smtp-mtada-g0-2 (Coremail) with SMTP id _____wD3t8f_KB9pu1X7AA--.141S2; Thu, 20 Nov 2025 22:43:12 +0800 (CST) From: niliqiang To: apatel@ventanamicro.com Cc: ajones@ventanamicro.com, anup@brainfault.org, atishp@atishpatra.org, bjorn@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org, frowand.list@gmail.com, krzysztof.kozlowski+dt@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, maz@kernel.org, palmer@dabbelt.com, paul.walmsley@sifive.com, robh+dt@kernel.org, saravanak@google.com, sunilvl@ventanamicro.com, tglx@linutronix.de, hu.yuye@zte.com.cn, deng.weixian@zte.com.cn, ni.liqiang@zte.com.cn Subject: Re: [PATCH v16 6/9] irqchip: Add RISC-V advanced PLIC driver for direct-mode Date: Thu, 20 Nov 2025 22:43:11 +0800 Message-Id: <20251120144311.5083-1-ni_liqiang@126.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240307140307.646078-7-apatel@ventanamicro.com> References: <20240307140307.646078-7-apatel@ventanamicro.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID:_____wD3t8f_KB9pu1X7AA--.141S2 X-Coremail-Antispam: 1Uf129KBjvJXoW7tw47XFyrJw47tw1Dtw4DCFg_yoW8ZF1DpF 4Dt34Iya9rGF1ag3ZrGa1kAFy7C395Cayayr1DJ34a9wn8uFyqva1Iy3909ry5Jr4rAr1a qrWjyF9rCan8ZFUanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07jjbyZUUUUU= X-CM-SenderInfo: xqlbzxxtld0wa6rslhhfrp/1tbiTwgM5WkfG4PySQAAs7 > diff --git a/drivers/irqchip/irq-riscv-aplic-main.c b/drivers/irqchip/irq-riscv-aplic-main.c > +static const struct of_device_id aplic_match[] = { > + { .compatible = "riscv,aplic" }, > + {} > +}; > + > +static struct platform_driver aplic_driver = { > + .driver = { > + .name = "riscv-aplic", > + .of_match_table = aplic_match, > + }, > + .probe = aplic_probe, > +}; > +builtin_platform_driver(aplic_driver); Dear Anup Patel and all concerned, I am writing to inquire about the historical rationale behind defining the APLIC driver's initialization priority using builtin_platform_driver in the current implementation. In our environment, we are encountering an issue where this priority level causes ACPI-based PCIe enumeration to be executed in the system_unbound_wq work queue. This parallel execution model results in PCIe devices being enumerated in an arbitrary order rather than strictly following the sequence defined in the ACPI DSDT table. The random enumeration order is adversely affecting customer experience, particularly in scenarios where device ordering is critical for proper system operation or application compatibility. We are considering modifying the APLIC driver's initialization priority to ensure PCIe enumeration occurs sequentially according to the DSDT specification. However, before proceeding with such changes, we wanted to consult with you regarding: 1. Were there specific technical considerations that led to the current priority selection? 2. Are there any potential side effects or broader impacts that we might have overlooked? 3. Would you support such a priority adjustment, or do you have alternative suggestions to address the enumeration order issue? We greatly appreciate your insights and expertise on this matter, as it will help us make an informed decision while maintaining system stability and compatibility. Thank you for your time and consideration. Best regards, Liqiang