From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7E6771D6193; Sat, 22 Nov 2025 12:35:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763814918; cv=none; b=bn1UDZcdCiJJoXfrmMfDPbAtNillCG9VtpRevYBsBtMP7IkeP+7wm37IDu0qHfaPX9tZ8MBvAeX83qn8pcSjkXnmDIBQ2KxLgzoOhd2R5kHXWQEH6rHoaV5cOFe5K0ni6YH9CWNFNieWDw04FQrV+plSKsGIOv9v+j2IbS771D0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763814918; c=relaxed/simple; bh=mXHHgeiUlhJ4Ko8Q0J+WX5MHnWYEekXcVNTmh/1dM7E=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=cVmN1/nvUCOrCmyWawJ1AjmOz/vnMbNE9Jm311J6nZ1PmxTV0qbWhDgKewVErgLXFuM2e19F7YEkayqsKbeKufNiVrOMIznwCbCv9zNLbGeQBNb0I5Dn3u3+EDR4jali1U5Xe8BFov0wY79zMyqZ30PBxnyncGsWV3ez3Tm/Etg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=zEVBksh0; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="zEVBksh0" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3DCC3C4CEF5; Sat, 22 Nov 2025 12:35:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1763814917; bh=mXHHgeiUlhJ4Ko8Q0J+WX5MHnWYEekXcVNTmh/1dM7E=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=zEVBksh0CtxT5twtiv2E47j8wpEZsf20ttbGryy8TC6LriXJ9I4+iNc20NBh2jsWi kLKwg9as3qiLVaY2fwiuoUQMmpjDqPQXMH3zrL0TP/fQVX9N2aw+YfBeML2LOihTlY 6Z4qeBMAhnujl8NAav9ilIRS1KANyj6H3UXQD0/g= Date: Sat, 22 Nov 2025 13:35:15 +0100 From: Greg Kroah-Hartman To: Peter Griffin Cc: Roy Luo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , =?iso-8859-1?Q?Andr=E9?= Draszik , Tudor Ambarus , Thinh Nguyen , Philipp Zabel , Badhri Jagan Sridharan , Doug Anderson , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, Joy Chakraborty , Naveen Kumar Subject: Re: [PATCH v8 2/2] usb: dwc3: Add Google Tensor SoC DWC3 glue driver Message-ID: <2025112248-spoon-waffle-a508@gregkh> References: <20251122-controller-v8-0-e7562e0df658@google.com> <20251122-controller-v8-2-e7562e0df658@google.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Sat, Nov 22, 2025 at 11:58:39AM +0000, Peter Griffin wrote: > Hi Roy, > > Thanks for your patch. It's great to see Laguna support being added upstream. > > On Sat, 22 Nov 2025 at 09:32, Roy Luo wrote: > > > > Add support for the DWC3 USB controller found on Google Tensor G5 > > (codename: laguna). The controller features dual-role functionality > > and hibernation. > > > > The primary focus is implementing hibernation support in host mode, > > enabling the controller to enter a low-power state (D3). This is > > particularly relevant during system power state transition and > > runtime power management for power efficiency. > > Highlights: > > - Align suspend callback with dwc3_suspend_common() for deciding > > between a full teardown and hibernation in host mode. > > - Integration with `psw` (power switchable) and `top` power domains, > > managing their states and device links to support hibernation. > > - A notifier callback dwc3_google_usb_psw_pd_notifier() for > > `psw` power domain events to manage controller state > > transitions to/from D3. > > - Coordination of the `non_sticky` reset during power state > > transitions, asserting it on D3 entry and deasserting on D0 entry > > in hibernation scenario. > > - Handling of high-speed and super-speed PME interrupts > > that are generated by remote wakeup during hibernation. > > > > Co-developed-by: Joy Chakraborty > > Signed-off-by: Joy Chakraborty > > Co-developed-by: Naveen Kumar > > Signed-off-by: Naveen Kumar > > Signed-off-by: Roy Luo > > --- > > drivers/usb/dwc3/Kconfig | 13 + > > drivers/usb/dwc3/Makefile | 1 + > > drivers/usb/dwc3/dwc3-google.c | 628 +++++++++++++++++++++++++++++++++++++++++ > > 3 files changed, 642 insertions(+) > > > > diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig > > index 4925d15084f816d3ff92059b476ebcc799b56b51..f58c70dabf108878cbefe0abea88572d9ae81e26 100644 > > --- a/drivers/usb/dwc3/Kconfig > > +++ b/drivers/usb/dwc3/Kconfig > > @@ -200,4 +200,17 @@ config USB_DWC3_GENERIC_PLAT > > the dwc3 child node in the device tree. > > Say 'Y' or 'M' here if your platform integrates DWC3 in a similar way. > > > > +config USB_DWC3_GOOGLE > > + tristate "Google Platform" > > + depends on COMPILE_TEST > > + depends on OF && COMMON_CLK && RESET_CONTROLLER > > + help > > + Support the DesignWare Core USB3 IP found on Google Tensor > > + SoCs, starting with the G5 generation. This driver includes > > consider adding: (Laguna) What is "laguna" and why should it be listed here? > > + support for hibernation in host mode. > > + Say 'Y' or 'M' if you have one such device. > > + > > + To compile this driver as a module, choose M here: the > > + module will be called dwc3-google.ko. > > + > > endif > > diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile > > index 96469e48ff9d189cc8d0b65e65424eae2158bcfe..cf1cd408d938b3ac26d58b9be7fcc5af3ee82660 100644 > > --- a/drivers/usb/dwc3/Makefile > > +++ b/drivers/usb/dwc3/Makefile > > @@ -58,3 +58,4 @@ obj-$(CONFIG_USB_DWC3_XILINX) += dwc3-xilinx.o > > obj-$(CONFIG_USB_DWC3_OCTEON) += dwc3-octeon.o > > obj-$(CONFIG_USB_DWC3_RTK) += dwc3-rtk.o > > obj-$(CONFIG_USB_DWC3_GENERIC_PLAT) += dwc3-generic-plat.o > > +obj-$(CONFIG_USB_DWC3_GOOGLE) += dwc3-google.o > > diff --git a/drivers/usb/dwc3/dwc3-google.c b/drivers/usb/dwc3/dwc3-google.c > > new file mode 100644 > > index 0000000000000000000000000000000000000000..53e04a5409d8a11eb025b0f5cd351cb1b33281ab > > --- /dev/null > > +++ b/drivers/usb/dwc3/dwc3-google.c > > @@ -0,0 +1,628 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * dwc3-google.c - Google DWC3 Specific Glue Layer > > + * > > + * Copyright (c) 2025, Google LLC > > + * Author: Roy Luo > > + */ > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > Please sort the headers alphabetically. It helps avoid duplicates and > is easier when adding new headers. There is no such requirement for USB drivers. thanks, greg k-h