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Mon, 01 Dec 2025 18:21:38 -0800 (PST) From: David Lechner Subject: [PATCH v3 0/7] spi: add multi-lane support Date: Mon, 01 Dec 2025 20:20:38 -0600 Message-Id: <20251201-spi-add-multi-bus-support-v3-0-34e05791de83@baylibre.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAPZMLmkC/32OS47CMBBErxJ5TY/cThwSVnOPEQs77kBL5IPtR CCUu2PMYiQWLKtb9V49RCDPFMSheAhPKweexhTKXSG6sxlPBOxSFkoqLRvUEGYG4xwMyyUy2CV AWOZ58hHQltpJ3emqr0Xqz556vmX23/GdPV2XpIjvo7AmEHTTMHA8FCPdIrw0iHIvXoUzhzj5e 962Ym7kv8Tqy4wVQSZO23SoXN3r/tea+4Wtp5+kyuBV/cOS7BtMJVhjWlW3ZYmVaz9g27Y9AZk FOK1DAQAA X-Change-ID: 20250815-spi-add-multi-bus-support-1b35d05c54f6 To: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Marcelo Schmitt , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Jonathan Cameron , Andy Shevchenko Cc: Sean Anderson , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, David Lechner X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4340; i=dlechner@baylibre.com; h=from:subject:message-id; bh=NS5ztHVEE3daR7QOnKdCSjAlnqaveKIaw4526zxFkaE=; b=owEBbQGS/pANAwAKAcLMIAH/AY/AAcsmYgBpLkz64N+nac0VgzF9b75cT0+5CMLs+RNGsd99V x20Y1APZ+qJATMEAAEKAB0WIQTsGNmeYg6D1pzYaJjCzCAB/wGPwAUCaS5M+gAKCRDCzCAB/wGP wHKkB/0btUPVjtir1cnhZVR1WcdWT1JO7f+0cXcTJH+rP3/IU2f0fu57H2LwXW02TE9cnjdg8MR JrS9HqDyWJ1gwy0n2EU95E8RhtRLHqPn5cnwBMKU6Jt6eDc6wFIuhCREIo9j4OqiIpqsnLF22F3 BAFp9ZBGO+UjOq0sICLB1qN6uj//AqROm+y3aDekQ1FdDq3fUi4SYPWnWI/UZsPLoOE+3uryJ4F eBIMy54nxnw92i+XFIEl9nVY/VBiCTJ466JmIFHqk5s9GTDqFJacj0eWyCw518eWChhsn8lzVjo SjmVEsDYjJP2wumZ9slyc1U11S/m0lSI+4vTk9rX6kp+pkDq X-Developer-Key: i=dlechner@baylibre.com; a=openpgp; fpr=8A73D82A6A1F509907F373881F8AF88C82F77C03 This series is adding support for SPI controllers and peripherals that have multiple SPI data lanes (data lanes being independent sets of SDI/SDO lines, each with their own serializer/deserializer). This series covers this specific use case: +--------------+ +---------+ | SPI | | SPI | | Controller | | ADC | | | | | | CS0 |--->| CS | | SCLK |--->| SCLK | | SDO |--->| SDI | | SDI0 |<---| SDOA | | SDI1 |<---| SDOB | | SDI2 |<---| SDOC | | SDI3 |<---| SDOD | +--------------+ +--------+ The ADC is a simultaneous sampling ADC that can convert 4 samples at the same time. It has 4 data output lines (SDOA-D) that each contain the data of one of the 4 channels. So it requires a SPI controller with 4 separate deserializers in order to receive all of the information at the same time. This should also work for the use case in [1] as well. (Some of the patches in this series were already submitted there). In that case the SPI controller is used kind of like it is two separate SPI controllers, each with its own chip select, clock, and data lines. [1]: https://lore.kernel.org/linux-spi/20250616220054.3968946-1-sean.anderson@linux.dev/ The DT bindings are a fairly straight-forward mapping of which pins on the peripheral are connected to which pins on the controller. The SPI core code parses this and makes the information available to drivers. When a peripheral driver sees that multiple data lanes are wired up, it can chose to use them when sending messages. The SPI message API is a bit higher-level than just specifying the number of data lines for a SPI transfer though. I did some research on other SPI controllers that have this feature. They tend to be the kind meant for connecting to two flash memory chips at the same time but can be used more generically as well. They generally have the option to either use one lane at a time (Sean's use case), or can mirror the same data on multiple lanes (no users of this yet) or can perform striping of a single data FIFO/DMA stream to/from the two lanes (our use case). For now, the API assumes that if you want to do mirror/striping, then you want to use all available data lanes. Otherwise, it just uses the first data lane for "normal" SPI transfers. Signed-off-by: David Lechner --- Changes in v3: - Use existing data-lanes devicetree property name instead of creating a new one. - Renamed "buses" to "lanes" everywhere to match the devicetree property name. - Clarified bindings description about how to specify data lanes. - Link to v2: https://lore.kernel.org/r/20251107-spi-add-multi-bus-support-v2-0-8a92693314d9@baylibre.com Changes in v2: - Renamed devicetree property spi-buses to spi-data-buses. (Driver code was already using spi->data_buses, so it matches). - Fixed a small bug in the AXI ADC driver changes. - Moved one line of code in the ADC driver changes. - Link to v1: https://lore.kernel.org/r/20251014-spi-add-multi-bus-support-v1-0-2098c12d6f5f@baylibre.com --- David Lechner (7): spi: dt-bindings: Add data-lanes property spi: Support controllers with multiple data lanes spi: add multi_lane_mode field to struct spi_transfer spi: axi-spi-engine: support SPI_MULTI_LANE_MODE_STRIPE dt-bindings: iio: adc: adi,ad7380: add spi-lanes property iio: adc: ad7380: Add support for multiple SPI lanes dt-bindings: iio: adc: adi,ad4030: add data-lanes property .../devicetree/bindings/iio/adc/adi,ad4030.yaml | 36 ++++++ .../devicetree/bindings/iio/adc/adi,ad7380.yaml | 22 ++++ .../bindings/spi/spi-peripheral-props.yaml | 14 +++ drivers/iio/adc/ad7380.c | 42 ++++--- drivers/spi/spi-axi-spi-engine.c | 128 ++++++++++++++++++++- drivers/spi/spi.c | 28 ++++- include/linux/spi/spi.h | 23 ++++ 7 files changed, 275 insertions(+), 18 deletions(-) --- base-commit: 1a26618e7466b8d825989201086c235e76aa999a change-id: 20250815-spi-add-multi-bus-support-1b35d05c54f6 Best regards, -- David Lechner