devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Rob Herring <robh@kernel.org>
To: adrianhoyin.ng@altera.com
Cc: gregkh@linuxfoundation.org, krzk+dt@kernel.org,
	conor+dt@kernel.org, dinguyen@kernel.org,
	Thinh.Nguyen@synopsys.com, devicetree@vger.kernel.org,
	linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 4/4] usb: dwc3: Add support for Agilex5 in dwc3-generic-platform driver
Date: Tue, 9 Dec 2025 16:31:27 -0600	[thread overview]
Message-ID: <20251209223127.GA1242261-robh@kernel.org> (raw)
In-Reply-To: <a9db62422d39ac51cb26b73c5537ca2f8130f7a3.1765249127.git.adrianhoyin.ng@altera.com>

On Tue, Dec 09, 2025 at 02:25:11PM +0800, adrianhoyin.ng@altera.com wrote:
> From: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
> 
> Adds support for Agilex5 in the dwc3-generic-platform driver. Extends
> generic driver to support configurable driver data to enable dwc3 core
> property configuration from glue driver.
> 
> Agilex5 DWC3 wrapper has a 40-bit DMA address bus limitation. When SMMU
> is enabled, using the default 64-bit DMA mask can cause DMA addresses to
> be truncated, leading to translation faults.
> 
> This patch adds a `dma_addressable_bits` field in struct dwc3, allowing
> the glue driver to set a 40-bit DMA mask during probe.
> 
> Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
> ---
>  drivers/usb/dwc3/core.c              |  6 +++++-
>  drivers/usb/dwc3/core.h              |  5 +++++
>  drivers/usb/dwc3/dwc3-generic-plat.c | 20 +++++++++++++++++++-
>  3 files changed, 29 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> index ae140c356295..1fca55637844 100644
> --- a/drivers/usb/dwc3/core.c
> +++ b/drivers/usb/dwc3/core.c
> @@ -2243,7 +2243,11 @@ int dwc3_core_probe(const struct dwc3_probe_data *data)
>  
>  	if (!dwc->sysdev_is_parent &&
>  	    DWC3_GHWPARAMS0_AWIDTH(dwc->hwparams.hwparams0) == 64) {
> -		ret = dma_set_mask_and_coherent(dwc->sysdev, DMA_BIT_MASK(64));
> +		if (!dwc->dma_addressable_bits)
> +			dwc->dma_addressable_bits = 64;
> +
> +		ret = dma_set_mask_and_coherent(dwc->sysdev,
> +						DMA_BIT_MASK(dwc->dma_addressable_bits));
>  		if (ret)
>  			goto err_disable_clks;
>  	}
> diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
> index a5fc92c4ffa3..a09800fe6577 100644
> --- a/drivers/usb/dwc3/core.h
> +++ b/drivers/usb/dwc3/core.h
> @@ -1180,6 +1180,10 @@ struct dwc3_glue_ops {
>   * @wakeup_pending_funcs: Indicates whether any interface has requested for
>   *			 function wakeup in bitmap format where bit position
>   *			 represents interface_id.
> + * @dma_addressable_bits: The number of address bits the device can drive on
> + *			the DMA bus. The driver uses this value to program DMA masks and
> + *			ensure DMA buffers are allocated within the device’s reachable
> + *			address space.
>   */
>  struct dwc3 {
>  	struct work_struct	drd_work;
> @@ -1414,6 +1418,7 @@ struct dwc3 {
>  	struct dentry		*debug_root;
>  	u32			gsbuscfg0_reqinfo;
>  	u32			wakeup_pending_funcs;
> +	u32			dma_addressable_bits;
>  };
>  
>  #define INCRX_BURST_MODE 0
> diff --git a/drivers/usb/dwc3/dwc3-generic-plat.c b/drivers/usb/dwc3/dwc3-generic-plat.c
> index d96b20570002..e9650df6cf81 100644
> --- a/drivers/usb/dwc3/dwc3-generic-plat.c
> +++ b/drivers/usb/dwc3/dwc3-generic-plat.c
> @@ -20,6 +20,11 @@ struct dwc3_generic {
>  	struct reset_control	*resets;
>  };
>  
> +struct dwc3_generic_config {
> +	u32 flags;
> +};
> +
> +#define DWC3_HAS_40BIT_DMA_QUIRK BIT(0)

Quirk flags are good, but if we have 10 different address sizes that's 
10 flags. Just make a dma_addressable_bits field here too, and then it 
is just a straight assignment.

Rob

  reply	other threads:[~2025-12-09 22:31 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-09  6:25 [PATCH v2 0/4] Add Altera Agilex5 DWC3 support adrianhoyin.ng
2025-12-09  6:25 ` [PATCH v2 1/4] dt-bindings: usb: dwc3: Add support for Altera Agilex5 DWC3 adrianhoyin.ng
2025-12-09 22:37   ` Rob Herring
2025-12-09  6:25 ` [PATCH v2 2/4] arm64: dts: intel: agilex5: Add USB3.1 support for Agilex5 SoCDK adrianhoyin.ng
2025-12-09  6:25 ` [PATCH v2 3/4] arm64: dts: intel: agilex5: Remove usb0 in " adrianhoyin.ng
2025-12-09  6:25 ` [PATCH v2 4/4] usb: dwc3: Add support for Agilex5 in dwc3-generic-platform driver adrianhoyin.ng
2025-12-09 22:31   ` Rob Herring [this message]
2025-12-16 23:15     ` Thinh Nguyen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20251209223127.GA1242261-robh@kernel.org \
    --to=robh@kernel.org \
    --cc=Thinh.Nguyen@synopsys.com \
    --cc=adrianhoyin.ng@altera.com \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=dinguyen@kernel.org \
    --cc=gregkh@linuxfoundation.org \
    --cc=krzk+dt@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-usb@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).