From: "Rob Herring (Arm)" <robh@kernel.org>
To: Mark Brown <broonie@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH] spi: dt-bindings: snps,dw-abp-ssi: Allow up to 16 chip-selects
Date: Mon, 15 Dec 2025 17:03:22 -0600 [thread overview]
Message-ID: <20251215230323.3634112-1-robh@kernel.org> (raw)
At least the Microchip Sparx5 supports up to 16 chip-selects, so
increase the maximum. The pattern for the child unit-address was
unconstrained, so update it to match the maximum number of
chip-selects.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
index 5c87fc8a845d..81838577cf9c 100644
--- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
+++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
@@ -121,7 +121,7 @@ properties:
num-cs:
default: 4
minimum: 1
- maximum: 4
+ maximum: 16
dmas:
items:
@@ -153,14 +153,14 @@ properties:
provides an interface to override the native DWC SSI CS control.
patternProperties:
- "@[0-9a-f]+$":
+ "@[0-9a-f]$":
type: object
additionalProperties: true
properties:
reg:
minimum: 0
- maximum: 3
+ maximum: 0xf
unevaluatedProperties: false
--
2.51.0
next reply other threads:[~2025-12-15 23:03 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-15 23:03 Rob Herring (Arm) [this message]
2025-12-18 7:36 ` [PATCH] spi: dt-bindings: snps,dw-abp-ssi: Allow up to 16 chip-selects Mark Brown
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