From: Conor Dooley <conor@kernel.org>
To: Guodong Xu <guodong@riscstar.com>
Cc: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>, Yixun Lan <dlan@gentoo.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
Samuel Holland <samuel.holland@sifive.com>,
Anup Patel <anup@brainfault.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>,
Lubomir Rintel <lkundrak@v3.sk>, Yangyu Chen <cyy@cyyself.name>,
Paul Walmsley <paul.walmsley@sifive.com>,
Heinrich Schuchardt <xypron.glpk@gmx.de>,
Kevin Meng Zhang <zhangmeng.kevin@linux.spacemit.com>,
Andrew Jones <ajones@ventanamicro.com>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, spacemit@lists.linux.dev,
linux-serial@vger.kernel.org
Subject: Re: [PATCH v2 07/13] dt-bindings: riscv: Add B ISA extension description
Date: Wed, 24 Dec 2025 23:53:02 +0000 [thread overview]
Message-ID: <20251224-charcoal-woozy-d2138984e37a@spud> (raw)
In-Reply-To: <CAH1PCMZ7ywZ3unLy0yHYK+fFHk0y=q2cEtPnRi=qSpf=fc75rw@mail.gmail.com>
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On Tue, Dec 23, 2025 at 02:51:17PM +0800, Guodong Xu wrote:
> Hi, Conor
>
> On Tue, Dec 23, 2025 at 5:17 AM Conor Dooley <conor@kernel.org> wrote:
> >
> > On Mon, Dec 22, 2025 at 09:04:17PM +0800, Guodong Xu wrote:
> > > Add description of the single-letter "B" extennsion for Bit Manipulation.
> > > B is mandatory for RVA23U64.
> > >
> > > The B extension is ratified in the 20240411 version of the unprivileged
> > > ISA specification. According to the ratified spec, "the B standard
> > > extension comprises instructions provided by the Zba, Zbb, and Zbs
> > > extensions.
> > >
> > > Hence add a schema check rule to enforce that B implies Zba, Zbb and Zbs.
> > >
> > > Signed-off-by: Guodong Xu <guodong@riscstar.com>
> > > ---
> > > v2: New patch.
> > > ---
> > > .../devicetree/bindings/riscv/extensions.yaml | 19 +++++++++++++++++++
> > > 1 file changed, 19 insertions(+)
> > >
> > > diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
> > > index 565cb2cbb49b552959392810a9b731b43346a594..385e1deb23996d294e7662693f1257f910a6e129 100644
> > > --- a/Documentation/devicetree/bindings/riscv/extensions.yaml
> > > +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
> > > @@ -109,6 +109,13 @@ properties:
> > > The standard C extension for compressed instructions, as ratified in
> > > the 20191213 version of the unprivileged ISA specification.
> > >
> > > + - const: b
> > > + description:
> > > + The standard B extension for bit manipulation instructions, as
> > > + ratified in the 20240411 version of the unprivileged ISA
> > > + specification. The B standard extension comprises instructions
> > > + provided by the Zba, Zbb, and Zbs extensions.
> > > +
> > > - const: v
> > > description:
> > > The standard V extension for vector operations, as ratified
> > > @@ -735,6 +742,18 @@ properties:
> > > then:
> > > contains:
> > > const: f
> > > + # b comprises the following extensions
> > > + - if:
> > > + contains:
> > > + const: b
> >
> > What's the value in adding b, if it depends on having all 3 of the
> > components defined individually too? Currently all "superset" types of
> > extensions are permitted without their component parts also being defined,
> > this doesn't follow convention and therefore needs to be explained.
> >
> > You obviously need this construct because the kernel does not understand
> > "b", and even if you added support for interpreting "b" to the kernel
> > this is probably still needed to make sure the ABI is maintained for
> > anything importing a devicetree from the kernel.
>
> Yes, exactly. Unlike other single-letter extensions, "b" was ratified
> (Apr/2024) much later than its components zba/zbb/zbs (Jun/2021).
> Existing software and the kernel already expect these explicit component
> strings, so enforcing this dependency ensures cores declaring "b" will
> also be correctly understood by older software that only looks for
> zba/zbb/zbs.
>
> I will update the commit message in v3 to clearly explain this reasoning.
> Does it sound good to you?
Ye, sounds good.
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next prev parent reply other threads:[~2025-12-24 23:53 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-22 13:04 [PATCH v2 00/13] riscv: spacemit: Add SpacemiT K3 SoC and K3 Pico-ITX board Guodong Xu
2025-12-22 13:04 ` [PATCH v2 01/13] dt-bindings: riscv: add SpacemiT X100 CPU compatible Guodong Xu
2025-12-23 13:48 ` Krzysztof Kozlowski
2025-12-22 13:04 ` [PATCH v2 02/13] dt-bindings: timer: add SpacemiT K3 CLINT Guodong Xu
2025-12-22 13:04 ` [PATCH v2 03/13] dt-bindings: interrupt-controller: add SpacemiT K3 APLIC Guodong Xu
2025-12-22 13:04 ` [PATCH v2 04/13] dt-bindings: interrupt-controller: add SpacemiT K3 IMSIC Guodong Xu
2025-12-23 13:47 ` Krzysztof Kozlowski
2025-12-22 13:04 ` [PATCH v2 05/13] dt-bindings: serial: 8250: add SpacemiT K3 UART compatible Guodong Xu
2025-12-22 13:04 ` [PATCH v2 06/13] dt-bindings: riscv: spacemit: add K3 and Pico-ITX board bindings Guodong Xu
2025-12-22 13:04 ` [PATCH v2 07/13] dt-bindings: riscv: Add B ISA extension description Guodong Xu
2025-12-22 21:17 ` Conor Dooley
2025-12-23 6:51 ` Guodong Xu
2025-12-24 23:53 ` Conor Dooley [this message]
2025-12-26 21:28 ` Alex Elder
2025-12-28 2:51 ` Guodong Xu
2025-12-28 23:50 ` Alex Elder
2025-12-29 1:08 ` Guodong Xu
2025-12-29 1:26 ` Alex Elder
2025-12-30 17:09 ` Conor Dooley
2025-12-30 17:29 ` Alex Elder
2025-12-30 17:46 ` Conor Dooley
2025-12-30 18:06 ` Alex Elder
2025-12-30 19:21 ` Conor Dooley
2025-12-22 13:04 ` [PATCH v2 08/13] dt-bindings: riscv: Add descriptions for Za64rs, Ziccamoa, Ziccif, and Zicclsm Guodong Xu
2025-12-26 21:28 ` Alex Elder
2025-12-28 4:10 ` Guodong Xu
2025-12-28 23:50 ` Alex Elder
2025-12-30 0:56 ` Guodong Xu
2025-12-22 13:04 ` [PATCH v2 09/13] dt-bindings: riscv: Add Ssccptr, Sscounterenw, Sstvala, Sstvecd, Ssu64xl Guodong Xu
2025-12-26 21:28 ` Alex Elder
2025-12-28 12:31 ` Guodong Xu
2025-12-28 23:50 ` Alex Elder
2025-12-22 13:04 ` [PATCH v2 10/13] dt-bindings: riscv: Add Sha and its comprised extensions Guodong Xu
2025-12-26 21:28 ` Alex Elder
2025-12-28 12:43 ` Guodong Xu
2025-12-28 23:50 ` Alex Elder
2025-12-22 13:04 ` [PATCH v2 11/13] dt-bindings: riscv: Add Supm extension description Guodong Xu
2025-12-22 20:57 ` Conor Dooley
2025-12-26 21:28 ` Alex Elder
2025-12-30 2:13 ` Rob Herring
2025-12-30 3:14 ` Alex Elder
2025-12-30 15:21 ` Rob Herring
2025-12-30 17:37 ` Conor Dooley
2025-12-30 20:41 ` Heinrich Schuchardt
2026-01-01 0:08 ` Conor Dooley
2026-01-08 19:45 ` Samuel Holland
2025-12-30 18:01 ` Alex Elder
2025-12-30 17:22 ` Conor Dooley
2025-12-30 18:06 ` Alex Elder
2025-12-22 13:04 ` [PATCH v2 12/13] riscv: dts: spacemit: add initial device tree of SpacemiT K3 SoC Guodong Xu
2025-12-22 13:04 ` [PATCH v2 13/13] riscv: dts: spacemit: add SpacemiT K3 Pico-ITX board device tree Guodong Xu
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