[PATCH 2/4] mips: bmips: dts: fix {m,q}spi compatible order

Jonas Gorski
2025-12-25T10:26:19Z

The compatible order should be from most specific to least specific, but
the {m,q}spi controller nodes had theirs reversed.

The actual order does not matter, as the brcmmstb-qspi driver matches
both, which than calls bcm_qspi_probe(), which only checks for the
presence of the *-qspi compatible.

Fixes warnings like:

arch/mips/boot/dts/brcm/bcm97425svmb.dtb: spi@409200 (brcm,spi-bcm-qspi): compatible: 'oneOf' conditional failed, one must be fixed:
['brcm,spi-bcm-qspi', 'brcm,spi-brcmstb-mspi'] is too short
'brcm,spi-bcm-qspi' is not one of ['brcm,spi-bcm7425-qspi', 'brcm,spi-bcm7429-qspi', 'brcm,spi-bcm7435-qspi', 'brcm,spi-bcm7445-qspi', 'brcm,spi-bcm7216-qspi', 'brcm,spi-bcm7278-qspi']
'brcm,spi-bcm-qspi' is not one of ['brcm,spi-brcmstb-qspi', 'brcm,spi-brcmstb-mspi', 'brcm,spi-nsp-qspi', 'brcm,spi-ns2-qspi']
'brcm,spi-bcm-qspi' was expected
from schema $id: http://devicetree.org/schemas/spi/brcm,spi-bcm-qspi.yaml

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
arch/mips/boot/dts/brcm/bcm7125.dtsi | 8 ++++----
arch/mips/boot/dts/brcm/bcm7346.dtsi | 8 ++++----
arch/mips/boot/dts/brcm/bcm7358.dtsi | 8 ++++----
arch/mips/boot/dts/brcm/bcm7360.dtsi | 8 ++++----
arch/mips/boot/dts/brcm/bcm7362.dtsi | 8 ++++----
arch/mips/boot/dts/brcm/bcm7420.dtsi | 8 ++++----
arch/mips/boot/dts/brcm/bcm7425.dtsi | 8 ++++----
arch/mips/boot/dts/brcm/bcm7435.dtsi | 8 ++++----
8 files changed, 32 insertions(+), 32 deletions(-)

diff --git a/arch/mips/boot/dts/brcm/bcm7125.dtsi b/arch/mips/boot/dts/brcm/bcm7125.dtsi
index 5bf77b6fcceb..92963a1998b7 100644
--- a/arch/mips/boot/dts/brcm/bcm7125.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7125.dtsi
@@ -247,8 +247,8 @@ spi_l2_intc: interrupt-controller@411d00 {
qspi: spi@443000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
- compatible = "brcm,spi-bcm-qspi",
- "brcm,spi-brcmstb-qspi";
+ compatible = "brcm,spi-brcmstb-qspi",
+ "brcm,spi-bcm-qspi";
clocks = <&upg_clk>;
reg = <0x440920 0x4 0x443200 0x188 0x443000 0x50>;
reg-names = "cs_reg", "hif_mspi", "bspi";
@@ -267,8 +267,8 @@ qspi: spi@443000 {
mspi: spi@406400 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "brcm,spi-bcm-qspi",
- "brcm,spi-brcmstb-mspi";
+ compatible = "brcm,spi-brcmstb-mspi",
+ "brcm,spi-bcm-qspi";
clocks = <&upg_clk>;
reg = <0x406400 0x180>;
reg-names = "mspi";
diff --git a/arch/mips/boot/dts/brcm/bcm7346.dtsi b/arch/mips/boot/dts/brcm/bcm7346.dtsi
index 9d6f97e02ff9..42125684b523 100644
--- a/arch/mips/boot/dts/brcm/bcm7346.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7346.dtsi
@@ -471,8 +471,8 @@ spi_l2_intc: interrupt-controller@411d00 {
qspi: spi@413000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
- compatible = "brcm,spi-bcm-qspi",
- "brcm,spi-brcmstb-qspi";
+ compatible = "brcm,spi-brcmstb-qspi",
+ "brcm,spi-bcm-qspi";
clocks = <&upg_clk>;
reg = <0x410920 0x4 0x413200 0x188 0x413000 0x50>;
reg-names = "cs_reg", "hif_mspi", "bspi";
@@ -491,8 +491,8 @@ qspi: spi@413000 {
mspi: spi@408a00 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "brcm,spi-bcm-qspi",
- "brcm,spi-brcmstb-mspi";
+ compatible = "brcm,spi-brcmstb-mspi",
+ "brcm,spi-bcm-qspi";
clocks = <&upg_clk>;
reg = <0x408a00 0x180>;
reg-names = "mspi";
diff --git a/arch/mips/boot/dts/brcm/bcm7358.dtsi b/arch/mips/boot/dts/brcm/bcm7358.dtsi
index 6375fc77f389..fdc52acab8c8 100644
--- a/arch/mips/boot/dts/brcm/bcm7358.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7358.dtsi
@@ -339,8 +339,8 @@ spi_l2_intc: interrupt-controller@411d00 {
qspi: spi@413000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
- compatible = "brcm,spi-bcm-qspi",
- "brcm,spi-brcmstb-qspi";
+ compatible = "brcm,spi-brcmstb-qspi",
+ "brcm,spi-bcm-qspi";
clocks = <&upg_clk>;
reg = <0x410920 0x4 0x413200 0x188 0x413000 0x50>;
reg-names = "cs_reg", "hif_mspi", "bspi";
@@ -359,8 +359,8 @@ qspi: spi@413000 {
mspi: spi@408a00 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "brcm,spi-bcm-qspi",
- "brcm,spi-brcmstb-mspi";
+ compatible = "brcm,spi-brcmstb-mspi",
+ "brcm,spi-bcm-qspi";
clocks = <&upg_clk>;
reg = <0x408a00 0x180>;
reg-names = "mspi";
diff --git a/arch/mips/boot/dts/brcm/bcm7360.dtsi b/arch/mips/boot/dts/brcm/bcm7360.dtsi
index a7f60f059e50..e8b0b0ff7588 100644
--- a/arch/mips/boot/dts/brcm/bcm7360.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7360.dtsi
@@ -390,8 +390,8 @@ spi_l2_intc: interrupt-controller@411d00 {
qspi: spi@413000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
- compatible = "brcm,spi-bcm-qspi",
- "brcm,spi-brcmstb-qspi";
+ compatible = "brcm,spi-brcmstb-qspi",
+ "brcm,spi-bcm-qspi";
clocks = <&upg_clk>;
reg = <0x410920 0x4 0x413200 0x188 0x413000 0x50>;
reg-names = "cs_reg", "hif_mspi", "bspi";
@@ -410,8 +410,8 @@ qspi: spi@413000 {
mspi: spi@408a00 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "brcm,spi-bcm-qspi",
- "brcm,spi-brcmstb-mspi";
+ compatible = "brcm,spi-brcmstb-mspi",
+ "brcm,spi-bcm-qspi";
clocks = <&upg_clk>;
reg = <0x408a00 0x180>;
reg-names = "mspi";
diff --git a/arch/mips/boot/dts/brcm/bcm7362.dtsi b/arch/mips/boot/dts/brcm/bcm7362.dtsi
index 2d483cbf254f..a1ed0b193389 100644
--- a/arch/mips/boot/dts/brcm/bcm7362.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7362.dtsi
@@ -386,8 +386,8 @@ spi_l2_intc: interrupt-controller@411d00 {
qspi: spi@413000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
- compatible = "brcm,spi-bcm-qspi",
- "brcm,spi-brcmstb-qspi";
+ compatible = "brcm,spi-brcmstb-qspi",
+ "brcm,spi-bcm-qspi";
clocks = <&upg_clk>;
reg = <0x410920 0x4 0x413200 0x188 0x413000 0x50>;
reg-names = "cs_reg", "hif_mspi", "bspi";
@@ -406,8 +406,8 @@ qspi: spi@413000 {
mspi: spi@408a00 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "brcm,spi-bcm-qspi",
- "brcm,spi-brcmstb-mspi";
+ compatible = "brcm,spi-brcmstb-mspi",
+ "brcm,spi-bcm-qspi";
clocks = <&upg_clk>;
reg = <0x408a00 0x180>;
reg-names = "mspi";
diff --git a/arch/mips/boot/dts/brcm/bcm7420.dtsi b/arch/mips/boot/dts/brcm/bcm7420.dtsi
index 9540c27f12e7..62e7e1602d4e 100644
--- a/arch/mips/boot/dts/brcm/bcm7420.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7420.dtsi
@@ -308,8 +308,8 @@ spi_l2_intc: interrupt-controller@411d00 {
qspi: spi@443000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
- compatible = "brcm,spi-bcm-qspi",
- "brcm,spi-brcmstb-qspi";
+ compatible = "brcm,spi-brcmstb-qspi",
+ "brcm,spi-bcm-qspi";
clocks = <&upg_clk>;
reg = <0x440920 0x4 0x443200 0x188 0x443000 0x50>;
reg-names = "cs_reg", "hif_mspi", "bspi";
@@ -328,8 +328,8 @@ qspi: spi@443000 {
mspi: spi@406400 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "brcm,spi-bcm-qspi",
- "brcm,spi-brcmstb-mspi";
+ compatible = "brcm,spi-brcmstb-mspi",
+ "brcm,spi-bcm-qspi";
clocks = <&upg_clk>;
reg = <0x406400 0x180>;
reg-names = "mspi";
diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi
index c3bb020ff2b5..71422fd2ecc9 100644
--- a/arch/mips/boot/dts/brcm/bcm7425.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi
@@ -482,8 +482,8 @@ spi_l2_intc: interrupt-controller@41ad00 {
qspi: spi@41c000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
- compatible = "brcm,spi-bcm-qspi",
- "brcm,spi-brcmstb-qspi";
+ compatible = "brcm,spi-brcmstb-qspi",
+ "brcm,spi-bcm-qspi";
clocks = <&upg_clk>;
reg = <0x419920 0x4 0x41c200 0x188 0x41c000 0x50>;
reg-names = "cs_reg", "hif_mspi", "bspi";
@@ -502,8 +502,8 @@ qspi: spi@41c000 {
mspi: spi@409200 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "brcm,spi-bcm-qspi",
- "brcm,spi-brcmstb-mspi";
+ compatible = "brcm,spi-brcmstb-mspi",
+ "brcm,spi-bcm-qspi";
clocks = <&upg_clk>;
reg = <0x409200 0x180>;
reg-names = "mspi";
diff --git a/arch/mips/boot/dts/brcm/bcm7435.dtsi b/arch/mips/boot/dts/brcm/bcm7435.dtsi
index 60cfa4074cce..38eea5373b66 100644
--- a/arch/mips/boot/dts/brcm/bcm7435.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7435.dtsi
@@ -498,8 +498,8 @@ spi_l2_intc: interrupt-controller@41bd00 {
qspi: spi@41d200 {
#address-cells = <0x1>;
#size-cells = <0x0>;
- compatible = "brcm,spi-bcm-qspi",
- "brcm,spi-brcmstb-qspi";
+ compatible = "brcm,spi-brcmstb-qspi",
+ "brcm,spi-bcm-qspi";
clocks = <&upg_clk>;
reg = <0x41a920 0x4 0x41d400 0x188 0x41d200 0x50>;
reg-names = "cs_reg", "hif_mspi", "bspi";
@@ -518,8 +518,8 @@ qspi: spi@41d200 {
mspi: spi@409200 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "brcm,spi-bcm-qspi",
- "brcm,spi-brcmstb-mspi";
+ compatible = "brcm,spi-brcmstb-mspi",
+ "brcm,spi-bcm-qspi";
clocks = <&upg_clk>;
reg = <0x409200 0x180>;
reg-names = "mspi";
--
2.43.0