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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Cc: Rob Herring <robh@kernel.org>,
	 Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>, Yixun Lan <dlan@gentoo.org>,
	 Paul Walmsley <pjw@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	 Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>,
	 Linus Walleij <linusw@kernel.org>,
	devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
	 spacemit@lists.linux.dev, linux-kernel@vger.kernel.org,
	linux-gpio@vger.kernel.org
Subject: Re: [PATCH 2/2] pinctrl: spacemit: support I/O power domain configuration
Date: Sat, 27 Dec 2025 14:00:21 +0100	[thread overview]
Message-ID: <20251227-pastel-certain-orca-4b53cf@quoll> (raw)
In-Reply-To: <20251223-kx-pinctrl-aib-io-pwr-domain-v1-2-5f1090a487c7@linux.spacemit.com>

On Tue, Dec 23, 2025 at 05:11:12PM +0800, Troy Mitchell wrote:
> IO domain power control registers are used to configure the operating
> voltage of dual-voltage GPIO banks. By default, these registers are
> configured for 3.3V operation. As a result, even when a GPIO bank is
> externally supplied with 1.8V, the internal logic continues to
> operate in the 3.3V domain, which may lead to functional failures.
> 
> This patch adds support for programming the IO domain power control

Please do not use "This commit/patch/change", but imperative mood. See
longer explanation here:
https://elixir.bootlin.com/linux/v6.16/source/Documentation/process/submitting-patches.rst#L94

> registers, allowing dual-voltage GPIO banks to be explicitly configured
> for 1.8V operation when required.
> 
> Care must be taken when configuring these registers. If a GPIO bank is
> externally supplied with 3.3V while the corresponding IO power domain
> is configured for 1.8V, external current injection (back-powering)
> may occur, potentially causing damage to the GPIO pin.
> 
> Due to these hardware constraints and safety considerations, the IO
> domain power control registers are implemented as secure registers.
> Access to these registers requires unlocking via the AIB Secure Access
> Register (ASAR) in the APBC block before a single read or write
> operation can be performed.
> 
> Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
> ---
>  arch/riscv/boot/dts/spacemit/k1.dtsi  |   4 +-

No, this never, never comes together with driver code. You cannot fix
non-bisectability and ABI break that way.

Read carefully maintainers soc profile and submitting patches in DT dir.

...


>  static int spacemit_pinctrl_probe(struct platform_device *pdev)
>  {
> +	struct device_node *np = pdev->dev.of_node;
>  	struct device *dev = &pdev->dev;
>  	struct spacemit_pinctrl *pctrl;
>  	struct clk *func_clk, *bus_clk;
> @@ -816,6 +927,18 @@ static int spacemit_pinctrl_probe(struct platform_device *pdev)
>  	if (IS_ERR(pctrl->regs))
>  		return PTR_ERR(pctrl->regs);
>  
> +	pctrl->io_pd_reg = devm_platform_ioremap_resource(pdev, 1);
> +	if (IS_ERR(pctrl->io_pd_reg))
> +		return PTR_ERR(pctrl->io_pd_reg);
> +
> +	pctrl->regmap_apbc =
> +		syscon_regmap_lookup_by_phandle_args(np, "spacemit,apbc", 1,
> +						     &pctrl->regmap_apbc_offset);
> +
> +	if (IS_ERR(pctrl->regmap_apbc))
> +		return dev_err_probe(dev, PTR_ERR(pctrl->regmap_apbc),
> +				     "failed to get syscon\n");

Actual ABI break.

Best regards,
Krzysztof


  parent reply	other threads:[~2025-12-27 13:00 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-23  9:11 [PATCH 0/2] pinctrl: spacemit: support I/O power domain configuration Troy Mitchell
2025-12-23  9:11 ` [PATCH 1/2] dt-bindings: pinctrl: add syscon property Troy Mitchell
2025-12-27 12:58   ` Krzysztof Kozlowski
2025-12-27 12:58   ` Krzysztof Kozlowski
2026-01-08  6:04     ` Troy Mitchell
2026-01-01 22:54   ` Linus Walleij
2026-01-08  6:04     ` Troy Mitchell
2025-12-23  9:11 ` [PATCH 2/2] pinctrl: spacemit: support I/O power domain configuration Troy Mitchell
2025-12-23  9:32   ` Yixun Lan
2025-12-23  9:42     ` Troy Mitchell
2026-01-01 22:58       ` Linus Walleij
2025-12-23  9:42   ` Inochi Amaoto
2025-12-23  9:50     ` Troy Mitchell
2025-12-23 13:03       ` Yao Zi
2025-12-25  7:07         ` Troy Mitchell
2025-12-27 13:00   ` Krzysztof Kozlowski [this message]
2026-01-08  4:27     ` Yixun Lan
2026-01-08  6:06       ` Troy Mitchell

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