* [PATCH v3 1/3] dt-bindings: usb: Add binding for WCH CH334/CH335 hub controller
2026-01-12 2:28 [PATCH v3 0/3] arm64: dts: rockchip: Add rk3576 evb2 board Chaoyi Chen
@ 2026-01-12 2:28 ` Chaoyi Chen
2026-01-12 8:50 ` Krzysztof Kozlowski
2026-01-12 14:00 ` Quentin Schulz
2026-01-12 2:28 ` [PATCH v3 2/3] dt-bindings: arm: rockchip: Add rk3576 evb2 board Chaoyi Chen
2026-01-12 2:28 ` [PATCH v3 3/3] arm64: dts: " Chaoyi Chen
2 siblings, 2 replies; 12+ messages in thread
From: Chaoyi Chen @ 2026-01-12 2:28 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
Greg Kroah-Hartman, Quentin Schulz, Jonas Karlman, Chaoyi Chen,
Hsun Lai, John Clark, Jimmy Hon, Dragan Simic, Michael Riesch,
Peter Robinson, Alexey Charkov, Shawn Lin, Sebastian Reichel,
Andy Yan
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
linux-usb
From: Chaoyi Chen <chaoyi.chen@rock-chips.com>
The WCH CH334/CH335[0] are USB2.0 protocol compliant 4-port USB HUB
controller chips, supporting USB2.0 high-speed and full-speed for
upstream ports, and USB2.0 high-speed 480Mbps, full-speed 12Mbps and
low-speed 1.5Mbps for downstream ports, supporting not only low-cost STT
mode (single TT schedules 4 downstream ports in time share), but also
supports high performance MTT mode (4 TTs each corresponding to 1 port,
concurrent processing).
Add a device tree binding for it.
[0]: https://www.wch-ic.com/downloads/CH334DS1_PDF.html
Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
---
.../devicetree/bindings/usb/wch,ch334.yaml | 65 +++++++++++++++++++
1 file changed, 65 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/wch,ch334.yaml
diff --git a/Documentation/devicetree/bindings/usb/wch,ch334.yaml b/Documentation/devicetree/bindings/usb/wch,ch334.yaml
new file mode 100644
index 000000000000..2eeb92f25b4c
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/wch,ch334.yaml
@@ -0,0 +1,65 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/wch,ch334.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: WCH CH334/CH335 USB 2.0 Hub Controller
+
+maintainers:
+ - Chaoyi Chen <kernel@airkyi.com>
+
+allOf:
+ - $ref: usb-hub.yaml#
+
+properties:
+ compatible:
+ enum:
+ - usb1a86,8091
+
+ reg: true
+
+ reset-gpios:
+ description: GPIO controlling the RESET# pin.
+
+ vdd-supply:
+ description:
+ The regulator that provides 3.3V core power to the hub.
+
+ vdd2-supply:
+ description:
+ The regulator that provides 3.3V or 5V power to the hub.
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ patternProperties:
+ '^port@':
+ $ref: /schemas/graph.yaml#/properties/port
+
+ properties:
+ reg:
+ minimum: 1
+ maximum: 4
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+ usb {
+ dr_mode = "host";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hub: hub@1 {
+ compatible = "usb1a86,8091";
+ reg = <1>;
+ reset-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
+ vdd-supply = <&vcc_3v3>;
+ };
+ };
--
2.51.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v3 1/3] dt-bindings: usb: Add binding for WCH CH334/CH335 hub controller
2026-01-12 2:28 ` [PATCH v3 1/3] dt-bindings: usb: Add binding for WCH CH334/CH335 hub controller Chaoyi Chen
@ 2026-01-12 8:50 ` Krzysztof Kozlowski
2026-01-12 8:59 ` Chaoyi Chen
2026-01-12 14:00 ` Quentin Schulz
1 sibling, 1 reply; 12+ messages in thread
From: Krzysztof Kozlowski @ 2026-01-12 8:50 UTC (permalink / raw)
To: Chaoyi Chen
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
Greg Kroah-Hartman, Quentin Schulz, Jonas Karlman, Chaoyi Chen,
Hsun Lai, John Clark, Jimmy Hon, Dragan Simic, Michael Riesch,
Peter Robinson, Alexey Charkov, Shawn Lin, Sebastian Reichel,
Andy Yan, devicetree, linux-arm-kernel, linux-rockchip,
linux-kernel, linux-usb
On Mon, Jan 12, 2026 at 10:28:21AM +0800, Chaoyi Chen wrote:
> From: Chaoyi Chen <chaoyi.chen@rock-chips.com>
>
> The WCH CH334/CH335[0] are USB2.0 protocol compliant 4-port USB HUB
> controller chips, supporting USB2.0 high-speed and full-speed for
> upstream ports, and USB2.0 high-speed 480Mbps, full-speed 12Mbps and
> low-speed 1.5Mbps for downstream ports, supporting not only low-cost STT
> mode (single TT schedules 4 downstream ports in time share), but also
> supports high performance MTT mode (4 TTs each corresponding to 1 port,
> concurrent processing).
>
> Add a device tree binding for it.
>
> [0]: https://www.wch-ic.com/downloads/CH334DS1_PDF.html
>
> Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
> ---
> .../devicetree/bindings/usb/wch,ch334.yaml | 65 +++++++++++++++++++
This must be separate patch. Do not combine independent subsystems into
one patchset.
> 1 file changed, 65 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/usb/wch,ch334.yaml
>
> diff --git a/Documentation/devicetree/bindings/usb/wch,ch334.yaml b/Documentation/devicetree/bindings/usb/wch,ch334.yaml
> new file mode 100644
> index 000000000000..2eeb92f25b4c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/wch,ch334.yaml
> @@ -0,0 +1,65 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/usb/wch,ch334.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: WCH CH334/CH335 USB 2.0 Hub Controller
> +
> +maintainers:
> + - Chaoyi Chen <kernel@airkyi.com>
> +
> +allOf:
> + - $ref: usb-hub.yaml#
> +
> +properties:
> + compatible:
> + enum:
> + - usb1a86,8091
> +
> + reg: true
> +
> + reset-gpios:
> + description: GPIO controlling the RESET# pin.
> +
> + vdd-supply:
> + description:
> + The regulator that provides 3.3V core power to the hub.
> +
> + vdd2-supply:
> + description:
> + The regulator that provides 3.3V or 5V power to the hub.
> +
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> +
> + patternProperties:
> + '^port@':
> + $ref: /schemas/graph.yaml#/properties/port
> +
> + properties:
> + reg:
> + minimum: 1
> + maximum: 4
> +
> +required:
> + - compatible
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/gpio/gpio.h>
> + usb {
> + dr_mode = "host";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + hub: hub@1 {
> + compatible = "usb1a86,8091";
> + reg = <1>;
> + reset-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
Are you sure?
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v3 1/3] dt-bindings: usb: Add binding for WCH CH334/CH335 hub controller
2026-01-12 8:50 ` Krzysztof Kozlowski
@ 2026-01-12 8:59 ` Chaoyi Chen
2026-01-12 14:28 ` Krzysztof Kozlowski
0 siblings, 1 reply; 12+ messages in thread
From: Chaoyi Chen @ 2026-01-12 8:59 UTC (permalink / raw)
To: Krzysztof Kozlowski, Chaoyi Chen
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
Greg Kroah-Hartman, Quentin Schulz, Jonas Karlman, Hsun Lai,
John Clark, Jimmy Hon, Dragan Simic, Michael Riesch,
Peter Robinson, Alexey Charkov, Shawn Lin, Sebastian Reichel,
Andy Yan, devicetree, linux-arm-kernel, linux-rockchip,
linux-kernel, linux-usb
Hi Krzysztof,
On 1/12/2026 4:50 PM, Krzysztof Kozlowski wrote:
> On Mon, Jan 12, 2026 at 10:28:21AM +0800, Chaoyi Chen wrote:
>> From: Chaoyi Chen <chaoyi.chen@rock-chips.com>
>>
>> The WCH CH334/CH335[0] are USB2.0 protocol compliant 4-port USB HUB
>> controller chips, supporting USB2.0 high-speed and full-speed for
>> upstream ports, and USB2.0 high-speed 480Mbps, full-speed 12Mbps and
>> low-speed 1.5Mbps for downstream ports, supporting not only low-cost STT
>> mode (single TT schedules 4 downstream ports in time share), but also
>> supports high performance MTT mode (4 TTs each corresponding to 1 port,
>> concurrent processing).
>>
>> Add a device tree binding for it.
>>
>> [0]: https://www.wch-ic.com/downloads/CH334DS1_PDF.html
>>
>> Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
>> ---
>> .../devicetree/bindings/usb/wch,ch334.yaml | 65 +++++++++++++++++++
>
> This must be separate patch. Do not combine independent subsystems into
> one patchset.
>
Okay, thank you for the reminder.
>> 1 file changed, 65 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/usb/wch,ch334.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/usb/wch,ch334.yaml b/Documentation/devicetree/bindings/usb/wch,ch334.yaml
>> new file mode 100644
>> index 000000000000..2eeb92f25b4c
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/usb/wch,ch334.yaml
>> @@ -0,0 +1,65 @@
>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/usb/wch,ch334.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: WCH CH334/CH335 USB 2.0 Hub Controller
>> +
>> +maintainers:
>> + - Chaoyi Chen <kernel@airkyi.com>
>> +
>> +allOf:
>> + - $ref: usb-hub.yaml#
>> +
>> +properties:
>> + compatible:
>> + enum:
>> + - usb1a86,8091
>> +
>> + reg: true
>> +
>> + reset-gpios:
>> + description: GPIO controlling the RESET# pin.
>> +
>> + vdd-supply:
>> + description:
>> + The regulator that provides 3.3V core power to the hub.
>> +
>> + vdd2-supply:
>> + description:
>> + The regulator that provides 3.3V or 5V power to the hub.
>> +
>> + ports:
>> + $ref: /schemas/graph.yaml#/properties/ports
>> +
>> + patternProperties:
>> + '^port@':
>> + $ref: /schemas/graph.yaml#/properties/port
>> +
>> + properties:
>> + reg:
>> + minimum: 1
>> + maximum: 4
>> +
>> +required:
>> + - compatible
>> + - reg
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> + - |
>> + #include <dt-bindings/gpio/gpio.h>
>> + usb {
>> + dr_mode = "host";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + hub: hub@1 {
>> + compatible = "usb1a86,8091";
>> + reg = <1>;
>> + reset-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
>
> Are you sure?
I guess what you're concerned about here is the polarity?
If that's the case, then there's no problem.
--
Best,
Chaoyi
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v3 1/3] dt-bindings: usb: Add binding for WCH CH334/CH335 hub controller
2026-01-12 8:59 ` Chaoyi Chen
@ 2026-01-12 14:28 ` Krzysztof Kozlowski
2026-01-13 3:27 ` Chaoyi Chen
0 siblings, 1 reply; 12+ messages in thread
From: Krzysztof Kozlowski @ 2026-01-12 14:28 UTC (permalink / raw)
To: Chaoyi Chen, Chaoyi Chen
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
Greg Kroah-Hartman, Quentin Schulz, Jonas Karlman, Hsun Lai,
John Clark, Jimmy Hon, Dragan Simic, Michael Riesch,
Peter Robinson, Alexey Charkov, Shawn Lin, Sebastian Reichel,
Andy Yan, devicetree, linux-arm-kernel, linux-rockchip,
linux-kernel, linux-usb
On 12/01/2026 09:59, Chaoyi Chen wrote:
>>> +required:
>>> + - compatible
>>> + - reg
>>> +
>>> +additionalProperties: false
>>> +
>>> +examples:
>>> + - |
>>> + #include <dt-bindings/gpio/gpio.h>
>>> + usb {
>>> + dr_mode = "host";
One more thing - drop above line.
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + hub: hub@1 {
>>> + compatible = "usb1a86,8091";
>>> + reg = <1>;
>>> + reset-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
>>
>> Are you sure?
>
> I guess what you're concerned about here is the polarity?
> If that's the case, then there's no problem.
Yes, I was wondering whether polarity is set correctly.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v3 1/3] dt-bindings: usb: Add binding for WCH CH334/CH335 hub controller
2026-01-12 14:28 ` Krzysztof Kozlowski
@ 2026-01-13 3:27 ` Chaoyi Chen
2026-01-13 3:45 ` Chaoyi Chen
2026-01-13 7:41 ` Krzysztof Kozlowski
0 siblings, 2 replies; 12+ messages in thread
From: Chaoyi Chen @ 2026-01-13 3:27 UTC (permalink / raw)
To: Krzysztof Kozlowski, Chaoyi Chen
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
Greg Kroah-Hartman, Quentin Schulz, Jonas Karlman, Hsun Lai,
John Clark, Jimmy Hon, Dragan Simic, Michael Riesch,
Peter Robinson, Alexey Charkov, Shawn Lin, Sebastian Reichel,
Andy Yan, devicetree, linux-arm-kernel, linux-rockchip,
linux-kernel, linux-usb
Hi Krzysztof,
On 1/12/2026 10:28 PM, Krzysztof Kozlowski wrote:
> On 12/01/2026 09:59, Chaoyi Chen wrote:
>>>> +required:
>>>> + - compatible
>>>> + - reg
>>>> +
>>>> +additionalProperties: false
>>>> +
>>>> +examples:
>>>> + - |
>>>> + #include <dt-bindings/gpio/gpio.h>
>>>> + usb {
>>>> + dr_mode = "host";
>
> One more thing - drop above line.
>
Will fix in next version.
>>>> + #address-cells = <1>;
>>>> + #size-cells = <0>;
>>>> +
>>>> + hub: hub@1 {
>>>> + compatible = "usb1a86,8091";
>>>> + reg = <1>;
>>>> + reset-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
>>>
>>> Are you sure?
>>
>> I guess what you're concerned about here is the polarity?
>> If that's the case, then there's no problem.
>
> Yes, I was wondering whether polarity is set correctly.
Yes, it is active-low, so during normal operation it should be set to high.
--
Best,
Chaoyi
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v3 1/3] dt-bindings: usb: Add binding for WCH CH334/CH335 hub controller
2026-01-13 3:27 ` Chaoyi Chen
@ 2026-01-13 3:45 ` Chaoyi Chen
2026-01-13 7:41 ` Krzysztof Kozlowski
1 sibling, 0 replies; 12+ messages in thread
From: Chaoyi Chen @ 2026-01-13 3:45 UTC (permalink / raw)
To: Krzysztof Kozlowski, Chaoyi Chen
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
Greg Kroah-Hartman, Quentin Schulz, Jonas Karlman, Hsun Lai,
John Clark, Jimmy Hon, Dragan Simic, Michael Riesch,
Peter Robinson, Alexey Charkov, Shawn Lin, Sebastian Reichel,
Andy Yan, devicetree, linux-arm-kernel, linux-rockchip,
linux-kernel, linux-usb
On 1/13/2026 11:27 AM, Chaoyi Chen wrote:
> Hi Krzysztof,
>
> On 1/12/2026 10:28 PM, Krzysztof Kozlowski wrote:
>> On 12/01/2026 09:59, Chaoyi Chen wrote:
>>>>> +required:
>>>>> + - compatible
>>>>> + - reg
>>>>> +
>>>>> +additionalProperties: false
>>>>> +
>>>>> +examples:
>>>>> + - |
>>>>> + #include <dt-bindings/gpio/gpio.h>
>>>>> + usb {
>>>>> + dr_mode = "host";
>>
>> One more thing - drop above line.
>>
>
> Will fix in next version.
>
>>>>> + #address-cells = <1>;
>>>>> + #size-cells = <0>;
>>>>> +
>>>>> + hub: hub@1 {
>>>>> + compatible = "usb1a86,8091";
>>>>> + reg = <1>;
>>>>> + reset-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
>>>>
>>>> Are you sure?
>>>
>>> I guess what you're concerned about here is the polarity?
>>> If that's the case, then there's no problem.
>>
>> Yes, I was wondering whether polarity is set correctly.
>
> Yes, it is active-low, so during normal operation it should be set to high.
>
Sorry, I didn't consider the driver situation.
I will fix it in the next version.
--
Best,
Chaoyi
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v3 1/3] dt-bindings: usb: Add binding for WCH CH334/CH335 hub controller
2026-01-13 3:27 ` Chaoyi Chen
2026-01-13 3:45 ` Chaoyi Chen
@ 2026-01-13 7:41 ` Krzysztof Kozlowski
1 sibling, 0 replies; 12+ messages in thread
From: Krzysztof Kozlowski @ 2026-01-13 7:41 UTC (permalink / raw)
To: Chaoyi Chen, Chaoyi Chen
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
Greg Kroah-Hartman, Quentin Schulz, Jonas Karlman, Hsun Lai,
John Clark, Jimmy Hon, Dragan Simic, Michael Riesch,
Peter Robinson, Alexey Charkov, Shawn Lin, Sebastian Reichel,
Andy Yan, devicetree, linux-arm-kernel, linux-rockchip,
linux-kernel, linux-usb
On 13/01/2026 04:27, Chaoyi Chen wrote:
> Hi Krzysztof,
>
> On 1/12/2026 10:28 PM, Krzysztof Kozlowski wrote:
>> On 12/01/2026 09:59, Chaoyi Chen wrote:
>>>>> +required:
>>>>> + - compatible
>>>>> + - reg
>>>>> +
>>>>> +additionalProperties: false
>>>>> +
>>>>> +examples:
>>>>> + - |
>>>>> + #include <dt-bindings/gpio/gpio.h>
>>>>> + usb {
>>>>> + dr_mode = "host";
>>
>> One more thing - drop above line.
>>
>
> Will fix in next version.
>
>>>>> + #address-cells = <1>;
>>>>> + #size-cells = <0>;
>>>>> +
>>>>> + hub: hub@1 {
>>>>> + compatible = "usb1a86,8091";
>>>>> + reg = <1>;
>>>>> + reset-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
>>>>
>>>> Are you sure?
>>>
>>> I guess what you're concerned about here is the polarity?
>>> If that's the case, then there's no problem.
>>
>> Yes, I was wondering whether polarity is set correctly.
>
> Yes, it is active-low, so during normal operation it should be set to high.
Then it is wrong.
>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 1/3] dt-bindings: usb: Add binding for WCH CH334/CH335 hub controller
2026-01-12 2:28 ` [PATCH v3 1/3] dt-bindings: usb: Add binding for WCH CH334/CH335 hub controller Chaoyi Chen
2026-01-12 8:50 ` Krzysztof Kozlowski
@ 2026-01-12 14:00 ` Quentin Schulz
2026-01-13 3:38 ` Chaoyi Chen
1 sibling, 1 reply; 12+ messages in thread
From: Quentin Schulz @ 2026-01-12 14:00 UTC (permalink / raw)
To: Chaoyi Chen, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Heiko Stuebner, Greg Kroah-Hartman, Jonas Karlman, Chaoyi Chen,
Hsun Lai, John Clark, Jimmy Hon, Dragan Simic, Michael Riesch,
Peter Robinson, Alexey Charkov, Shawn Lin, Sebastian Reichel,
Andy Yan
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
linux-usb
Hi Chaoyi,
On 1/12/26 3:28 AM, Chaoyi Chen wrote:
> From: Chaoyi Chen <chaoyi.chen@rock-chips.com>
>
> The WCH CH334/CH335[0] are USB2.0 protocol compliant 4-port USB HUB
> controller chips, supporting USB2.0 high-speed and full-speed for
> upstream ports, and USB2.0 high-speed 480Mbps, full-speed 12Mbps and
> low-speed 1.5Mbps for downstream ports, supporting not only low-cost STT
> mode (single TT schedules 4 downstream ports in time share), but also
> supports high performance MTT mode (4 TTs each corresponding to 1 port,
> concurrent processing).
>
> Add a device tree binding for it.
>
> [0]: https://www.wch-ic.com/downloads/CH334DS1_PDF.html
>
> Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
> ---
> .../devicetree/bindings/usb/wch,ch334.yaml | 65 +++++++++++++++++++
> 1 file changed, 65 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/usb/wch,ch334.yaml
>
> diff --git a/Documentation/devicetree/bindings/usb/wch,ch334.yaml b/Documentation/devicetree/bindings/usb/wch,ch334.yaml
> new file mode 100644
> index 000000000000..2eeb92f25b4c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/wch,ch334.yaml
> @@ -0,0 +1,65 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/usb/wch,ch334.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: WCH CH334/CH335 USB 2.0 Hub Controller
> +
> +maintainers:
> + - Chaoyi Chen <kernel@airkyi.com>
> +
> +allOf:
> + - $ref: usb-hub.yaml#
> +
> +properties:
> + compatible:
> + enum:
> + - usb1a86,8091
> +
Which driver does this node bind to? I couldn't quickly find a driver
which would match this compatible?
> + reg: true
> +
> + reset-gpios:
> + description: GPIO controlling the RESET# pin.
> +
> + vdd-supply:
> + description:
> + The regulator that provides 3.3V core power to the hub.
> +
> + vdd2-supply:
> + description:
> + The regulator that provides 3.3V or 5V power to the hub.
> +
There's v5 and vdd33 as power input, shouldn't we maybe use those names
instead? How did you come up with vdd/vdd2?
There's also a timing that needs to be respected after a power-on event
so that the reset has enough time to be performed, c.f. 3.2.1 Power-on
Reset in the datasheet you linked to in the commit log. How are you
making sure we wait those (apparently, the wording in the datasheet is
confusing) 14ms?
Cheers,
Quentin
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v3 1/3] dt-bindings: usb: Add binding for WCH CH334/CH335 hub controller
2026-01-12 14:00 ` Quentin Schulz
@ 2026-01-13 3:38 ` Chaoyi Chen
0 siblings, 0 replies; 12+ messages in thread
From: Chaoyi Chen @ 2026-01-13 3:38 UTC (permalink / raw)
To: Quentin Schulz
Cc: Chaoyi Chen, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Heiko Stuebner, Greg Kroah-Hartman, Jonas Karlman, Hsun Lai,
John Clark, Jimmy Hon, Dragan Simic, Michael Riesch,
Peter Robinson, Alexey Charkov, Shawn Lin, Sebastian Reichel,
Andy Yan, devicetree, linux-arm-kernel, linux-rockchip,
linux-kernel, linux-usb
Hi Quentin,
On 1/12/2026 10:00 PM, Quentin Schulz wrote:
> Hi Chaoyi,
>
> On 1/12/26 3:28 AM, Chaoyi Chen wrote:
>> From: Chaoyi Chen <chaoyi.chen@rock-chips.com>
>>
>> The WCH CH334/CH335[0] are USB2.0 protocol compliant 4-port USB HUB
>> controller chips, supporting USB2.0 high-speed and full-speed for
>> upstream ports, and USB2.0 high-speed 480Mbps, full-speed 12Mbps and
>> low-speed 1.5Mbps for downstream ports, supporting not only low-cost STT
>> mode (single TT schedules 4 downstream ports in time share), but also
>> supports high performance MTT mode (4 TTs each corresponding to 1 port,
>> concurrent processing).
>>
>> Add a device tree binding for it.
>>
>> [0]: https://www.wch-ic.com/downloads/CH334DS1_PDF.html
>>
>> Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
>> ---
>> .../devicetree/bindings/usb/wch,ch334.yaml | 65 +++++++++++++++++++
>> 1 file changed, 65 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/usb/wch,ch334.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/usb/wch,ch334.yaml b/Documentation/devicetree/bindings/usb/wch,ch334.yaml
>> new file mode 100644
>> index 000000000000..2eeb92f25b4c
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/usb/wch,ch334.yaml
>> @@ -0,0 +1,65 @@
>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/usb/wch,ch334.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: WCH CH334/CH335 USB 2.0 Hub Controller
>> +
>> +maintainers:
>> + - Chaoyi Chen <kernel@airkyi.com>
>> +
>> +allOf:
>> + - $ref: usb-hub.yaml#
>> +
>> +properties:
>> + compatible:
>> + enum:
>> + - usb1a86,8091
>> +
>
> Which driver does this node bind to? I couldn't quickly find a driver which would match this compatible?
>
Oh, I missed that part. It will be fixed in the next version.
>> + reg: true
>> +
>> + reset-gpios:
>> + description: GPIO controlling the RESET# pin.
>> +
>> + vdd-supply:
>> + description:
>> + The regulator that provides 3.3V core power to the hub.
>> +
>> + vdd2-supply:
>> + description:
>> + The regulator that provides 3.3V or 5V power to the hub.
>> +
>
> There's v5 and vdd33 as power input, shouldn't we maybe use those names instead? How did you come up with vdd/vdd2?
>
That make sense. Will fix in next version.
> There's also a timing that needs to be respected after a power-on event so that the reset has enough time to be performed, c.f. 3.2.1 Power-on Reset in the datasheet you linked to in the commit log. How are you making sure we wait those (apparently, the wording in the datasheet is confusing) 14ms?
This part should be described in the driver.
I'll fix it in the next version.
--
Best,
Chaoyi
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v3 2/3] dt-bindings: arm: rockchip: Add rk3576 evb2 board
2026-01-12 2:28 [PATCH v3 0/3] arm64: dts: rockchip: Add rk3576 evb2 board Chaoyi Chen
2026-01-12 2:28 ` [PATCH v3 1/3] dt-bindings: usb: Add binding for WCH CH334/CH335 hub controller Chaoyi Chen
@ 2026-01-12 2:28 ` Chaoyi Chen
2026-01-12 2:28 ` [PATCH v3 3/3] arm64: dts: " Chaoyi Chen
2 siblings, 0 replies; 12+ messages in thread
From: Chaoyi Chen @ 2026-01-12 2:28 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
Greg Kroah-Hartman, Quentin Schulz, Jonas Karlman, Chaoyi Chen,
Hsun Lai, John Clark, Jimmy Hon, Dragan Simic, Michael Riesch,
Peter Robinson, Alexey Charkov, Shawn Lin, Sebastian Reichel,
Andy Yan
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
linux-usb
From: Chaoyi Chen <chaoyi.chen@rock-chips.com>
Add devicetree binding for the rk3576 evb2 board.
Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
---
(no changes since v1)
Documentation/devicetree/bindings/arm/rockchip.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index 6aceaa8acbb2..59ed57082003 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -1136,7 +1136,9 @@ properties:
- description: Rockchip RK3576 Evaluation board
items:
- - const: rockchip,rk3576-evb1-v10
+ - enum:
+ - rockchip,rk3576-evb1-v10
+ - rockchip,rk3576-evb2-v10
- const: rockchip,rk3576
- description: Rockchip RK3588 Evaluation board
--
2.51.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v3 3/3] arm64: dts: rockchip: Add rk3576 evb2 board
2026-01-12 2:28 [PATCH v3 0/3] arm64: dts: rockchip: Add rk3576 evb2 board Chaoyi Chen
2026-01-12 2:28 ` [PATCH v3 1/3] dt-bindings: usb: Add binding for WCH CH334/CH335 hub controller Chaoyi Chen
2026-01-12 2:28 ` [PATCH v3 2/3] dt-bindings: arm: rockchip: Add rk3576 evb2 board Chaoyi Chen
@ 2026-01-12 2:28 ` Chaoyi Chen
2 siblings, 0 replies; 12+ messages in thread
From: Chaoyi Chen @ 2026-01-12 2:28 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
Greg Kroah-Hartman, Quentin Schulz, Jonas Karlman, Chaoyi Chen,
Hsun Lai, John Clark, Jimmy Hon, Dragan Simic, Michael Riesch,
Peter Robinson, Alexey Charkov, Shawn Lin, Sebastian Reichel,
Andy Yan
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
linux-usb
From: Chaoyi Chen <chaoyi.chen@rock-chips.com>
General features for rk3576 evb2 board:
- Rockchip RK3576
- LPDDR4/4X
- eMMC5.1
- RK806-2x2pcs + DiscretePower
- 1x HDMI2.1 TX / HDMI2.0 RX
- 1x full size DP1.4 TX (Only 2 Lanes)
- 2x 10/100/1000M Ethernet
- 5x SATA3.0 7Pin Slot
- 2x USB3.2 Gen1 Host
- 3x USB2.0 Host
- WIFI/BT
- ...
Tested with eMMC/SDMMC/HDMI/USB/Ethernet/WIFI/BT module.
Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
Reviewed-by: Alexey Charkov <alchark@gmail.com>
---
Changes in v3:
- Add alias for mmc.
- Rename some usb vbus regulator.
- Add DP regulator.
- Change gmac phy-mode to rgmii-id.
- Add target-supply for sata.
- Change vcc-supply for ufshc.
- Add usb hub.
- ...
Changes in v2:
- Enable hdmi_sound and sai6.
- Add more cpu-supply.
- Use regulator to control sata power.
- Remove "cap-mmc-highspeed" prop in sdmmc.
- Add regulator supply for ufshc.
- Add the missing vcc3v3_hubreset regulator.
- Add otg capability for usb_drd0_dwc3.
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3576-evb2-v10.dts | 1002 +++++++++++++++++
2 files changed, 1003 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-evb2-v10.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index c7617e06e1c1..cff95657d406 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -153,6 +153,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-io-expander.dtbo
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-armsom-sige5.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-armsom-sige5-v1.2-wifibt.dtbo
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-evb1-v10.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-evb2-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-luckfox-omni3576.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-nanopi-m5.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-roc-pc.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3576-evb2-v10.dts b/arch/arm64/boot/dts/rockchip/rk3576-evb2-v10.dts
new file mode 100644
index 000000000000..d2adc60c741a
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3576-evb2-v10.dts
@@ -0,0 +1,1002 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2026 Rockchip Electronics Co., Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
+#include "rk3576.dtsi"
+
+/ {
+ model = "Rockchip RK3576 EVB2 V10 Board";
+ compatible = "rockchip,rk3576-evb2-v10", "rockchip,rk3576";
+
+ aliases {
+ ethernet0 = &gmac0;
+ ethernet1 = &gmac1;
+ mmc0 = &sdhci;
+ mmc1 = &sdmmc;
+ };
+
+ chosen {
+ stdout-path = "serial0:1500000n8";
+ };
+
+ hdmi-con {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 1>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1800000>;
+ poll-interval = <100>;
+
+ button-back {
+ label = "back";
+ linux,code = <KEY_BACK>;
+ press-threshold-microvolt = <1235000>;
+ };
+
+ button-menu {
+ label = "menu";
+ linux,code = <KEY_MENU>;
+ press-threshold-microvolt = <890000>;
+ };
+
+ button-vol-down {
+ label = "volume down";
+ linux,code = <KEY_VOLUMEDOWN>;
+ press-threshold-microvolt = <417000>;
+ };
+
+ button-vol-up {
+ label = "volume up";
+ linux,code = <KEY_VOLUMEUP>;
+ press-threshold-microvolt = <17000>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ work_led: led-0 {
+ gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_pwren>;
+
+ /*
+ * On the module itself this is one of these (depending
+ * on the actual card populated):
+ * - SDIO_RESET_L_WL_REG_ON
+ * - PDN (power down when low)
+ */
+ post-power-on-delay-ms = <200>;
+ reset-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>;
+ };
+
+ vbus5v0_usb0: regulator-vbus5v0-usb0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usb3_host0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&gpio0 RK_PD1 GPIO_ACTIVE_HIGH>;
+ vin-supply = <&vcc5v0_device>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_otg0_pwren>;
+ };
+
+ vbus5v0_usb1: regulator-vcc5v0-usb1 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usb3_host1";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
+ vin-supply = <&vcc5v0_device>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_host_pwren>;
+ };
+
+ vcc12v_dcin: regulator-vcc12v-dcin {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc12v_dcin";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+
+ vcc1v2_ufs_vccq_s0: regulator-vcc1v2-ufs-vccq-s0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc1v2_ufs_vccq_s0";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ vin-supply = <&vcc_sys>;
+ };
+
+ vcc1v8_ufs_vccq2_s0: regulator-vcc1v8-ufs-vccq2-s0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc1v8_ufs_vccq2_s0";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc_1v8_s3>;
+ };
+
+ vcc3v3_dp_port: regulator-vcc3v3-dp-port {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_dp_port";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
+ vin-supply = <&vcc_3v3_s3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&image_pwren>;
+ };
+
+ vcc3v3_pcie1: regulator-vcc3v3-pcie1 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_pcie1";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <5000>;
+ vin-supply = <&vcc12v_dcin>;
+ };
+
+ vcc3v3_rtc_s5: regulator-vcc3v3-rtc-s5 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_rtc_s5";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc_sys>;
+ };
+
+ vcc3v3_sata_pwren: vcc3v3-sata-pwren {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_satapm";
+ enable-active-high;
+ gpio = <&gpio4 RK_PC7 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&satapm_pwren>;
+ };
+
+ vcc5v0_device: regulator-vcc5v0-device {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_device";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc12v_dcin>;
+ };
+
+ vcc_sys: regulator-vcc5v0-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc12v_dcin>;
+ };
+
+ vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_1v1_nldo_s3";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ vin-supply = <&vcc_sys>;
+ };
+
+ vcc_1v8_s0: regulator-vcc-1v8-s0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_1v8_s0";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc_1v8_s3>;
+ };
+
+ vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_2v0_pldo_s3";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <2000000>;
+ regulator-max-microvolt = <2000000>;
+ vin-supply = <&vcc_sys>;
+ };
+
+ vcc_3v3_s0: regulator-vcc-3v3-s0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_3v3_s0";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc_3v3_s3>;
+ };
+
+ vcc_ufs_s0: regulator-vcc-ufs-s0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_ufs_s0";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc_sys>;
+ };
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l1 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l2 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l3 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_big_s0>;
+};
+
+&cpu_b1 {
+ cpu-supply = <&vdd_cpu_big_s0>;
+};
+
+&cpu_b2 {
+ cpu-supply = <&vdd_cpu_big_s0>;
+};
+
+&cpu_b3 {
+ cpu-supply = <&vdd_cpu_big_s0>;
+};
+
+&combphy0_ps {
+ status = "okay";
+};
+
+&combphy1_psu {
+ status = "okay";
+};
+
+&gmac0 {
+ clock_in_out = "output";
+ phy-mode = "rgmii-id";
+ phy-handle = <&rgmii_phy0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <ð0m1_miim
+ ð0m1_tx_bus2
+ ð0m1_rx_bus2
+ ð0m1_rgmii_clk
+ ð0m1_rgmii_bus>;
+ status = "okay";
+};
+
+&gmac1 {
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy1>;
+ phy-mode = "rgmii-id";
+ pinctrl-names = "default";
+ pinctrl-0 = <ð1m0_miim
+ ð1m0_tx_bus2
+ ð1m0_rx_bus2
+ ð1m0_rgmii_clk
+ ð1m0_rgmii_bus>;
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_gpu_s0>;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_in {
+ hdmi_in_vp0: endpoint {
+ remote-endpoint = <&vp0_out_hdmi>;
+ };
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&hdmi_sound {
+ status = "okay";
+};
+
+&hdptxphy {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+
+ rk806: pmic@23 {
+ compatible = "rockchip,rk806";
+ reg = <0x23>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
+ <&rk806_dvs2_null>, <&rk806_dvs3_null>;
+ system-power-controller;
+
+ vcc1-supply = <&vcc_sys>;
+ vcc2-supply = <&vcc_sys>;
+ vcc3-supply = <&vcc_sys>;
+ vcc4-supply = <&vcc_sys>;
+ vcc5-supply = <&vcc_sys>;
+ vcc6-supply = <&vcc_sys>;
+ vcc7-supply = <&vcc_sys>;
+ vcc8-supply = <&vcc_sys>;
+ vcc9-supply = <&vcc_sys>;
+ vcc10-supply = <&vcc_sys>;
+ vcc11-supply = <&vcc_2v0_pldo_s3>;
+ vcc12-supply = <&vcc_sys>;
+ vcc13-supply = <&vcc_1v1_nldo_s3>;
+ vcc14-supply = <&vcc_1v1_nldo_s3>;
+ vcca-supply = <&vcc_sys>;
+
+ rk806_dvs1_null: dvs1-null-pins {
+ pins = "gpio_pwrctrl1";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs2_null: dvs2-null-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs3_null: dvs3-null-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs1_slp: dvs1-slp-pins {
+ pins = "gpio_pwrctrl1";
+ function = "pin_fun1";
+ };
+
+ rk806_dvs1_pwrdn: dvs1-pwrdn-pins {
+ pins = "gpio_pwrctrl1";
+ function = "pin_fun2";
+ };
+
+ rk806_dvs1_rst: dvs1-rst-pins {
+ pins = "gpio_pwrctrl1";
+ function = "pin_fun3";
+ };
+
+ rk806_dvs2_slp: dvs2-slp-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun1";
+ };
+
+ rk806_dvs2_pwrdn: dvs2-pwrdn-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun2";
+ };
+
+ rk806_dvs2_rst: dvs2-rst-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun3";
+ };
+
+ rk806_dvs2_dvs: dvs2-dvs-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun4";
+ };
+
+ rk806_dvs2_gpio: dvs2-gpio-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun5";
+ };
+
+ rk806_dvs3_slp: dvs3-slp-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun1";
+ };
+
+ rk806_dvs3_pwrdn: dvs3-pwrdn-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun2";
+ };
+
+ rk806_dvs3_rst: dvs3-rst-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun3";
+ };
+
+ rk806_dvs3_dvs: dvs3-dvs-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun4";
+ };
+
+ rk806_dvs3_gpio: dvs3-gpio-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun5";
+ };
+
+ regulators {
+ vdd_cpu_big_s0: dcdc-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_cpu_big_s0";
+ regulator-enable-ramp-delay = <400>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_npu_s0: dcdc-reg2 {
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_npu_s0";
+ regulator-enable-ramp-delay = <400>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_lit_s0: dcdc-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_cpu_lit_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vcc_3v3_s3: dcdc-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_3v3_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vdd_gpu_s0: dcdc-reg5 {
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <900000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_gpu_s0";
+ regulator-enable-ramp-delay = <400>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <850000>;
+ };
+ };
+
+ vddq_ddr_s0: dcdc-reg6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vddq_ddr_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_logic_s0: dcdc-reg7 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <800000>;
+ regulator-name = "vdd_logic_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8_s3: dcdc-reg8 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_1v8_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd2_ddr_s3: dcdc-reg9 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vdd2_ddr_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vdd_ddr_s0: dcdc-reg10 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vdd_ddr_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca_1v8_s0: pldo-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcca_1v8_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca1v8_pldo2_s0: pldo-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcca1v8_pldo2_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda_1v2_s0: pldo-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vdda_1v2_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca_3v3_s0: pldo-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcca_3v3_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vccio_sd_s0: pldo-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vccio_sd_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcca1v8_pldo6_s3: pldo-reg6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcca1v8_pldo6_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd_0v75_s3: nldo-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "vdd_0v75_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vdda_ddr_pll_s0: nldo-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-name = "vdda_ddr_pll_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda0v75_hdmi_s0: nldo-reg3 {
+ regulator-boot-on;
+ regulator-min-microvolt = <837500>;
+ regulator-max-microvolt = <837500>;
+ regulator-name = "vdda0v75_hdmi_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda_0v85_s0: nldo-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-name = "vdda_0v85_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdda_0v75_s0: nldo-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "vdda_0v75_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&i2c2 {
+ status = "okay";
+
+ hym8563: rtc@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ clock-output-names = "hym8563";
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtc_int>;
+ wakeup-source;
+ #clock-cells = <0>;
+ };
+};
+
+&mdio0 {
+ rgmii_phy0: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_phy0_rst>;
+ reset-assert-us = <20000>;
+ reset-deassert-us = <100000>;
+ reset-gpios = <&gpio3 RK_PD3 GPIO_ACTIVE_LOW>;
+ tx-internal-delay-ps = <1900>;
+ };
+};
+
+&mdio1 {
+ rgmii_phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_phy1_rst>;
+ reset-assert-us = <20000>;
+ reset-deassert-us = <100000>;
+ reset-gpios = <&gpio3 RK_PD6 GPIO_ACTIVE_LOW>;
+ tx-internal-delay-ps = <1900>;
+ };
+};
+
+&pinctrl {
+ bluetooth {
+ bt_reg_on: bt-reg-on {
+ rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ bt_wake_host: bt-wake-host {
+ rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+
+ host_wake_bt: host-wake-bt {
+ rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ dp {
+ image_pwren: image-pwren {
+ rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ hym8563 {
+ rtc_int: rtc-int {
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ network {
+ rgmii_phy0_rst: rgmii-phy0-rst {
+ rockchip,pins = <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ rgmii_phy1_rst: rgmii-phy1-rst {
+ rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pcie1 {
+ pcie1_rst: pcie1-rst {
+ rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ sata {
+ satapm_pwren: satapm-pwren {
+ rockchip,pins = <4 RK_PC7 RK_FUNC_GPIO &pcfg_output_high>;
+ };
+ };
+
+ usb {
+ usb_host_pwren: usb-host-pwren {
+ rockchip,pins = <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ usb_hub_reset: usb-hub-reset {
+ rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_output_high>;
+ };
+
+ usb_otg0_pwren: usb-otg0-pwren {
+ rockchip,pins = <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ wifi {
+ wifi_host_wake: wifi-host-wake {
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+
+ wifi_pwren: wifi-pwren {
+ rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&sai6 {
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&vcca_1v8_s0>;
+ status = "okay";
+};
+
+&sata0 {
+ target-supply = <&vcc3v3_sata_pwren>;
+ status = "okay";
+};
+
+&sdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ disable-wp;
+ keep-power-in-suspend;
+ max-frequency = <150000000>;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ no-sd;
+ no-mmc;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc1m0_bus4 &sdmmc1m0_clk &sdmmc1m0_cmd>;
+ sd-uhs-sdr104;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ compatible = "brcm,bcm4329-fmac";
+ reg = <1>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PB0 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "host-wake";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_host_wake>;
+ };
+};
+
+&sdhci {
+ bus-width = <8>;
+ full-pwr-cycle-in-suspend;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ no-sdio;
+ no-sd;
+ non-removable;
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ disable-wp;
+ no-sdio;
+ no-mmc;
+ sd-uhs-sdr104;
+ vqmmc-supply = <&vccio_sd_s0>;
+ status = "okay";
+};
+
+&u2phy0 {
+ status = "okay";
+};
+
+&u2phy0_otg {
+ phy-supply = <&vbus5v0_usb0>;
+ status = "okay";
+};
+
+&u2phy1 {
+ status = "okay";
+};
+
+&u2phy1_otg {
+ phy-supply = <&vbus5v0_usb1>;
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-0 = <&uart4m1_xfer &uart4m1_ctsn &uart4m1_rtsn>;
+ pinctrl-names = "default";
+ uart-has-rtscts;
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ clocks = <&hym8563>;
+ clock-names = "lpo";
+ device-wakeup-gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PB1 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&bt_reg_on &bt_wake_host &host_wake_bt>;
+ pinctrl-names = "default";
+ shutdown-gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>;
+ vbat-supply = <&vcc_3v3_s3>;
+ vddio-supply = <&vcc_1v8_s3>;
+ };
+};
+
+&ufshc {
+ vcc-supply = <&vcc_ufs_s0>;
+ vccq-supply = <&vcc1v2_ufs_vccq_s0>;
+ vccq2-supply = <&vcc1v8_ufs_vccq2_s0>;
+ status = "okay";
+};
+
+&usbdp_phy {
+ rockchip,dp-lane-mux = <2 3>;
+ status = "okay";
+};
+
+&usb_drd0_dwc3 {
+ dr_mode = "otg";
+ extcon = <&u2phy0>;
+ status = "okay";
+};
+
+&usb_drd1_dwc3 {
+ dr_mode = "host";
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_hub_reset>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ hub_2_0: hub@1 {
+ compatible = "usb1a86,8091";
+ reg = <1>;
+ reset-gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
+ vdd-supply = <&vcc_3v3_s0>;
+ };
+};
+
+&vop {
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
+
+&vp0 {
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
+ remote-endpoint = <&hdmi_in_vp0>;
+ };
+};
--
2.51.1
^ permalink raw reply related [flat|nested] 12+ messages in thread