From: Guodong Xu <guodong@riscstar.com>
To: Jonathan Corbet <corbet@lwn.net>, Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Conor Dooley <conor.dooley@microchip.com>,
Conor Dooley <conor@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Chen Wang <unicorn_wang@outlook.com>,
Inochi Amaoto <inochiama@gmail.com>, Yixun Lan <dlan@gentoo.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: Junhui Liu <junhui.liu@pigmoral.tech>,
linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
sophgo@lists.linux.dev, spacemit@lists.linux.dev,
Guodong Xu <guodong@riscstar.com>
Subject: [PATCH v2 1/4] Documentation: riscv: uabi: Clarify ISA spec version for canonical order
Date: Thu, 15 Jan 2026 07:18:57 +0800 [thread overview]
Message-ID: <20260115-adding-b-dtsi-v2-1-254dd61cf947@riscstar.com> (raw)
In-Reply-To: <20260115-adding-b-dtsi-v2-0-254dd61cf947@riscstar.com>
Specify that chapter 27 refers to version 20191213 of the RISC-V ISA
Unprivileged Architecture. The chapter numbering differs across
specification versions - for example, in version 20250508, the ISA
Extension Naming Conventions is chapter 36, not chapter 27.
Historical versions of the RISC-V specification can be found via Link [1].
Acked-by: Paul Walmsley <pjw@kernel.org>
Link: https://riscv.org/specifications/ratified/ [1]
Fixes: f07b2b3f9d47 ("Documentation: riscv: add a section about ISA string ordering in /proc/cpuinfo")
Signed-off-by: Guodong Xu <guodong@riscstar.com>
---
v2: Add Acked-by from Paul.
---
Documentation/arch/riscv/uabi.rst | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/arch/riscv/uabi.rst b/Documentation/arch/riscv/uabi.rst
index 243e40062e34..0c5299e00762 100644
--- a/Documentation/arch/riscv/uabi.rst
+++ b/Documentation/arch/riscv/uabi.rst
@@ -7,7 +7,9 @@ ISA string ordering in /proc/cpuinfo
------------------------------------
The canonical order of ISA extension names in the ISA string is defined in
-chapter 27 of the unprivileged specification.
+Chapter 27 of the RISC-V Instruction Set Manual Volume I Unprivileged ISA
+(Document Version 20191213).
+
The specification uses vague wording, such as should, when it comes to ordering,
so for our purposes the following rules apply:
--
2.43.0
next prev parent reply other threads:[~2026-01-14 23:19 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-14 23:18 [PATCH v2 0/4] riscv: dts: Add "b" ISA extension to existing devicetrees Guodong Xu
2026-01-14 23:18 ` Guodong Xu [this message]
2026-01-15 0:10 ` [PATCH v2 1/4] Documentation: riscv: uabi: Clarify ISA spec version for canonical order Paul Walmsley
2026-01-14 23:18 ` [PATCH v2 2/4] riscv: dts: anlogic: dr1v90: Add "b" ISA extension Guodong Xu
2026-01-15 2:25 ` Junhui Liu
2026-01-14 23:18 ` [PATCH v2 3/4] riscv: dts: sophgo: sg2044: " Guodong Xu
2026-01-15 0:28 ` Inochi Amaoto
2026-01-14 23:19 ` [PATCH v2 4/4] riscv: dts: spacemit: k1: " Guodong Xu
2026-01-15 0:39 ` Yixun Lan
2026-01-15 11:24 ` (subset) [PATCH v2 0/4] riscv: dts: Add "b" ISA extension to existing devicetrees Yixun Lan
2026-01-15 19:13 ` Conor Dooley
2026-01-15 23:04 ` Guodong Xu
2026-01-20 1:16 ` (subset) " Inochi Amaoto
2026-01-20 2:48 ` Inochi Amaoto
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