From: Randolph <randolph@andestech.com>
To: <linux-kernel@vger.kernel.org>
Cc: <linux-pci@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
<devicetree@vger.kernel.org>, <jingoohan1@gmail.com>,
<mani@kernel.org>, <lpieralisi@kernel.org>,
<kwilczynski@kernel.org>, <robh@kernel.org>,
<bhelgaas@google.com>, <krzk+dt@kernel.org>,
<conor+dt@kernel.org>, <alex@ghiti.fr>, <aou@eecs.berkeley.edu>,
<palmer@dabbelt.com>, <paul.walmsley@sifive.com>,
<ben717@andestech.com>, <inochiama@gmail.com>,
<thippeswamy.havalige@amd.com>, <namcao@linutronix.de>,
<shradha.t@samsung.com>, <pjw@kernel.org>,
<christian.bruel@foss.st.com>, <quic_wenbyao@quicinc.com>,
<vincent.guittot@linaro.org>, <elder@riscstar.com>,
<s-vadapalli@ti.com>, <randolph.sklin@gmail.com>,
<tim609@andestech.com>, Randolph <randolph@andestech.com>
Subject: [PATCH v10 0/4] Add support for Andes Qilai SoC PCIe controller
Date: Fri, 16 Jan 2026 19:02:30 +0800 [thread overview]
Message-ID: <20260116110234.1908263-1-randolph@andestech.com> (raw)
Add support for Andes Qilai SoC PCIe controller
These patches introduce driver support for the PCIe controller on the
Andes Qilai SoC.
Signed-off-by: Randolph Lin <randolph@andestech.com>
---
Changes in v10:
- Use "qilai" instead of "andes" as the tag
Changes in v9:
- Drop the patch that adjusts the number of OB/IB windows.
- Made minor adjustments based on the reviewer's suggestions.
Changes in v8:
- Fix the compile error reported by the kernel test robot.
Changes in v7:
- Remove unnecessary nodes and property in DTS bindings
Changes in v6:
- Fix typo in the logic for adjusting the number of OB/IB windows
Changes in v5:
- Add support to adjust the number of OB/IB windows in the glue driver.
- Fix the number of OB windows in the Qilai PCIe driver.
- Remove meaningless properties from the device tree.
- Made minor adjustments based on the reviewer's suggestions.
Changes in v4:
- Add .post_init callback for enabling IOCP cache.
- Sort by vender name in Kconfig
- Using PROBE_PREFER_ASYNCHRONOUS as default probe type.
- Made minor adjustments based on the reviewer's suggestions.
Changes in v3:
- Remove outbound ATU address range validation callback and logic.
- Add logic to skip failed outbound iATU configuration and continue.
- Using PROBE_PREFER_ASYNCHRONOUS as default probe type.
- Made minor adjustments based on the reviewer's suggestions.
Changes in v2:
- Remove the patch that adds the dma-ranges property to the SoC node.
- Add dma-ranges to the PCIe parent node bus node.
- Refactor and rename outbound ATU address range validation callback and logic.
- Use parent_bus_offset instead of cpu_addr_fixup().
- Using PROBE_DEFAULT_STRATEGY as default probe type.
- Made minor adjustments based on the reviewer's suggestions.
Randolph Lin (4):
dt-bindings: PCI: Add Andes QiLai PCIe support
riscv: dts: qilai: Add PCIe node into the QiLai SoC
PCI: qilai: Add Andes QiLai SoC PCIe host driver support
MAINTAINERS: Add maintainers for Andes QiLai PCIe driver
.../bindings/pci/andestech,qilai-pcie.yaml | 86 ++++++++
MAINTAINERS | 7 +
arch/riscv/boot/dts/andes/qilai.dtsi | 106 ++++++++++
drivers/pci/controller/dwc/Kconfig | 13 ++
drivers/pci/controller/dwc/Makefile | 1 +
drivers/pci/controller/dwc/pcie-andes-qilai.c | 198 ++++++++++++++++++
6 files changed, 411 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/andestech,qilai-pcie.yaml
create mode 100644 drivers/pci/controller/dwc/pcie-andes-qilai.c
--
2.34.1
next reply other threads:[~2026-01-16 11:02 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-16 11:02 Randolph [this message]
2026-01-16 11:02 ` [PATCH v10 1/4] dt-bindings: PCI: Add Andes QiLai PCIe support Randolph
2026-01-16 11:02 ` [PATCH v10 2/4] riscv: dts: qilai: Add PCIe node into the QiLai SoC Randolph
2026-01-16 11:02 ` [PATCH v10 3/4] PCI: qilai: Add Andes QiLai SoC PCIe host driver support Randolph
2026-02-17 14:10 ` Manivannan Sadhasivam
2026-01-16 11:02 ` [PATCH v10 4/4] MAINTAINERS: Add maintainers for Andes QiLai PCIe driver Randolph
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