Re: [PATCH v2 0/3] pinctrl: spacemit: support I/O power domain configuration

[Yixun Lan <dlan@gentoo.org>]

Hi Linus,

On 00:52 Tue 20 Jan     , Linus Walleij wrote:
> On Thu, Jan 8, 2026 at 7:43 AM Troy Mitchell
> <troy.mitchell@linux.spacemit.com> wrote:
> 
> > This series adds support for configuring IO power domain voltage for
> > dual-voltage GPIO banks on the Spacemit K1 SoC.
> >
> > On K1, IO domain power control registers determine whether a GPIO bank
> > operates at 1.8V or 3.3V. These registers default to 3.3V operation,
> > which may lead to functional failures when GPIO banks are externally
> > supplied with 1.8V but internally remain configured for 3.3V.
> >
> > The IO power domain registers are implemented as secure registers and
> > require an explicit unlock sequence via the AIB Secure Access Register
> > (ASAR), located in the APBC register space.
> >
> > This series ensures that pin voltage configuration correctly reflects
> > hardware requirements.
> >
> > Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
> 
> Excellent work in this patch series Troy!
> 
> > Troy Mitchell (3):
> >       dt-bindings: pinctrl: spacemit: add syscon property
> >       pinctrl: spacemit: support I/O power domain configuration
> 
> These two patches applied to the pin control tree.
> 
> >       riscv: dts: spacemit: modify pinctrl node in dtsi
> 
> Please funnel this one through the SoC tree.
> 
Thanks, I will take care of this

> Yours,
> Linus Walleij
> 

-- 
Yixun Lan (dlan)