[PATCH 0/3] arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for rk3576 board

[PATCH 0/3] arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for rk3576 board

[Chaoyi Chen]

From: Chaoyi Chen <chaoyi.chen@rock-chips.com>

According to the description in the net documentation, PHY modes
"rgmii", "rgmii-rxid" and "rgmii-txid" modes require the clock signal
to be delayed on the PCB.

The Rockchip platform has long used the above mentioned PHY modes and
private delay prop to describe the internal IO delay settings of the
chip, which is inconsistent with what is described in the documentation.

Some background, for RK3576, you can assume that:

        tx_delay_time(ns) = 0.0579 * delay_line_count + 0.105

For example, tx_delay = <0x20> means:

        time = 0.0579 * 0x20 + 0.105 ns = 1.9578 ns

Recently, Andrew has often mentioned the problem of phy mode in board
level configuration. So let's start with the RK3576 to modify this.

Please test this series of patches, thanks.

Chaoyi Chen (3):
  arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for rk3576 evb1
  arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for
    roc-rk3576-pc
  arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for ROCK 4D

 arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts | 8 ++++----
 arch/arm64/boot/dts/rockchip/rk3576-roc-pc.dts   | 5 ++---
 arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts  | 5 ++---
 3 files changed, 8 insertions(+), 10 deletions(-)

-- 
2.51.1

[PATCH 1/3] arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for rk3576 evb1

[Chaoyi Chen]

From: Chaoyi Chen <chaoyi.chen@rock-chips.com>

According to the description in the net documentation, PHY modes
"rgmii", "rgmii-rxid" and "rgmii-txid" modes require the clock signal
to be delayed on the PCB.

The Rockchip platform has long used the above mentioned PHY modes and
private delay prop to describe the internal IO delay settings of the
chip, which is inconsistent with what is described in the documentation.

Let's describe this part of the delay in the PHY and use the more
reasonable "rgmii-id" mode.

Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts
index c5584c26db52..3ee76bafafb5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts
@@ -266,7 +266,7 @@ &combphy1_psu {
 
 &gmac0 {
 	clock_in_out = "output";
-	phy-mode = "rgmii-rxid";
+	phy-mode = "rgmii-id";
 	phy-handle = <&rgmii_phy0>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&eth0m0_miim
@@ -275,14 +275,13 @@ &eth0m0_rx_bus2
 		     &eth0m0_rgmii_clk
 		     &eth0m0_rgmii_bus
 		     &ethm0_clk0_25m_out>;
-	tx_delay = <0x21>;
 	status = "okay";
 };
 
 &gmac1 {
 	clock_in_out = "output";
 	phy-handle = <&rgmii_phy1>;
-	phy-mode = "rgmii-rxid";
+	phy-mode = "rgmii-id";
 	pinctrl-names = "default";
 	pinctrl-0 = <&eth1m0_miim
 		     &eth1m0_tx_bus2
@@ -290,7 +289,6 @@ &eth1m0_rx_bus2
 		     &eth1m0_rgmii_clk
 		     &eth1m0_rgmii_bus
 		     &ethm0_clk1_25m_out>;
-	tx_delay = <0x20>;
 	status = "okay";
 };
 
@@ -721,6 +719,7 @@ rgmii_phy0: ethernet-phy@1 {
 		reset-assert-us = <20000>;
 		reset-deassert-us = <100000>;
 		reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
+		tx-internal-delay-ps = <1950>;
 	};
 };
 
@@ -737,6 +736,7 @@ rgmii_phy1: ethernet-phy@1 {
 		reset-assert-us = <20000>;
 		reset-deassert-us = <100000>;
 		reset-gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>;
+		tx-internal-delay-ps = <1950>;
 	};
 };
 
-- 
2.51.1

Re: [PATCH 1/3] arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for rk3576 evb1

[Diederik de Haas]

On Wed Jan 21, 2026 at 4:15 AM CET, Chaoyi Chen wrote:
> From: Chaoyi Chen <chaoyi.chen@rock-chips.com>
>
> According to the description in the net documentation, PHY modes
> "rgmii", "rgmii-rxid" and "rgmii-txid" modes require the clock signal
> to be delayed on the PCB.
>
> The Rockchip platform has long used the above mentioned PHY modes and
> private delay prop to describe the internal IO delay settings of the
> chip, which is inconsistent with what is described in the documentation.
>
> Let's describe this part of the delay in the PHY and use the more
> reasonable "rgmii-id" mode.
>
> Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
> ---
>  arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts
> index c5584c26db52..3ee76bafafb5 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts
> @@ -266,7 +266,7 @@ &combphy1_psu {
>  
>  &gmac0 {
>  	clock_in_out = "output";
> -	phy-mode = "rgmii-rxid";
> +	phy-mode = "rgmii-id";
>  	phy-handle = <&rgmii_phy0>;
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&eth0m0_miim
> @@ -275,14 +275,13 @@ &eth0m0_rx_bus2
>  		     &eth0m0_rgmii_clk
>  		     &eth0m0_rgmii_bus
>  		     &ethm0_clk0_25m_out>;
> -	tx_delay = <0x21>;

This being '0x21' (not '0x20') ...

>  	status = "okay";
>  };
>  
>  &gmac1 {
>  	clock_in_out = "output";
>  	phy-handle = <&rgmii_phy1>;
> -	phy-mode = "rgmii-rxid";
> +	phy-mode = "rgmii-id";
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&eth1m0_miim
>  		     &eth1m0_tx_bus2
> @@ -290,7 +289,6 @@ &eth1m0_rx_bus2
>  		     &eth1m0_rgmii_clk
>  		     &eth1m0_rgmii_bus
>  		     &ethm0_clk1_25m_out>;
> -	tx_delay = <0x20>;
>  	status = "okay";
>  };
>  
> @@ -721,6 +719,7 @@ rgmii_phy0: ethernet-phy@1 {
>  		reset-assert-us = <20000>;
>  		reset-deassert-us = <100000>;
>  		reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
> +		tx-internal-delay-ps = <1950>;

... shouldn't this be higher?
0.0579 * 0x21 + 0.105 = 2.0157 (not sure how the rounding goes)

Cheers,
  Diederik

>  	};
>  };
>  
> @@ -737,6 +736,7 @@ rgmii_phy1: ethernet-phy@1 {
>  		reset-assert-us = <20000>;
>  		reset-deassert-us = <100000>;
>  		reset-gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>;
> +		tx-internal-delay-ps = <1950>;
>  	};
>  };
>  

Re: [PATCH 1/3] arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for rk3576 evb1

[Andrew Lunn]

> @@ -721,6 +719,7 @@ rgmii_phy0: ethernet-phy@1 {
>  		reset-assert-us = <20000>;
>  		reset-deassert-us = <100000>;
>  		reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
> +		tx-internal-delay-ps = <1950>;

The PHY should add 2000ps, as required by the RGMII standard. The
difference is so small there is no need for tx-internal-delay.

In most cases, 'rmgii-id' should be sufficient, unless the PCB is
badly designed.

      Andrew

Re: [PATCH 1/3] arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for rk3576 evb1

[Chaoyi Chen]

Hi Andrew,

On 1/21/2026 8:55 PM, Andrew Lunn wrote:
>> @@ -721,6 +719,7 @@ rgmii_phy0: ethernet-phy@1 {
>>  		reset-assert-us = <20000>;
>>  		reset-deassert-us = <100000>;
>>  		reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
>> +		tx-internal-delay-ps = <1950>;
> 
> The PHY should add 2000ps, as required by the RGMII standard. The
> difference is so small there is no need for tx-internal-delay.
>

Thank you for the clarification. I chose 1950 here because I find that
the MotorComm yt8xxx Ethernet PHY binding only offer the options of 
1950 or 2100. 

> In most cases, 'rmgii-id' should be sufficient, unless the PCB is
> badly designed.
> 

I suspect the ROCK 4D board might be an exception. Sebastian once
reported that it wouldn't work properly under "rgmii-id". Well, I'm
not sure what strategy to adopt in this case.

-- 
Best, 
Chaoyi

Re: [PATCH 1/3] arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for rk3576 evb1

[Andrew Lunn]

On Thu, Jan 22, 2026 at 09:38:17AM +0800, Chaoyi Chen wrote:
> Hi Andrew,
> 
> On 1/21/2026 8:55 PM, Andrew Lunn wrote:
> >> @@ -721,6 +719,7 @@ rgmii_phy0: ethernet-phy@1 {
> >>  		reset-assert-us = <20000>;
> >>  		reset-deassert-us = <100000>;
> >>  		reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
> >> +		tx-internal-delay-ps = <1950>;
> > 
> > The PHY should add 2000ps, as required by the RGMII standard. The
> > difference is so small there is no need for tx-internal-delay.
> >
> 
> Thank you for the clarification. I chose 1950 here because I find that
> the MotorComm yt8xxx Ethernet PHY binding only offer the options of 
> 1950 or 2100. 
> 
> > In most cases, 'rmgii-id' should be sufficient, unless the PCB is
> > badly designed.
> > 
> 
> I suspect the ROCK 4D board might be an exception. Sebastian once
> reported that it wouldn't work properly under "rgmii-id". Well, I'm
> not sure what strategy to adopt in this case.

Please check the report. And also, check what the PHY is doing for
delays if you don't specify the property. Is it defaulting to near
2000ps?

	Andrew

Re: [PATCH 1/3] arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for rk3576 evb1

[Chaoyi Chen]

Hi Andrew,

On 1/22/2026 10:40 AM, Andrew Lunn wrote:
> On Thu, Jan 22, 2026 at 09:38:17AM +0800, Chaoyi Chen wrote:
>> Hi Andrew,
>>
>> On 1/21/2026 8:55 PM, Andrew Lunn wrote:
>>>> @@ -721,6 +719,7 @@ rgmii_phy0: ethernet-phy@1 {
>>>>  		reset-assert-us = <20000>;
>>>>  		reset-deassert-us = <100000>;
>>>>  		reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
>>>> +		tx-internal-delay-ps = <1950>;
>>>
>>> The PHY should add 2000ps, as required by the RGMII standard. The
>>> difference is so small there is no need for tx-internal-delay.
>>>
>>
>> Thank you for the clarification. I chose 1950 here because I find that
>> the MotorComm yt8xxx Ethernet PHY binding only offer the options of 
>> 1950 or 2100. 
>>
>>> In most cases, 'rmgii-id' should be sufficient, unless the PCB is
>>> badly designed.
>>>
>>
>> I suspect the ROCK 4D board might be an exception. Sebastian once
>> reported that it wouldn't work properly under "rgmii-id". Well, I'm
>> not sure what strategy to adopt in this case.
> 
> Please check the report. And also, check what the PHY is doing for
> delays if you don't specify the property. Is it defaulting to near
> 2000ps?
> 

It is RTL8211F PHY. The origin report is here:

https://lore.kernel.org/all/20250724-rk3576-rock4d-phy-timings-v1-1-1cdce2b4aca4@kernel.org/

The RTL8211F binding doesn't provide any indication of the default
delay value. I'll checking datasheet to see if it's mentioned there.

-- 
Best, 
Chaoyi

Re: [PATCH 1/3] arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for rk3576 evb1

[Chaoyi Chen]

On 1/22/2026 11:16 AM, Chaoyi Chen wrote:
> Hi Andrew,
> 
> On 1/22/2026 10:40 AM, Andrew Lunn wrote:
>> On Thu, Jan 22, 2026 at 09:38:17AM +0800, Chaoyi Chen wrote:
>>> Hi Andrew,
>>>
>>> On 1/21/2026 8:55 PM, Andrew Lunn wrote:
>>>>> @@ -721,6 +719,7 @@ rgmii_phy0: ethernet-phy@1 {
>>>>>  		reset-assert-us = <20000>;
>>>>>  		reset-deassert-us = <100000>;
>>>>>  		reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
>>>>> +		tx-internal-delay-ps = <1950>;
>>>>
>>>> The PHY should add 2000ps, as required by the RGMII standard. The
>>>> difference is so small there is no need for tx-internal-delay.
>>>>
>>>
>>> Thank you for the clarification. I chose 1950 here because I find that
>>> the MotorComm yt8xxx Ethernet PHY binding only offer the options of 
>>> 1950 or 2100. 
>>>
>>>> In most cases, 'rmgii-id' should be sufficient, unless the PCB is
>>>> badly designed.
>>>>
>>>
>>> I suspect the ROCK 4D board might be an exception. Sebastian once
>>> reported that it wouldn't work properly under "rgmii-id". Well, I'm
>>> not sure what strategy to adopt in this case.
>>
>> Please check the report. And also, check what the PHY is doing for
>> delays if you don't specify the property. Is it defaulting to near
>> 2000ps?
>>
> 
> It is RTL8211F PHY. The origin report is here:
> 
> https://lore.kernel.org/all/20250724-rk3576-rock4d-phy-timings-v1-1-1cdce2b4aca4@kernel.org/
> 
> The RTL8211F binding doesn't provide any indication of the default
> delay value. I'll checking datasheet to see if it's mentioned there.
> 

If "rgmii-id" is set, the RTL8211F driver adds the 2ns delay:

[0] https://elixir.bootlin.com/linux/v6.19-rc5/source/drivers/net/phy/realtek/realtek_main.c#L602

Sebastian, could you try testing how much extra delay the GMAC still
needs to add for the ROCK4D to work correctly, assuming the PHY
already has a 2 ns delay when "rgmii-id" is set?

-- 
Best, 
Chaoyi

[PATCH 2/3] arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for roc-rk3576-pc

[Chaoyi Chen]

From: Chaoyi Chen <chaoyi.chen@rock-chips.com>

According to the description in the net documentation, PHY modes
"rgmii", "rgmii-rxid" and "rgmii-txid" modes require the clock signal
to be delayed on the PCB.

The Rockchip platform has long used the above mentioned PHY modes and
private delay prop to describe the internal IO delay settings of the
chip, which is inconsistent with what is described in the documentation.

Let's describe this part of the delay in the PHY and use the more
reasonable "rgmii-id" mode.

Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3576-roc-pc.dts | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3576-roc-pc.dts b/arch/arm64/boot/dts/rockchip/rk3576-roc-pc.dts
index d0ab1d1e0e11..edef483d37c4 100644
--- a/arch/arm64/boot/dts/rockchip/rk3576-roc-pc.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3576-roc-pc.dts
@@ -275,10 +275,8 @@ &eth0m0_rx_bus2
 		     &eth0m0_rgmii_clk
 		     &eth0m0_rgmii_bus
 		     &ethm0_clk0_25m_out>;
-	/* Use rgmii-rxid mode to disable rx delay inside Soc */
-	phy-mode = "rgmii-rxid";
+	phy-mode = "rgmii-id";
 	phy-handle = <&rgmii_phy0>;
-	tx_delay = <0x21>;
 	status = "okay";
 };
 
@@ -313,6 +311,7 @@ rgmii_phy0: phy@1 {
 		reset-delay-us = <20000>;
 		reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
 		reset-post-delay-us = <100000>;
+		tx-internal-delay-ps = <1950>;
 	};
 };
 
-- 
2.51.1

[PATCH 3/3] arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for ROCK 4D

[Chaoyi Chen]

From: Chaoyi Chen <chaoyi.chen@rock-chips.com>

According to the description in the net documentation, PHY modes
"rgmii", "rgmii-rxid" and "rgmii-txid" modes require the clock signal
to be delayed on the PCB.

The Rockchip platform has long used the above mentioned PHY modes and
private delay prop to describe the internal IO delay settings of the
chip, which is inconsistent with what is described in the documentation.

Let's describe this part of the delay in the PHY and use the more
reasonable "rgmii-id" mode.

Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
index 3e9c294cab91..70018c34cf08 100644
--- a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
@@ -329,7 +329,7 @@ &cpu_l3 {
 &gmac0 {
 	clock_in_out = "output";
 	phy-handle = <&rgmii_phy0>;
-	phy-mode = "rgmii-rxid";
+	phy-mode = "rgmii-id";
 	pinctrl-names = "default";
 	pinctrl-0 = <&eth0m0_miim
 		     &eth0m0_tx_bus2
@@ -338,8 +338,6 @@ &eth0m0_rgmii_clk
 		     &eth0m0_rgmii_bus
 		     &ethm0_clk0_25m_out>;
 	status = "okay";
-	tx_delay = <0x20>;
-	rx_delay = <0x00>;
 };
 
 &gpu {
@@ -772,6 +770,7 @@ rgmii_phy0: ethernet-phy@1 {
 		reset-assert-us = <20000>;
 		reset-deassert-us = <100000>;
 		reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
+		tx-internal-delay-ps = <1950>;
 	};
 };
 
-- 
2.51.1

Re: [PATCH 0/3] arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for rk3576 board

[Sebastian Reichel]

[-- Attachment #1: Type: text/plain, Size: 1873 bytes --]

Hi,

On Wed, Jan 21, 2026 at 11:15:45AM +0800, Chaoyi Chen wrote:
> From: Chaoyi Chen <chaoyi.chen@rock-chips.com>
> 
> According to the description in the net documentation, PHY modes
> "rgmii", "rgmii-rxid" and "rgmii-txid" modes require the clock signal
> to be delayed on the PCB.
> 
> The Rockchip platform has long used the above mentioned PHY modes and
> private delay prop to describe the internal IO delay settings of the
> chip, which is inconsistent with what is described in the documentation.
> 
> Some background, for RK3576, you can assume that:
> 
>         tx_delay_time(ns) = 0.0579 * delay_line_count + 0.105
> 
> For example, tx_delay = <0x20> means:
> 
>         time = 0.0579 * 0x20 + 0.105 ns = 1.9578 ns
> 
> Recently, Andrew has often mentioned the problem of phy mode in board
> level configuration. So let's start with the RK3576 to modify this.
> 
> Please test this series of patches, thanks.

The RTL8211F PHY driver does not use the "tx-internal-delay-ps"
property, which would require using phy_get_internal_delay(). Also
the hardware only seems to support enabling/disabling a fixed delay
of 2ns, so it cannot be implemented as far as I can tell. So unless
I missed something, this series makes no sense as-is.

My suggestion would be to add support for <rx/tx>-internal-delay-ps
to the Rockchip GMAC driver by introducing a new rk_gmac_ops
entry to translate the standard properties into register values:

int rk3576_delay_conversion(unsigned int delay_ps) {
    return (delay_ps*10 - 1050) / 579;
}

That allows using standard properties in DT instead of vendor
specific "rx_delay"/"tx_delay". This results in a much better board
description and shows how far boards derive from the the standard
2ns (which can use rgmii-id without any extra delay specification).

Greetings,

-- Sebastian

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

Re: [PATCH 0/3] arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for rk3576 board

[Chaoyi Chen]

Hi Sebastian, Andrew,

On 1/21/2026 1:51 PM, Sebastian Reichel wrote:
> Hi,
> 
> On Wed, Jan 21, 2026 at 11:15:45AM +0800, Chaoyi Chen wrote:
>> From: Chaoyi Chen <chaoyi.chen@rock-chips.com>
>>
>> According to the description in the net documentation, PHY modes
>> "rgmii", "rgmii-rxid" and "rgmii-txid" modes require the clock signal
>> to be delayed on the PCB.
>>
>> The Rockchip platform has long used the above mentioned PHY modes and
>> private delay prop to describe the internal IO delay settings of the
>> chip, which is inconsistent with what is described in the documentation.
>>
>> Some background, for RK3576, you can assume that:
>>
>>         tx_delay_time(ns) = 0.0579 * delay_line_count + 0.105
>>
>> For example, tx_delay = <0x20> means:
>>
>>         time = 0.0579 * 0x20 + 0.105 ns = 1.9578 ns
>>
>> Recently, Andrew has often mentioned the problem of phy mode in board
>> level configuration. So let's start with the RK3576 to modify this.
>>
>> Please test this series of patches, thanks.
> 
> The RTL8211F PHY driver does not use the "tx-internal-delay-ps"
> property, which would require using phy_get_internal_delay(). Also
> the hardware only seems to support enabling/disabling a fixed delay
> of 2ns, so it cannot be implemented as far as I can tell. So unless
> I missed something, this series makes no sense as-is.
> 
> My suggestion would be to add support for <rx/tx>-internal-delay-ps
> to the Rockchip GMAC driver by introducing a new rk_gmac_ops
> entry to translate the standard properties into register values:
> 
> int rk3576_delay_conversion(unsigned int delay_ps) {
>     return (delay_ps*10 - 1050) / 579;
> }
> 
> That allows using standard properties in DT instead of vendor
> specific "rx_delay"/"tx_delay". This results in a much better board
> description and shows how far boards derive from the the standard
> 2ns (which can use rgmii-id without any extra delay specification).
> 

Oh, your approach was also my initial thought.

I first asked whether it would be more appropriate to implement this
in the PHY or in the GMAC, and Andrew told me it should preferably be 
done in the PHY. But I'm not sure whether all PHYs support this
operation.

Andrew, would it be possible to implement this in the GMAC for cases
where the PHY does not support it? Thanks.

-- 
Best, 
Chaoyi

Re: [PATCH 0/3] arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for rk3576 board

[Andrew Lunn]

> > That allows using standard properties in DT instead of vendor
> > specific "rx_delay"/"tx_delay". This results in a much better board
> > description and shows how far boards derive from the the standard
> > 2ns (which can use rgmii-id without any extra delay specification).
> > 
> 
> Oh, your approach was also my initial thought.
> 
> I first asked whether it would be more appropriate to implement this
> in the PHY or in the GMAC, and Andrew told me it should preferably be 
> done in the PHY. But I'm not sure whether all PHYs support this
> operation.
> 
> Andrew, would it be possible to implement this in the GMAC for cases
> where the PHY does not support it? Thanks.

As i commented to one of the patches, the PHY will be adding 2ns by
default when 'rgmii-id' is used. If you read the RGMII standard, you
also see there is quite a wide tolerance for these delays. So unless
there is a badly designed PCB which needs something well away from
2ns, i don't think it is necessary.

     Andrew

Re: [PATCH 0/3] arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for rk3576 board

[Andrew Lunn]

On Wed, Jan 21, 2026 at 11:15:45AM +0800, Chaoyi Chen wrote:
> From: Chaoyi Chen <chaoyi.chen@rock-chips.com>
> 
> According to the description in the net documentation, PHY modes
> "rgmii", "rgmii-rxid" and "rgmii-txid" modes require the clock signal
> to be delayed on the PCB.
> 
> The Rockchip platform has long used the above mentioned PHY modes and
> private delay prop to describe the internal IO delay settings of the
> chip, which is inconsistent with what is described in the documentation.
> 
> Some background, for RK3576, you can assume that:
> 
>         tx_delay_time(ns) = 0.0579 * delay_line_count + 0.105

Where did this formula come from? Is it in the datasheet.

      Andrew

Re: [PATCH 0/3] arm64: dts: rockchip: Change gmac phy-mode to rgmii-id for rk3576 board

[Chaoyi Chen]

Hi Andrew,

On 1/21/2026 8:57 PM, Andrew Lunn wrote:
> On Wed, Jan 21, 2026 at 11:15:45AM +0800, Chaoyi Chen wrote:
>> From: Chaoyi Chen <chaoyi.chen@rock-chips.com>
>>
>> According to the description in the net documentation, PHY modes
>> "rgmii", "rgmii-rxid" and "rgmii-txid" modes require the clock signal
>> to be delayed on the PCB.
>>
>> The Rockchip platform has long used the above mentioned PHY modes and
>> private delay prop to describe the internal IO delay settings of the
>> chip, which is inconsistent with what is described in the documentation.
>>
>> Some background, for RK3576, you can assume that:
>>
>>         tx_delay_time(ns) = 0.0579 * delay_line_count + 0.105
> 
> Where did this formula come from? Is it in the datasheet.
> 

These are measured values obtained from hardware signal testing.
They are not documented in the TRM.

-- 
Best, 
Chaoyi