From: Sumit Gupta <sumitg@nvidia.com>
To: <treding@nvidia.com>, <jonathanh@nvidia.com>, <robh@kernel.org>,
<krzk+dt@kernel.org>, <conor+dt@kernel.org>,
<devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Cc: <bbasu@nvidia.com>, <sumitg@nvidia.com>
Subject: [PATCH 2/3] arm64: dts: tegra264: Fix CPU1 node unit-address
Date: Wed, 21 Jan 2026 16:15:35 +0530 [thread overview]
Message-ID: <20260121104536.3214101-3-sumitg@nvidia.com> (raw)
In-Reply-To: <20260121104536.3214101-1-sumitg@nvidia.com>
Fix the unit-address of cpu1 node to match its reg property value.
Fixes: f6d1890e5f4d ("arm64: tegra: Add device tree for Tegra264")
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra264.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra264.dtsi b/arch/arm64/boot/dts/nvidia/tegra264.dtsi
index 7644a41d5f72..fa00e95f87a3 100644
--- a/arch/arm64/boot/dts/nvidia/tegra264.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra264.dtsi
@@ -3788,7 +3788,7 @@ cpu0: cpu@0 {
d-cache-sets = <256>;
};
- cpu1: cpu@1 {
+ cpu1: cpu@10000 {
compatible = "arm,neoverse-v3ae";
device_type = "cpu";
reg = <0x10000>;
--
2.34.1
next prev parent reply other threads:[~2026-01-21 10:46 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-21 10:45 [PATCH 0/3] arm64: dts: tegra: CPU and cache node updates Sumit Gupta
2026-01-21 10:45 ` [PATCH 1/3] arm64: dts: tegra234: Fix CPU compatible string to cortex-a78ae Sumit Gupta
2026-01-21 10:45 ` Sumit Gupta [this message]
2026-01-21 10:45 ` [PATCH 3/3] arm64: dts: tegra264: Populate CPU and L2 cache nodes Sumit Gupta
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