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Thu, 22 Jan 2026 08:23:11 -0800 (PST) Received: from LAPTOP-872M7T80.localdomain ([122.168.66.50]) by smtp.googlemail.com with ESMTPSA id d9443c01a7336-2a76c5f4fb0sm82145295ad.45.2026.01.22.08.23.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Jan 2026 08:23:11 -0800 (PST) From: Akhila YS Date: Thu, 22 Jan 2026 16:23:04 +0000 Subject: [PATCH] dt-bindings: mtd: st,spear600-smi: convert to DT schema Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260122-spear-v1-1-fd44bc79695b@gmail.com> X-B4-Tracking: v=1; b=H4sIAOdOcmkC/6tWKk4tykwtVrJSqFYqSi3LLM7MzwNyDHUUlJIzE vPSU3UzU4B8JSMDIzMDQyMj3eKC1MQi3VRTS8uUZJNU81RjIyWg2oKi1LTMCrA50bG1tQDcbad GVwAAAA== X-Change-ID: 20260122-spear-e599dc4e7e32 To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Akhila YS X-Mailer: b4 0.14.3 Convert STMicroelectronics SPEAr600 Serial Memory Interface (SMI) Controller binding to YAML format. Signed-off-by: Akhila YS --- .../devicetree/bindings/mtd/spear_smi.txt | 29 --------- .../devicetree/bindings/mtd/st,spear600-smi.yaml | 72 ++++++++++++++++++++++ 2 files changed, 72 insertions(+), 29 deletions(-) diff --git a/Documentation/devicetree/bindings/mtd/spear_smi.txt b/Documentation/devicetree/bindings/mtd/spear_smi.txt deleted file mode 100644 index c41873e92d26..000000000000 --- a/Documentation/devicetree/bindings/mtd/spear_smi.txt +++ /dev/null @@ -1,29 +0,0 @@ -* SPEAr SMI - -Required properties: -- compatible : "st,spear600-smi" -- reg : Address range of the mtd chip -- #address-cells, #size-cells : Must be present if the device has sub-nodes - representing partitions. -- interrupts: Should contain the STMMAC interrupts -- clock-rate : Functional clock rate of SMI in Hz - -Optional properties: -- st,smi-fast-mode : Flash supports read in fast mode - -Example: - - smi: flash@fc000000 { - compatible = "st,spear600-smi"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0xfc000000 0x1000>; - interrupt-parent = <&vic1>; - interrupts = <12>; - clock-rate = <50000000>; /* 50MHz */ - - flash@f8000000 { - st,smi-fast-mode; - ... - }; - }; diff --git a/Documentation/devicetree/bindings/mtd/st,spear600-smi.yaml b/Documentation/devicetree/bindings/mtd/st,spear600-smi.yaml new file mode 100644 index 000000000000..8fe27aae7527 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/st,spear600-smi.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/st,spear600-smi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics SPEAr600 Serial Memory Interface (SMI) Controller + +maintainers: + - Richard Weinberger + +description: + The SPEAr600 Serial Memory Interface (SMI) is a dedicated serial flash + controller supporting up to four chip selects for serial NOR flashes + connected in parallel. The controller is memory-mapped and the attached + flash devices appear in the CPU address space.The driver + (drivers/mtd/devices/spear_smi.c) probes the attached flashes + dynamically by sending commands (e.g., RDID) to each bank. + Flash sub nodes describe the memory range and optional per-flash + properties. + +allOf: + - $ref: mtd.yaml# + +properties: + compatible: + const: st,spear600-smi + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + clock-rate: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Functional clock rate of the SMI controller in Hz. + + st,smi-fast-mode: + type: boolean + description: Indicates that the attached flash supports fast read mode. + +required: + - compatible + - reg + - clock-rate + +unevaluatedProperties: false + +examples: + - | + flash@fc000000 { + compatible = "st,spear600-smi"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0xfc000000 0x1000>; + interrupt-parent = <&vic1>; + interrupts = <12>; + clock-rate = <50000000>; /* 50 MHz */ + + flash@f8000000 { + reg = <0xfc000000 0x1000>; + st,smi-fast-mode; + }; + }; +... --- base-commit: cc3aa43b44bdb43dfbac0fcb51c56594a11338a8 change-id: 20260122-spear-e599dc4e7e32 Best regards, -- Akhila YS