From: Bjorn Helgaas <helgaas@kernel.org>
To: manivannan.sadhasivam@oss.qualcomm.com
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Manivannan Sadhasivam <mani@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Bartosz Golaszewski <brgl@bgdev.pl>,
Damien Le Moal <dlemoal@kernel.org>,
Niklas Cassel <cassel@kernel.org>,
Linus Walleij <linus.walleij@linaro.org>,
Bartosz Golaszewski <brgl@kernel.org>,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
Stephan Gerhold <stephan.gerhold@linaro.org>,
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
linux-pm@vger.kernel.org, linux-ide@vger.kernel.org,
Frank Li <Frank.Li@nxp.com>,
Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Subject: Re: [PATCH v6 0/4] PCI: Add initial support for handling PCIe M.2 connectors in devicetree
Date: Sat, 24 Jan 2026 15:07:12 -0600 [thread overview]
Message-ID: <20260124210712.GA180714@bhelgaas> (raw)
In-Reply-To: <20260122-pci-m2-v6-0-575da9f97239@oss.qualcomm.com>
On Thu, Jan 22, 2026 at 10:46:50PM +0530, Manivannan Sadhasivam via B4 Relay wrote:
> Hi,
>
> This series is an initial attempt to support the PCIe M.2 connectors in the
> kernel and devicetree binding. The PCIe M.2 connectors as defined in the PCI
> Express M.2 Specification are widely used in Notebooks/Tablet form factors (even
> in PCs). On the ACPI platforms, power to these connectors are mostly handled by
> the firmware/BIOS and the kernel never bothered to directly power manage them as
> like other PCIe connectors. But on the devicetree platforms, the kernel needs to
> power manage these connectors with the help of the devicetree description. But
> so far, there is no proper representation of the M.2 connectors in devicetree
> binding. This forced the developers to fake the M.2 connectors as PMU nodes [1]
> and fixed regulators in devicetree.
Could you rebase this series on pci/pwrctrl, please?
I'm pretty sure I would mess up the conflict resolutions, and I have
no way to test this.
prev parent reply other threads:[~2026-01-24 21:07 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-22 17:16 [PATCH v6 0/4] PCI: Add initial support for handling PCIe M.2 connectors in devicetree Manivannan Sadhasivam via B4 Relay
2026-01-22 17:16 ` [PATCH v6 1/4] dt-bindings: connector: Add PCIe M.2 Mechanical Key M connector Manivannan Sadhasivam via B4 Relay
2026-01-22 23:28 ` Rob Herring (Arm)
2026-01-22 17:16 ` [PATCH v6 2/4] PCI/pwrctrl: Add support for handling PCIe M.2 connectors Manivannan Sadhasivam via B4 Relay
2026-01-24 21:24 ` Bjorn Helgaas
2026-01-22 17:16 ` [PATCH v6 3/4] PCI/pwrctrl: Create pwrctrl device if the graph port is found Manivannan Sadhasivam via B4 Relay
2026-01-22 17:16 ` [PATCH v6 4/4] power: sequencing: Add the Power Sequencing driver for the PCIe M.2 connectors Manivannan Sadhasivam via B4 Relay
2026-01-23 9:31 ` (subset) [PATCH v6 0/4] PCI: Add initial support for handling PCIe M.2 connectors in devicetree Bartosz Golaszewski
2026-01-24 21:07 ` Bjorn Helgaas [this message]
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