From: Conor Dooley <conor@kernel.org>
To: Yangyu Chen <cyy@cyyself.name>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Anup Patel <anup.patel@oss.qualcomm.com>,
Samuel Holland <samuel.holland@sifive.com>,
Charles Mirabile <cmirabil@redhat.com>,
Lucas Zampieri <lzampier@redhat.com>,
Thomas Gleixner <tglx@kernel.org>, Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Mason Huo <mason.huo@starfivetech.com>,
Zhang Xincheng <zhangxincheng@ultrarisc.com>,
Charlie Jenkins <charlie@rivosinc.com>,
Marc Zyngier <maz@kernel.org>,
Sia Jee Heng <jeeheng.sia@starfivetech.com>,
Ley Foon Tan <leyfoon.tan@starfivetech.com>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Rob Herring <robh@kernel.org>, Conor Dooley <conor+dt@kernel.org>,
Alexandre Ghiti <alex@ghiti.fr>,
devicetree@vger.kernel.org, Jia Wang <wangjia@ultrarisc.com>
Subject: Re: [PATCH v3 1/2] irqchip/sifive-plic: Fix wrong nr_irqs handling
Date: Wed, 4 Feb 2026 17:46:37 +0000 [thread overview]
Message-ID: <20260204-implosion-defuse-f0bb02febc77@spud> (raw)
In-Reply-To: <tencent_3927462924B7319F8F4F90447BDC110FB705@qq.com>
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On Wed, Feb 04, 2026 at 01:21:16AM +0800, Yangyu Chen wrote:
> Since the first irq source is 1 instead of 0, when the number of
> irqs is multiple of 32, the last irq group will be ignored during
> allocation, saving, and restoring. This lead to memory corruption
> when accessing enable_save beyond allocated memory after commit
> 14ff9e54dd14 ("irqchip/sifive-plic: Cache the interrupt enable state")
> which will access enable_save for all sources during plic_probe.
> Thus, we should allocate irq_groups based on (nr_irqs + 1) instead of
> nr_irqs to avoid this issue. This commit also fixes related loops
> to have all consumer of nr_irqs consistent.
>
> This is an long standing bug since Linux v5.6 but since the last irq
> source is rarely used, it may not be triggered in practice until commit
FWIW, on mpfs the 186th and last source is used by the hardware but it's
used by the platform's m-mode firmware not linux.
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next prev parent reply other threads:[~2026-02-04 17:46 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-03 17:17 [PATCH v3 0/2] irqchip/sifive-plic: Fix wrong nr_irqs handling Yangyu Chen
2026-02-03 17:21 ` [PATCH v3 1/2] " Yangyu Chen
2026-02-03 20:40 ` Thomas Gleixner
2026-02-04 4:40 ` Yangyu Chen
2026-02-04 17:46 ` Conor Dooley [this message]
2026-02-03 17:21 ` [PATCH v3 2/2] dt-binding: riscv: Clarify the riscv,ndev meaning in PLIC Yangyu Chen
2026-02-04 17:49 ` Conor Dooley
2026-02-20 4:10 ` [PATCH v3 0/2] irqchip/sifive-plic: Fix wrong nr_irqs handling patchwork-bot+linux-riscv
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