From: Conor Dooley <conor@kernel.org>
To: linux-riscv@lists.infradead.org, Conor Dooley <conor@kernel.org>
Cc: Conor Dooley <conor.dooley@microchip.com>,
Daire McNamara <daire.mcnamara@microchip.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1] riscv: dts: microchip: add can resets to mpfs
Date: Fri, 6 Feb 2026 20:28:44 +0000 [thread overview]
Message-ID: <20260206-reoccupy-debrief-88ea7343b1f2@spud> (raw)
In-Reply-To: <20260128-nacho-craziness-45a3e575ba7c@spud>
From: Conor Dooley <conor.dooley@microchip.com>
On Wed, 28 Jan 2026 20:50:33 +0000, Conor Dooley wrote:
> The can IP on PolarFire SoC requires the use of the blocks reset
> during normal operation, and the property is therefore required by the
> binding, causing a warning on the m100pfsevp board where it is default
> enabled:
> mpfs-m100pfsevp.dtb: can@2010c000 (microchip,mpfs-can): 'resets' is a required property
> Add the reset to both can nodes.
>
> [...]
Applied to riscv-soc-fixes, thanks!
[1/1] riscv: dts: microchip: add can resets to mpfs
https://git.kernel.org/conor/c/ff4b6bf7eef4
Thanks,
Conor.
prev parent reply other threads:[~2026-02-06 20:28 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-28 20:50 [PATCH v1] riscv: dts: microchip: add can resets to mpfs Conor Dooley
2026-02-06 20:28 ` Conor Dooley [this message]
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