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([2804:14c:485:4b61:44a3:2bb7:a035:fd7e]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1270433ab31sm2782500c88.11.2026.02.06.10.13.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Feb 2026 10:13:20 -0800 (PST) From: Fabio Estevam To: heiko@sntech.de Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Fabio Estevam Subject: [PATCH 00/11] ARM: rockchip: Add initial RV1103B and Omega4 board support Date: Fri, 6 Feb 2026 15:12:58 -0300 Message-Id: <20260206181309.2696095-1-festevam@gmail.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Fabio Estevam This series adds initial support for the Rockchip RV1103B SoC and the Omega4 board. The goal of this series is to provide the minimal device tree and platform support required to boot the Omega4 board into Linux userspace with the root filesystem located on SPI NAND. The series includes: - Base RV1103B SoC device tree description - Omega4 board device tree - Required pinctrl and clock definitions - Basic peripheral enablement required for boot With this series applied, the Omega4 board is able to: - Initialize DRAM - Boot the kernel - Access SPI NAND - Mount the root filesystem from SPI NAND - Reach userspace successfully This submission intentionally focuses on minimal bring-up support. Additional peripheral enablement and feature support will be submitted separately. Tested on Omega4 hardware based on the RV1103B SoC. Boot verified with root filesystem stored on SPI NAND. Fabio Estevam (11): dt-bindings: clock: rockchip: Add RV1103B clock and reset unit dt-bindings: clk: rockchip: Add RV1103B clock header clk: rockchip: Add clock controller for the RV1103B dt-bindings: pinctrl: Add RV1103B pinctrl support pinctrl: rockchip: Add RV1103B pinctrl support dt-bindings: mmc: rockchip-dw-mshc: Add compatible string for R1103B dt-bindings: serial: snps-dw-apb-uart: Add support for RV1103B dt-bindings: soc: rockchip: Add RV1103B IOC and GRF entries ARM: dts: rockchip: Add support for RV1103B dt-bindings: arm: rockchip: Add Onion RV1103B Omega4 ARM: dts: rockchip: Add Onion RV1103B Omega4 .../devicetree/bindings/arm/rockchip.yaml | 5 + .../bindings/clock/rockchip,rv1103b-cru.yaml | 63 ++ .../bindings/mmc/rockchip-dw-mshc.yaml | 1 + .../bindings/pinctrl/rockchip,pinctrl.yaml | 1 + .../bindings/serial/snps-dw-apb-uart.yaml | 1 + .../devicetree/bindings/soc/rockchip/grf.yaml | 2 + arch/arm/boot/dts/rockchip/Makefile | 1 + arch/arm/boot/dts/rockchip/rv1103b-omega4.dts | 92 ++ .../boot/dts/rockchip/rv1103b-pinctrl.dtsi | 831 ++++++++++++++++++ arch/arm/boot/dts/rockchip/rv1103b.dtsi | 266 ++++++ drivers/clk/rockchip/Kconfig | 7 + drivers/clk/rockchip/Makefile | 1 + drivers/clk/rockchip/clk-rv1103b.c | 670 ++++++++++++++ drivers/clk/rockchip/clk.h | 49 ++ drivers/pinctrl/pinctrl-rockchip.c | 313 ++++++- drivers/pinctrl/pinctrl-rockchip.h | 1 + .../dt-bindings/clock/rockchip,rv1103b-cru.h | 488 ++++++++++ 17 files changed, 2791 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rv1103b-cru.yaml create mode 100644 arch/arm/boot/dts/rockchip/rv1103b-omega4.dts create mode 100644 arch/arm/boot/dts/rockchip/rv1103b-pinctrl.dtsi create mode 100644 arch/arm/boot/dts/rockchip/rv1103b.dtsi create mode 100644 drivers/clk/rockchip/clk-rv1103b.c create mode 100644 include/dt-bindings/clock/rockchip,rv1103b-cru.h -- 2.34.1