From: kernel test robot <lkp@intel.com>
To: Chuan Liu via B4 Relay <devnull+chuan.liu.amlogic.com@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: oe-kbuild-all@lists.linux.dev, linux-amlogic@lists.infradead.org,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, Chuan Liu <chuan.liu@amlogic.com>
Subject: Re: [PATCH 08/13] clk: amlogic: Add PLL driver
Date: Mon, 9 Feb 2026 23:37:17 +0800 [thread overview]
Message-ID: <202602092354.9sJeoo5S-lkp@intel.com> (raw)
In-Reply-To: <20260209-a9_clock_driver-v1-8-a9198dc03d2a@amlogic.com>
Hi Chuan,
kernel test robot noticed the following build errors:
[auto build test ERROR on 4d310797262f0ddf129e76c2aad2b950adaf1fda]
url: https://github.com/intel-lab-lkp/linux/commits/Chuan-Liu-via-B4-Relay/dt-bindings-clock-Add-Amlogic-A9-standardized-model-clock-control-units/20260209-135334
base: 4d310797262f0ddf129e76c2aad2b950adaf1fda
patch link: https://lore.kernel.org/r/20260209-a9_clock_driver-v1-8-a9198dc03d2a%40amlogic.com
patch subject: [PATCH 08/13] clk: amlogic: Add PLL driver
config: arm-randconfig-003-20260209 (https://download.01.org/0day-ci/archive/20260209/202602092354.9sJeoo5S-lkp@intel.com/config)
compiler: arm-linux-gnueabi-gcc (GCC) 8.5.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260209/202602092354.9sJeoo5S-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202602092354.9sJeoo5S-lkp@intel.com/
All errors (new ones prefixed by >>):
arm-linux-gnueabi-ld: drivers/clk/amlogic/clk-pll.o: in function `aml_pll_available_rates_show':
>> drivers/clk/amlogic/clk-pll.c:554: undefined reference to `__aeabi_uldivmod'
>> arm-linux-gnueabi-ld: drivers/clk/amlogic/clk-pll.c:567: undefined reference to `__aeabi_uldivmod'
>> arm-linux-gnueabi-ld: drivers/clk/amlogic/clk-pll.c:554: undefined reference to `__aeabi_uldivmod'
vim +554 drivers/clk/amlogic/clk-pll.c
536
537 static int aml_pll_get_best_rate(unsigned long rate, unsigned long step_rate,
538 u64 min_vco_rate, u64 max_vco_rate,
539 u8 od_max, enum round_type round,
540 unsigned long *out_rate)
541 {
542 int i;
543 u64 vco_rate;
544 unsigned long now_rate, best_rate = 0;
545
546 for (i = 0; i <= od_max; i++) {
547 vco_rate = rate << i;
548 if (vco_rate < min_vco_rate)
549 continue;
550
551 if (vco_rate > max_vco_rate)
552 break;
553
> 554 if (vco_rate % step_rate == 0) {
555 best_rate = rate;
556
557 break;
558 }
559
560 if (round == ROUND_DOWN) {
561 vco_rate = vco_rate - (vco_rate % step_rate);
562 now_rate = vco_rate >> i;
563 if ((rate - now_rate) < (rate - best_rate))
564 best_rate = now_rate;
565 } else {
566 vco_rate = vco_rate + step_rate;
> 567 vco_rate = vco_rate - (vco_rate % step_rate);
568 now_rate = vco_rate >> i;
569 if ((now_rate - rate) < (best_rate - rate))
570 best_rate = now_rate;
571 }
572 }
573
574 if (!best_rate)
575 return -EINVAL;
576
577 *out_rate = best_rate;
578
579 return 0;
580 }
581
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
next prev parent reply other threads:[~2026-02-09 15:37 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-09 5:48 [PATCH 00/13] clk: amlogic: Introduce A9 PLL and CCU driver support Chuan Liu via B4 Relay
2026-02-09 5:48 ` [PATCH 01/13] dt-bindings: clock: Add Amlogic A9 standardized model clock control units Chuan Liu via B4 Relay
2026-02-09 13:14 ` Krzysztof Kozlowski
2026-02-09 13:18 ` Krzysztof Kozlowski
2026-02-09 5:48 ` [PATCH 02/13] dt-bindings: clock: Add Amlogic A9 PLL controllers Chuan Liu via B4 Relay
2026-02-09 5:48 ` [PATCH 03/13] dt-bindings: clock: Add Amlogic A9 misc clock control units Chuan Liu via B4 Relay
2026-02-09 13:15 ` Krzysztof Kozlowski
2026-02-09 5:48 ` [PATCH 04/13] clk: amlogic: Add basic clock driver Chuan Liu via B4 Relay
2026-02-09 13:17 ` Krzysztof Kozlowski
2026-02-09 5:48 ` [PATCH 05/13] clk: amlogic: Add composite " Chuan Liu via B4 Relay
2026-02-09 13:18 ` Krzysztof Kozlowski
2026-02-09 5:48 ` [PATCH 06/13] clk: amlogic: Add noglitch " Chuan Liu via B4 Relay
2026-02-09 21:51 ` Martin Blumenstingl
2026-02-09 5:48 ` [PATCH 07/13] clk: amlogic: Add duandiv " Chuan Liu via B4 Relay
2026-02-09 5:48 ` [PATCH 08/13] clk: amlogic: Add PLL driver Chuan Liu via B4 Relay
2026-02-09 15:37 ` kernel test robot [this message]
2026-02-09 17:35 ` kernel test robot
2026-02-09 5:48 ` [PATCH 09/13] clk: amlogic: Add DT-based clock registration functions Chuan Liu via B4 Relay
2026-02-09 5:48 ` [PATCH 10/13] clk: amlogic: Add A9 standardized model clock control units driver Chuan Liu via B4 Relay
2026-02-09 5:48 ` [PATCH 11/13] clk: amlogic: Add A9 PLL controllers driver Chuan Liu via B4 Relay
2026-02-09 5:48 ` [PATCH 12/13] clk: amlogic: Add A9 misc clock control units driver Chuan Liu via B4 Relay
2026-02-09 5:48 ` [PATCH 13/13] clk: amlogic: Add support for building as combined kernel module Chuan Liu via B4 Relay
2026-02-11 8:34 ` [PATCH 00/13] clk: amlogic: Introduce A9 PLL and CCU driver support Jerome Brunet
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