[PATCH 2/7] dt-bindings: clk: meson: Add Amlogic T7 fix pll support

[PATCH 2/7] dt-bindings: clk: meson: Add Amlogic T7 fix pll support

[Ronald Claveau]

Add PLL for the clock controller of the Amlogic T7 SoC family.

Signed-off-by: Ronald Claveau <linux-kernel-dev@aliel.fr>
---
 include/dt-bindings/clock/amlogic,t7-pll-clkc.h | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/include/dt-bindings/clock/amlogic,t7-pll-clkc.h b/include/dt-bindings/clock/amlogic,t7-pll-clkc.h
index e2481f2f1163..690421009eab 100644
--- a/include/dt-bindings/clock/amlogic,t7-pll-clkc.h
+++ b/include/dt-bindings/clock/amlogic,t7-pll-clkc.h
@@ -53,4 +53,20 @@
 #define CLKID_MCLK_1_PRE	9
 #define CLKID_MCLK_1		10
 
+/* ANALOG */
+#define CLKID_FPLL_DCO		0
+#define CLKID_FPLL			1
+#define CLKID_FDIV2_DIV		2
+#define CLKID_FDIV2			3
+#define CLKID_FDIV2P5_DIV	4
+#define CLKID_FDIV2P5		5
+#define CLKID_FDIV3_DIV		6
+#define CLKID_FDIV3			7
+#define CLKID_FDIV4_DIV		8
+#define CLKID_FDIV4			9
+#define CLKID_FDIV5_DIV		10
+#define CLKID_FDIV5			11
+#define CLKID_FDIV7_DIV		12
+#define CLKID_FDIV7			13
+
 #endif /* __T7_PLL_CLKC_H */
-- 
2.49.0

Re: [PATCH 2/7] dt-bindings: clk: meson: Add Amlogic T7 fix pll support

[Krzysztof Kozlowski]

On 18/02/2026 11:17, Ronald Claveau wrote:
> Add PLL for the clock controller of the Amlogic T7 SoC family.
> 
> Signed-off-by: Ronald Claveau <linux-kernel-dev@aliel.fr>
> ---

This is not a separate patch, but belongs to the one adding this
binding/compatible.

Best regards,
Krzysztof

[PATCH 7/7] arm64: dts: amlogic: Add EMMC for T7 khadas VIM4

[Ronald Claveau]

Add EMMC support for Amlogic T7 Khadas VIM4 device dts.

Signed-off-by: Ronald Claveau <linux-kernel-dev@aliel.fr>
---
 .../amlogic/amlogic-t7-a311d2-khadas-vim4.dts | 62 +++++++++++++++++++
 1 file changed, 62 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
index fffdab96b12e..fbc43a307015 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
+++ b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts
@@ -15,6 +15,10 @@ aliases {
 		serial0 = &uart_a;
 	};
 
+	chosen {
+		stdout-path = "serial0:921600n8";
+	};
+
 	memory@0 {
 		device_type = "memory";
 		reg = <0x0 0x0 0x2 0x0>; /* 8 GB */
@@ -45,6 +49,42 @@ xtal: xtal-clk {
 		#clock-cells = <0>;
 	};
 
+	dc_in: regulator-dc-in {
+		compatible = "regulator-fixed";
+		regulator-name = "DC_IN";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+
+	vsys_3v3: regulator-vsys-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "VSYS_3V3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&dc_in>;
+		regulator-always-on;
+	};
+
+	vcc_3v3: regulator-vcc-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC_3V3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vsys_3v3>;
+		regulator-always-on;
+		/* FIXME: actually controlled by VDDCPU_B_EN */
+	};
+
+	emmc_1v8: regulator-emmc-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "EMMC_AO1V8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_3v3>;
+		regulator-always-on;
+	};
+
 };
 
 &uart_a {
@@ -52,3 +92,25 @@ &uart_a {
 	clocks = <&xtal>, <&xtal>, <&xtal>;
 	clock-names = "xtal", "pclk", "baud";
 };
+
+/* eMMC */
+&sd_emmc_c {
+	status = "okay";
+	pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
+	pinctrl-1 = <&emmc_clk_gate_pins>;
+	pinctrl-names = "default", "clk-gate";
+
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	mmc-ddr-1_8v;
+	mmc-hs200-1_8v;
+	mmc-hs400-1_8v;
+	max-frequency = <200000000>;
+	disable-wp;
+	non-removable;
+
+	power-domains = <&pwrc PWRC_T7_EMMC_ID>;
+
+	vmmc-supply = <&vcc_3v3>;
+	vqmmc-supply = <&emmc_1v8>;
+};
-- 
2.49.0

[PATCH 2/7] dt-bindings: clk: meson: Add Amlogic T7 fix pll support

[Ronald Claveau]

Add PLL for the clock controller of the Amlogic T7 SoC family.

Signed-off-by: Ronald Claveau <linux-kernel-dev@aliel.fr>
---
 include/dt-bindings/clock/amlogic,t7-pll-clkc.h | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/include/dt-bindings/clock/amlogic,t7-pll-clkc.h b/include/dt-bindings/clock/amlogic,t7-pll-clkc.h
index e2481f2f1163..690421009eab 100644
--- a/include/dt-bindings/clock/amlogic,t7-pll-clkc.h
+++ b/include/dt-bindings/clock/amlogic,t7-pll-clkc.h
@@ -53,4 +53,20 @@
 #define CLKID_MCLK_1_PRE	9
 #define CLKID_MCLK_1		10
 
+/* ANALOG */
+#define CLKID_FPLL_DCO		0
+#define CLKID_FPLL			1
+#define CLKID_FDIV2_DIV		2
+#define CLKID_FDIV2			3
+#define CLKID_FDIV2P5_DIV	4
+#define CLKID_FDIV2P5		5
+#define CLKID_FDIV3_DIV		6
+#define CLKID_FDIV3			7
+#define CLKID_FDIV4_DIV		8
+#define CLKID_FDIV4			9
+#define CLKID_FDIV5_DIV		10
+#define CLKID_FDIV5			11
+#define CLKID_FDIV7_DIV		12
+#define CLKID_FDIV7			13
+
 #endif /* __T7_PLL_CLKC_H */
-- 
2.49.0

[PATCH 3/7] dt-bindings: clk: meson: Add Amlogic T7 fix pll support

[Ronald Claveau]

Add PLL for the clock controller of the Amlogic T7 SoC family.

Signed-off-by: Ronald Claveau <linux-kernel-dev@aliel.fr>
---
 .../devicetree/bindings/clock/amlogic,t7-pll-clkc.yaml       | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/clock/amlogic,t7-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,t7-pll-clkc.yaml
index 49c61f65deff..6a1598e6c359 100644
--- a/Documentation/devicetree/bindings/clock/amlogic,t7-pll-clkc.yaml
+++ b/Documentation/devicetree/bindings/clock/amlogic,t7-pll-clkc.yaml
@@ -23,6 +23,7 @@ properties:
       - amlogic,t7-mpll
       - amlogic,t7-hdmi-pll
       - amlogic,t7-mclk-pll
+      - amlogic,t7-fpll
 
   reg:
     maxItems: 1
@@ -42,6 +43,7 @@ properties:
       - const: in0
       - const: in1
       - const: in2
+      - const: xtal
     minItems: 1
 
 required:
@@ -72,11 +74,12 @@ allOf:
           contains:
             enum:
               - amlogic,t7-gp0-pll
-              - amlogic,t7-gp1--pll
+              - amlogic,t7-gp1-pll
               - amlogic,t7-hifi-pll
               - amlogic,t7-pcie-pll
               - amlogic,t7-mpll
               - amlogic,t7-hdmi-pll
+              - amlogic,t7-fpll
 
     then:
       properties:
-- 
2.49.0

[PATCH 5/7] dt-bindings: clk: meson: Add Amlogic T7 sys pll support

[Ronald Claveau]

Add SYS PLL for the clock controller of the Amlogic T7 SoC family.

Signed-off-by: Ronald Claveau <linux-kernel-dev@aliel.fr>
---
 include/dt-bindings/clock/amlogic,t7-peripherals-clkc.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/include/dt-bindings/clock/amlogic,t7-peripherals-clkc.h b/include/dt-bindings/clock/amlogic,t7-peripherals-clkc.h
index 32c4b62037de..0cda8edfa7cd 100644
--- a/include/dt-bindings/clock/amlogic,t7-peripherals-clkc.h
+++ b/include/dt-bindings/clock/amlogic,t7-peripherals-clkc.h
@@ -224,5 +224,12 @@
 #define CLKID_SYS_PWM_AO_CD		215
 #define CLKID_SYS_PWM_AO_EF		216
 #define CLKID_SYS_PWM_AO_GH		217
+#define CLKID_SYS_A_SEL			218
+#define CLKID_SYS_A_DIV			219
+#define CLKID_SYS_A			220
+#define CLKID_SYS_B_SEL			221
+#define CLKID_SYS_B_DIV			222
+#define CLKID_SYS_B			223
+#define CLKID_SYS			224
 
 #endif /* __T7_PERIPHERALS_CLKC_H */
-- 
2.49.0

Re: [PATCH 5/7] dt-bindings: clk: meson: Add Amlogic T7 sys pll support

[Ferass El Hafidi]

Hi,

On Wed, 18 Feb 2026 11:01, Ronald Claveau <linux-kernel-dev@aliel.fr> wrote:
>Add SYS PLL for the clock controller of the Amlogic T7 SoC family.

Your commit description is almost the same on every patch in the series.
Probably having a more specific description per commit would be much more
useful, for reviewers to better understand your commit.

There are documentation pages on how to write informative commit messages
at [1] and [2], but in summary, your description should talk about *what*
is being done and (provided that makes sense), *why*.

You also have multiple commits with the exact same commit message
("dt-bindings: clk: meson: Add Amlogic T7 sys pll support"), did you
mean to squash them all into one? (You can do so with `git rebase -i`.)

It probably also would make sense to add a cover letter, which would describe
overall what you goal is with this patch series, and on a high level
(doesn't have to be too detailled, because you'd describe these in more
detail in the respective commit messages themselves) what each patch does.
This once again helps people reviewing your code to understand what problem
you're trying to solve.

[1]: https://docs.kernel.org/process/submitting-patches.html#explanation-body
[2]: https://docs.kernel.org/process/submitting-patches.html#describe-your-changes

Best regards,
Ferass

[PS: sorry if this email was sent twice, my email client did something
     strange]

>
>Signed-off-by: Ronald Claveau <linux-kernel-dev@aliel.fr>
>---
> include/dt-bindings/clock/amlogic,t7-peripherals-clkc.h | 7 +++++++
> 1 file changed, 7 insertions(+)
>
>diff --git a/include/dt-bindings/clock/amlogic,t7-peripherals-clkc.h b/include/dt-bindings/clock/amlogic,t7-peripherals-clkc.h
>index 32c4b62037de..0cda8edfa7cd 100644
>--- a/include/dt-bindings/clock/amlogic,t7-peripherals-clkc.h
>+++ b/include/dt-bindings/clock/amlogic,t7-peripherals-clkc.h
>@@ -224,5 +224,12 @@
> #define CLKID_SYS_PWM_AO_CD		215
> #define CLKID_SYS_PWM_AO_EF		216
> #define CLKID_SYS_PWM_AO_GH		217
>+#define CLKID_SYS_A_SEL			218
>+#define CLKID_SYS_A_DIV			219
>+#define CLKID_SYS_A			220
>+#define CLKID_SYS_B_SEL			221
>+#define CLKID_SYS_B_DIV			222
>+#define CLKID_SYS_B			223
>+#define CLKID_SYS			224
> 
> #endif /* __T7_PERIPHERALS_CLKC_H */
>-- 
>2.49.0
>
>
>_______________________________________________
>linux-amlogic mailing list
>linux-amlogic@lists.infradead.org
>http://lists.infradead.org/mailman/listinfo/linux-amlogic

[PATCH 6/7] arm64: dts: amlogic: Add clock and EMMC for T7

[Ronald Claveau]

Add fixed clock and EMMC support for Amlogic T7 SoC family dtsi.

Signed-off-by: Ronald Claveau <linux-kernel-dev@aliel.fr>
---
 arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi | 129 ++++++++++++++++++++
 1 file changed, 129 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
index 6510068bcff9..b84281e5cdd8 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
+++ b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
@@ -3,6 +3,8 @@
  * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
  */
 
+#include <dt-bindings/clock/amlogic,t7-peripherals-clkc.h>
+#include <dt-bindings/clock/amlogic,t7-pll-clkc.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/power/amlogic,t7-pwrc.h>
 #include "amlogic-t7-reset.h"
@@ -224,6 +226,24 @@ apb4: bus@fe000000 {
 			#size-cells = <2>;
 			ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
 
+			clkc: clock-controller@0 {
+				compatible = "amlogic,t7-peripherals-clkc";
+				reg = <0x0 0x0 0x0 0x49c>;
+				#clock-cells = <1>;
+				clocks = <&xtal>,
+						 <&fpll CLKID_FDIV2>,
+						 <&fpll CLKID_FDIV2P5>,
+						 <&fpll CLKID_FDIV3>,
+						 <&fpll CLKID_FDIV4>,
+						 <&fpll CLKID_FDIV5>,
+						 <&hifi_pll CLKID_HIFI_PLL>,
+						 <&mpll CLKID_MPLL2>,
+						 <&mpll CLKID_MPLL3>,
+						 <&gp0_pll CLKID_GP0_PLL>;
+				clock-names = "xtal", "fdiv2", "fdiv2p5", "fdiv3", "fdiv4",
+							  "fdiv5", "hifi", "mpll2", "mpll3", "gp0";
+			};
+
 			reset: reset-controller@2000 {
 				compatible = "amlogic,t7-reset";
 				reg = <0x0 0x2000 0x0 0x98>;
@@ -250,6 +270,68 @@ gpio: bank@4000 {
 					#gpio-cells = <2>;
 					gpio-ranges = <&periphs_pinctrl 0 0 157>;
 				};
+
+				emmc_ctrl_pins: emmc-ctrl {
+					mux-0 {
+						groups = "emmc_cmd";
+						function = "emmc";
+						bias-pull-up;
+						drive-strength-microamp = <4000>;
+					};
+
+					mux-1 {
+						groups = "emmc_clk";
+						function = "emmc";
+						bias-disable;
+						drive-strength-microamp = <4000>;
+					};
+				};
+
+				emmc_data_4b_pins: emmc-data-4b {
+					mux-0 {
+						groups = "emmc_nand_d0",
+								 "emmc_nand_d1",
+								 "emmc_nand_d2",
+								 "emmc_nand_d3";
+						function = "emmc";
+						bias-pull-up;
+						drive-strength-microamp = <4000>;
+					};
+				};
+
+				emmc_data_8b_pins: emmc-data-8b {
+					mux-0 {
+						groups = "emmc_nand_d0",
+								 "emmc_nand_d1",
+								 "emmc_nand_d2",
+								 "emmc_nand_d3",
+								 "emmc_nand_d4",
+								 "emmc_nand_d5",
+								 "emmc_nand_d6",
+								 "emmc_nand_d7";
+						function = "emmc";
+						bias-pull-up;
+						drive-strength-microamp = <4000>;
+					};
+				};
+
+				emmc_ds_pins: emmc-ds {
+					mux {
+						groups = "emmc_nand_ds";
+						function = "emmc";
+						bias-pull-down;
+						drive-strength-microamp = <4000>;
+					};
+				};
+
+				emmc_clk_gate_pins: emmc_clk_gate {
+					mux {
+						groups = "GPIOB_8";
+						function = "gpio_periphs";
+						bias-pull-down;
+						drive-strength-microamp = <4000>;
+					};
+				};
 			};
 
 			gpio_intc: interrupt-controller@4080 {
@@ -262,6 +344,38 @@ gpio_intc: interrupt-controller@4080 {
 					<10 11 12 13 14 15 16 17 18 19 20 21>;
 			};
 
+			fpll: clock-controller@8040 {
+				compatible = "amlogic,t7-fpll";
+				reg = <0x0 0x8040 0x0 0x20>;
+				#clock-cells = <1>;
+				clocks = <&xtal>;
+				clock-names = "xtal";
+			};
+
+			gp0_pll: clock-controller@8080 {
+				compatible = "amlogic,t7-gp0-pll";
+				reg = <0x0 0x8080 0x0 0x20>;
+				#clock-cells = <1>;
+				clocks = <&xtal>;
+				clock-names = "in0";
+			};
+
+			hifi_pll: clock-controller@8100 {
+				compatible = "amlogic,t7-hifi-pll";
+				reg = <0x0 0x8100 0x0 0x20>;
+				#clock-cells = <1>;
+				clocks = <&xtal>;
+				clock-names = "in0";
+			};
+
+			mpll: clock-controller@8180 {
+				compatible = "amlogic,t7-mpll";
+				reg = <0x0 0x8180 0x0 0x20>;
+				#clock-cells = <1>;
+				clocks = <&fpll CLKID_FPLL_DCO>;
+				clock-names = "in0";
+			};
+
 			uart_a: serial@78000 {
 				compatible = "amlogic,t7-uart", "amlogic,meson-s4-uart";
 				reg = <0x0 0x78000 0x0 0x18>;
@@ -276,6 +390,21 @@ sec_ao: ao-secure@10220 {
 				reg = <0x0 0x10220 0x0 0x140>;
 				amlogic,has-chip-id;
 			};
+
+			sd_emmc_c: mmc@8c000{
+				compatible = "amlogic,meson-axg-mmc";
+				reg = <0x0 0x8c000 0x0 0x800>;
+				interrupts = <GIC_SPI 178 IRQ_TYPE_EDGE_RISING>;
+				status = "disabled";
+				clocks = <&clkc CLKID_SYS_SD_EMMC_C>,
+						 <&clkc CLKID_SD_EMMC_C>,
+						 <&gp0_pll CLKID_GP0_PLL>;
+				clock-names = "core", "clkin0", "clkin1";
+				assigned-clocks = <&clkc CLKID_SD_EMMC_C_SEL>;
+				assigned-clock-parents = <&xtal>;
+				no-sdio;
+				no-sd;
+			};
 		};
 
 	};
-- 
2.49.0

Re: [PATCH 5/7] dt-bindings: clk: meson: Add Amlogic T7 sys pll support

[Ronald Claveau]

On 2/18/26 12:10 PM, Ferass El Hafidi wrote:
> Hi,
> 
> On Wed, 18 Feb 2026 11:01, Ronald Claveau <linux-kernel-dev@aliel.fr>
> wrote:
>> Add SYS PLL for the clock controller of the Amlogic T7 SoC family.
> 
> Your commit description is almost the same on every patch in the series.
> Probably having a more specific description per commit would be much more
> useful, for reviewers to better understand your commit.
> 
> There are documentation pages on how to write informative commit messages
> at [1] and [2], but in summary, your description should talk about *what*
> is being done and (provided that makes sense), *why*.
> 
> You also have multiple commits with the exact same commit message
> ("dt-bindings: clk: meson: Add Amlogic T7 sys pll support"), did you
> mean to squash them all into one? (You can do so with `git rebase -i`.)
> 
> It probably also would make sense to add a cover letter, which would
> describe
> overall what you goal is with this patch series, and on a high level
> (doesn't have to be too detailled, because you'd describe these in more
> detail in the respective commit messages themselves) what each patch does.
> This once again helps people reviewing your code to understand what problem
> you're trying to solve.
> 
> [1]: https://docs.kernel.org/process/submitting-
> patches.html#explanation-body
> [2]: https://docs.kernel.org/process/submitting-patches.html#describe-
> your-changes
> 

Thanks for your help Ferass, I definitely will.

I think I have misread this part of the doc :
"The Documentation/ and include/dt-bindings/ portion of the patch should
be a separate patch."

If I am allowed to combine the header and yaml doc in the same commit, I
will do so.

Best regards,
Ronald

Re: [PATCH 2/7] dt-bindings: clk: meson: Add Amlogic T7 fix pll support

[Jerome Brunet]

On mer. 18 févr. 2026 at 11:56, Ronald Claveau <linux-kernel-dev@aliel.fr> wrote:

> Add PLL for the clock controller of the Amlogic T7 SoC family.

Usually bindings changes should comes before the driver changes in a
series.

This is especially important here because you are using the IDs in the
driver. With order used here, bisect is broken.

>
> Signed-off-by: Ronald Claveau <linux-kernel-dev@aliel.fr>
> ---
>  include/dt-bindings/clock/amlogic,t7-pll-clkc.h | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
>
> diff --git a/include/dt-bindings/clock/amlogic,t7-pll-clkc.h b/include/dt-bindings/clock/amlogic,t7-pll-clkc.h
> index e2481f2f1163..690421009eab 100644
> --- a/include/dt-bindings/clock/amlogic,t7-pll-clkc.h
> +++ b/include/dt-bindings/clock/amlogic,t7-pll-clkc.h
> @@ -53,4 +53,20 @@
>  #define CLKID_MCLK_1_PRE	9
>  #define CLKID_MCLK_1		10
>  
> +/* ANALOG */
No idea what you mean with this ...

> +#define CLKID_FPLL_DCO		0
> +#define CLKID_FPLL			1
> +#define CLKID_FDIV2_DIV		2
> +#define CLKID_FDIV2			3
> +#define CLKID_FDIV2P5_DIV	4
> +#define CLKID_FDIV2P5		5
> +#define CLKID_FDIV3_DIV		6
> +#define CLKID_FDIV3			7
> +#define CLKID_FDIV4_DIV		8
> +#define CLKID_FDIV4			9
> +#define CLKID_FDIV5_DIV		10
> +#define CLKID_FDIV5			11
> +#define CLKID_FDIV7_DIV		12
> +#define CLKID_FDIV7			13
> +
>  #endif /* __T7_PLL_CLKC_H */

-- 
Jerome

Re: [PATCH 3/7] dt-bindings: clk: meson: Add Amlogic T7 fix pll support

[Jerome Brunet]

On mer. 18 févr. 2026 at 11:57, Ronald Claveau <linux-kernel-dev@aliel.fr> wrote:

> Add PLL for the clock controller of the Amlogic T7 SoC family.

Assuming the 3 first patch are actually needed (I don't think they are)
I think patch 2 and 3 should be squashed together

>
> Signed-off-by: Ronald Claveau <linux-kernel-dev@aliel.fr>
> ---
>  .../devicetree/bindings/clock/amlogic,t7-pll-clkc.yaml       | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/clock/amlogic,t7-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,t7-pll-clkc.yaml
> index 49c61f65deff..6a1598e6c359 100644
> --- a/Documentation/devicetree/bindings/clock/amlogic,t7-pll-clkc.yaml
> +++ b/Documentation/devicetree/bindings/clock/amlogic,t7-pll-clkc.yaml
> @@ -23,6 +23,7 @@ properties:
>        - amlogic,t7-mpll
>        - amlogic,t7-hdmi-pll
>        - amlogic,t7-mclk-pll
> +      - amlogic,t7-fpll
>  
>    reg:
>      maxItems: 1
> @@ -42,6 +43,7 @@ properties:
>        - const: in0
>        - const: in1
>        - const: in2
> +      - const: xtal

Fishy. Maybe it will get more clear with a more detailed commit description

>      minItems: 1
>  
>  required:
> @@ -72,11 +74,12 @@ allOf:
>            contains:
>              enum:
>                - amlogic,t7-gp0-pll
> -              - amlogic,t7-gp1--pll
> +              - amlogic,t7-gp1-pll

Indeed that's not good ! but you need specific patch for this, and Fixes
tag. You can send this separately.

>                - amlogic,t7-hifi-pll
>                - amlogic,t7-pcie-pll
>                - amlogic,t7-mpll
>                - amlogic,t7-hdmi-pll
> +              - amlogic,t7-fpll
>  
>      then:
>        properties:

-- 
Jerome

Re: [PATCH 6/7] arm64: dts: amlogic: Add clock and EMMC for T7

[Jerome Brunet]

On mer. 18 févr. 2026 at 12:20, Ronald Claveau <linux-kernel-dev@aliel.fr> wrote:

> Add fixed clock and EMMC support for Amlogic T7 SoC family dtsi.

One topic per patch please

>
> Signed-off-by: Ronald Claveau <linux-kernel-dev@aliel.fr>
> ---
>  arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi | 129 ++++++++++++++++++++
>  1 file changed, 129 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
> index 6510068bcff9..b84281e5cdd8 100644
> --- a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi
> @@ -3,6 +3,8 @@
>   * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
>   */
>  
> +#include <dt-bindings/clock/amlogic,t7-peripherals-clkc.h>
> +#include <dt-bindings/clock/amlogic,t7-pll-clkc.h>
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  #include <dt-bindings/power/amlogic,t7-pwrc.h>
>  #include "amlogic-t7-reset.h"
> @@ -224,6 +226,24 @@ apb4: bus@fe000000 {
>  			#size-cells = <2>;
>  			ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
>  
> +			clkc: clock-controller@0 {
> +				compatible = "amlogic,t7-peripherals-clkc";
> +				reg = <0x0 0x0 0x0 0x49c>;
> +				#clock-cells = <1>;
> +				clocks = <&xtal>,
> +						 <&fpll CLKID_FDIV2>,
> +						 <&fpll CLKID_FDIV2P5>,
> +						 <&fpll CLKID_FDIV3>,
> +						 <&fpll CLKID_FDIV4>,
> +						 <&fpll CLKID_FDIV5>,
> +						 <&hifi_pll CLKID_HIFI_PLL>,
> +						 <&mpll CLKID_MPLL2>,
> +						 <&mpll CLKID_MPLL3>,
> +						 <&gp0_pll CLKID_GP0_PLL>;
> +				clock-names = "xtal", "fdiv2", "fdiv2p5", "fdiv3", "fdiv4",
> +							  "fdiv5", "hifi", "mpll2", "mpll3", "gp0";
> +			};
> +
>  			reset: reset-controller@2000 {
>  				compatible = "amlogic,t7-reset";
>  				reg = <0x0 0x2000 0x0 0x98>;
> @@ -250,6 +270,68 @@ gpio: bank@4000 {
>  					#gpio-cells = <2>;
>  					gpio-ranges = <&periphs_pinctrl 0 0 157>;
>  				};
> +
> +				emmc_ctrl_pins: emmc-ctrl {
> +					mux-0 {
> +						groups = "emmc_cmd";
> +						function = "emmc";
> +						bias-pull-up;
> +						drive-strength-microamp = <4000>;
> +					};
> +
> +					mux-1 {
> +						groups = "emmc_clk";
> +						function = "emmc";
> +						bias-disable;
> +						drive-strength-microamp = <4000>;
> +					};
> +				};
> +
> +				emmc_data_4b_pins: emmc-data-4b {
> +					mux-0 {
> +						groups = "emmc_nand_d0",
> +								 "emmc_nand_d1",
> +								 "emmc_nand_d2",
> +								 "emmc_nand_d3";
> +						function = "emmc";
> +						bias-pull-up;
> +						drive-strength-microamp = <4000>;
> +					};
> +				};
> +
> +				emmc_data_8b_pins: emmc-data-8b {
> +					mux-0 {
> +						groups = "emmc_nand_d0",
> +								 "emmc_nand_d1",
> +								 "emmc_nand_d2",
> +								 "emmc_nand_d3",
> +								 "emmc_nand_d4",
> +								 "emmc_nand_d5",
> +								 "emmc_nand_d6",
> +								 "emmc_nand_d7";
> +						function = "emmc";
> +						bias-pull-up;
> +						drive-strength-microamp = <4000>;
> +					};
> +				};
> +
> +				emmc_ds_pins: emmc-ds {
> +					mux {
> +						groups = "emmc_nand_ds";
> +						function = "emmc";
> +						bias-pull-down;
> +						drive-strength-microamp = <4000>;
> +					};
> +				};
> +
> +				emmc_clk_gate_pins: emmc_clk_gate {
> +					mux {
> +						groups = "GPIOB_8";
> +						function = "gpio_periphs";
> +						bias-pull-down;
> +						drive-strength-microamp = <4000>;
> +					};
> +				};
>  			};
>  
>  			gpio_intc: interrupt-controller@4080 {
> @@ -262,6 +344,38 @@ gpio_intc: interrupt-controller@4080 {
>  					<10 11 12 13 14 15 16 17 18 19 20 21>;
>  			};
>  
> +			fpll: clock-controller@8040 {
> +				compatible = "amlogic,t7-fpll";
> +				reg = <0x0 0x8040 0x0 0x20>;
> +				#clock-cells = <1>;
> +				clocks = <&xtal>;
> +				clock-names = "xtal";
> +			};
> +
> +			gp0_pll: clock-controller@8080 {
> +				compatible = "amlogic,t7-gp0-pll";
> +				reg = <0x0 0x8080 0x0 0x20>;
> +				#clock-cells = <1>;
> +				clocks = <&xtal>;
> +				clock-names = "in0";
> +			};
> +
> +			hifi_pll: clock-controller@8100 {
> +				compatible = "amlogic,t7-hifi-pll";
> +				reg = <0x0 0x8100 0x0 0x20>;
> +				#clock-cells = <1>;
> +				clocks = <&xtal>;
> +				clock-names = "in0";
> +			};
> +
> +			mpll: clock-controller@8180 {
> +				compatible = "amlogic,t7-mpll";
> +				reg = <0x0 0x8180 0x0 0x20>;
> +				#clock-cells = <1>;
> +				clocks = <&fpll CLKID_FPLL_DCO>;
> +				clock-names = "in0";
> +			};
> +
>  			uart_a: serial@78000 {
>  				compatible = "amlogic,t7-uart", "amlogic,meson-s4-uart";
>  				reg = <0x0 0x78000 0x0 0x18>;
> @@ -276,6 +390,21 @@ sec_ao: ao-secure@10220 {
>  				reg = <0x0 0x10220 0x0 0x140>;
>  				amlogic,has-chip-id;
>  			};
> +
> +			sd_emmc_c: mmc@8c000{
> +				compatible = "amlogic,meson-axg-mmc";
> +				reg = <0x0 0x8c000 0x0 0x800>;
> +				interrupts = <GIC_SPI 178 IRQ_TYPE_EDGE_RISING>;
> +				status = "disabled";
> +				clocks = <&clkc CLKID_SYS_SD_EMMC_C>,
> +						 <&clkc CLKID_SD_EMMC_C>,
> +						 <&gp0_pll CLKID_GP0_PLL>;
> +				clock-names = "core", "clkin0", "clkin1";
> +				assigned-clocks = <&clkc CLKID_SD_EMMC_C_SEL>;
> +				assigned-clock-parents = <&xtal>;
> +				no-sdio;
> +				no-sd;
> +			};
>  		};
>  
>  	};

-- 
Jerome

Re: [PATCH 2/7] dt-bindings: clk: meson: Add Amlogic T7 fix pll support

[Krzysztof Kozlowski]

On 18/02/2026 11:56, Ronald Claveau wrote:
> Add PLL for the clock controller of the Amlogic T7 SoC family.
> 
> Signed-off-by: Ronald Claveau <linux-kernel-dev@aliel.fr>
> ---
>  include/dt-bindings/clock/amlogic,t7-pll-clkc.h | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)

So you ignored my comments?

And that's v2, not v1. You sent v1 and GOT the comments.

Best regards,
Krzysztof

Re: [PATCH 5/7] dt-bindings: clk: meson: Add Amlogic T7 sys pll support

[Krzysztof Kozlowski]

On 18/02/2026 12:01, Ronald Claveau wrote:
> Add SYS PLL for the clock controller of the Amlogic T7 SoC family.


You already sent v1 and received feedback. Implement that one.

Best regards,
Krzysztof

Re: [PATCH 6/7] arm64: dts: amlogic: Add clock and EMMC for T7

[Krzysztof Kozlowski]

On 18/02/2026 12:20, Ronald Claveau wrote:
> +
>  			uart_a: serial@78000 {
>  				compatible = "amlogic,t7-uart", "amlogic,meson-s4-uart";
>  				reg = <0x0 0x78000 0x0 0x18>;
> @@ -276,6 +390,21 @@ sec_ao: ao-secure@10220 {
>  				reg = <0x0 0x10220 0x0 0x140>;
>  				amlogic,has-chip-id;
>  			};
> +
> +			sd_emmc_c: mmc@8c000{
> +				compatible = "amlogic,meson-axg-mmc";

This was already sent and I already commented here.

Best regards,
Krzysztof

Re: [PATCH 2/7] dt-bindings: clk: meson: Add Amlogic T7 fix pll support

[Jerome Brunet]

On mer. 18 févr. 2026 at 20:17, Krzysztof Kozlowski <krzk@kernel.org> wrote:

> On 18/02/2026 11:56, Ronald Claveau wrote:
>> Add PLL for the clock controller of the Amlogic T7 SoC family.
>> 
>> Signed-off-by: Ronald Claveau <linux-kernel-dev@aliel.fr>
>> ---
>>  include/dt-bindings/clock/amlogic,t7-pll-clkc.h | 16 ++++++++++++++++
>>  1 file changed, 16 insertions(+)
>
> So you ignored my comments?
>
> And that's v2, not v1. You sent v1 and GOT the comments.

I think this was still v1 and if you look at timestamps, Patch 1 was sent
before your first reply, then there is lot of time between the different
patches - probably done manually  ... at patch 6 (the one you've
commented fist) was sent twice.

I think there is no malice here, just first time contribution with a few
mistakes ;)

>
> Best regards,
> Krzysztof
>
> _______________________________________________
> linux-amlogic mailing list
> linux-amlogic@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-amlogic

-- 
Jerome

Re: [PATCH 2/7] dt-bindings: clk: meson: Add Amlogic T7 fix pll support

[Krzysztof Kozlowski]

On 18/02/2026 20:28, Jerome Brunet wrote:
> On mer. 18 févr. 2026 at 20:17, Krzysztof Kozlowski <krzk@kernel.org> wrote:
> 
>> On 18/02/2026 11:56, Ronald Claveau wrote:
>>> Add PLL for the clock controller of the Amlogic T7 SoC family.
>>>
>>> Signed-off-by: Ronald Claveau <linux-kernel-dev@aliel.fr>
>>> ---
>>>  include/dt-bindings/clock/amlogic,t7-pll-clkc.h | 16 ++++++++++++++++
>>>  1 file changed, 16 insertions(+)
>>
>> So you ignored my comments?
>>
>> And that's v2, not v1. You sent v1 and GOT the comments.
> 
> I think this was still v1 and if you look at timestamps, Patch 1 was sent

No

> before your first reply, then there is lot of time between the different
> patches - probably done manually  ... at patch 6 (the one you've
> commented fist) was sent twice.

1. v1:
https://lore.kernel.org/all/20260218101728.35497-1-linux-kernel-dev@aliel.fr/
Wed, 18 Feb 2026 11:17:26 +0100

2. My reply 5 minutes later:
https://lore.kernel.org/all/a848fa43-6a46-4fd6-86a4-96aaf82e2a02@kernel.org/
Wed, 18 Feb 2026 11:21:13 +0100	

3. This patch send half an hour later:
https://lore.kernel.org/all/20260218105611.36216-1-linux-kernel-dev@aliel.fr/
Wed, 18 Feb 2026 *11:56:09* +0100	

after I already provided feedback about wrong threading.


Best regards,
Krzysztof

Re: [PATCH 2/7] dt-bindings: clk: meson: Add Amlogic T7 fix pll support

[Krzysztof Kozlowski]

On 18/02/2026 20:37, Krzysztof Kozlowski wrote:
> On 18/02/2026 20:28, Jerome Brunet wrote:
>> On mer. 18 févr. 2026 at 20:17, Krzysztof Kozlowski <krzk@kernel.org> wrote:
>>
>>> On 18/02/2026 11:56, Ronald Claveau wrote:
>>>> Add PLL for the clock controller of the Amlogic T7 SoC family.
>>>>
>>>> Signed-off-by: Ronald Claveau <linux-kernel-dev@aliel.fr>
>>>> ---
>>>>  include/dt-bindings/clock/amlogic,t7-pll-clkc.h | 16 ++++++++++++++++
>>>>  1 file changed, 16 insertions(+)
>>>
>>> So you ignored my comments?
>>>
>>> And that's v2, not v1. You sent v1 and GOT the comments.
>>
>> I think this was still v1 and if you look at timestamps, Patch 1 was sent
> 
> No
> 
>> before your first reply, then there is lot of time between the different
>> patches - probably done manually  ... at patch 6 (the one you've
>> commented fist) was sent twice.
> 
> 1. v1:
> https://lore.kernel.org/all/20260218101728.35497-1-linux-kernel-dev@aliel.fr/
> Wed, 18 Feb 2026 11:17:26 +0100
> 
> 2. My reply 5 minutes later:
> https://lore.kernel.org/all/a848fa43-6a46-4fd6-86a4-96aaf82e2a02@kernel.org/
> Wed, 18 Feb 2026 11:21:13 +0100	
> 
> 3. This patch send half an hour later:
> https://lore.kernel.org/all/20260218105611.36216-1-linux-kernel-dev@aliel.fr/
> Wed, 18 Feb 2026 *11:56:09* +0100	

Ah, and I forgot to mention - author replied to me in private at:
Wed, 18 Feb 2026 11:28:23 +0100

So BEFORE this was sent, thus he already received my first reply to v1
and this had to be conscious sending of next version, thus v2.

> 
> after I already provided feedback about wrong threading.
> 
> 
> Best regards,
> Krzysztof


Best regards,
Krzysztof