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From: Max Hsu <max.hsu@sifive.com>
To: Paul Walmsley <pjw@kernel.org>,
	 Samuel Holland <samuel.holland@sifive.com>,
	Vinod Koul <vkoul@kernel.org>,  Frank Li <Frank.Li@kernel.org>,
	Green Wan <green.wan@sifive.com>,  Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	Palmer Debbelt <palmer@sifive.com>,
	 Conor Dooley <conor@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	 Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>
Cc: linux-riscv@lists.infradead.org, dmaengine@vger.kernel.org,
	 linux-kernel@vger.kernel.org,
	Paul Walmsley <paul.walmsley@sifive.com>,
	 devicetree@vger.kernel.org, Max Hsu <max.hsu@sifive.com>
Subject: [PATCH 1/5] dmaengine: sf-pdma: add missing PDMA base offset to register calculations
Date: Sat, 21 Feb 2026 03:43:53 +0800	[thread overview]
Message-ID: <20260221-pdma-v1-1-838d929c2326@sifive.com> (raw)
In-Reply-To: <20260221-pdma-v1-0-838d929c2326@sifive.com>

The PDMA control registers start at offset 0x80000 from the PDMA base
address, according to the FU540-C000 v1p1 manual [1].

The current SF_PDMA_REG_BASE macro is missing this offset:
    Current:  pdma->membase + (PDMA_CHAN_OFFSET * ch)
    Correct:  pdma->membase + 0x80000 + (PDMA_CHAN_OFFSET * ch)

Fix by adding PDMA_BASE_OFFSET (0x80000) to the register address
calculation.

Link: https://www.sifive.com/document-file/freedom-u540-c000-manual [1]
Fixes: 6973886ad58e ("dmaengine: sf-pdma: add platform DMA support for HiFive Unleashed A00")
Signed-off-by: Max Hsu <max.hsu@sifive.com>
---
 drivers/dma/sf-pdma/sf-pdma.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h
index 215e07183d7e..d33551eb2ee8 100644
--- a/drivers/dma/sf-pdma/sf-pdma.h
+++ b/drivers/dma/sf-pdma/sf-pdma.h
@@ -24,7 +24,7 @@
 
 #define PDMA_MAX_NR_CH					4
 
-#define PDMA_BASE_ADDR					0x3000000
+#define PDMA_BASE_OFFSET				0x80000
 #define PDMA_CHAN_OFFSET				0x1000
 
 /* Register Offset */
@@ -54,7 +54,7 @@
 /* Error Recovery */
 #define MAX_RETRY					1
 
-#define SF_PDMA_REG_BASE(ch)	(pdma->membase + (PDMA_CHAN_OFFSET * (ch)))
+#define SF_PDMA_REG_BASE(ch)	(pdma->membase + PDMA_BASE_OFFSET + (PDMA_CHAN_OFFSET * (ch)))
 
 struct pdma_regs {
 	/* read-write regs */

-- 
2.43.0


  reply	other threads:[~2026-02-20 19:44 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-20 19:43 [PATCH 0/5] dmaengine: sf-pdma: critical fixes and FU740 support Max Hsu
2026-02-20 19:43 ` Max Hsu [this message]
2026-02-20 20:10   ` [PATCH 1/5] dmaengine: sf-pdma: add missing PDMA base offset to register calculations Frank Li
2026-02-20 22:26     ` Conor Dooley
2026-02-20 19:43 ` [PATCH 2/5] dmaengine: sf-pdma: fix race between done and error interrupts Max Hsu
2026-02-20 20:26   ` Frank Li
2026-02-20 19:43 ` [PATCH 3/5] dmaengine: sf-pdma: fix NULL pointer dereference in error and done handlers Max Hsu
2026-02-20 20:28   ` Frank Li
2026-02-20 19:43 ` [PATCH 4/5] dt-bindings: dma: sifive,fu540-c000-pdma: add fu740 support Max Hsu
2026-02-20 22:28   ` Conor Dooley
2026-02-20 19:43 ` [PATCH 5/5] riscv: dts: sifive: fu740: add PDMA device node Max Hsu
2026-02-20 20:30   ` Frank Li
2026-02-20 22:27     ` Conor Dooley

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