From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7EED735BDC6; Sun, 22 Feb 2026 22:28:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771799302; cv=none; b=LRTo0uL7YW05Jrrx1wQvPKvRRV7ccqL2rFGL/fRGeoUeAn4PQGcI4iYxfVj5gsFzn+pCO4Bl51JD36GN3MvKIizqRIiXxbJM4snUBGeRQdFjwZC5uLuZhg12LK3PfOY9NFDYTrt4gdh/ywBhOPAj3O7joBxTVMSqDyramG9Qu3M= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771799302; c=relaxed/simple; bh=kRyvAtllg2wv5cvOolKASqfXWh92eMK30glbgg+ZQbM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=avEneS99xWjo2L3fT4RGKYIHohm9dOpp39rmOJtF0x3KAkgy2ztrljwS829z4UA1UHnq3Dh9Src1w5FbjO2R0W282o+aSB4G5TtErBdt4YUz+dIBgy1sUKgStx+/0fY93NFb90VX+0t2FgeUKYy4aLH0BC8+BWc4wWqKvqH1DQI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=lHJfUVi6; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="lHJfUVi6" Received: by smtp.kernel.org (Postfix) with ESMTPS id 2AEF0C19424; Sun, 22 Feb 2026 22:28:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1771799302; bh=kRyvAtllg2wv5cvOolKASqfXWh92eMK30glbgg+ZQbM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=lHJfUVi64mDTc/OH61tmDRmmpME9BK7ZjRStUy8FEW6Yq+gVMk+YaWHFhoPw6cxio fQbOBqgKqGq8qt8dHxpv6HgrTywZk9ZgvWvLrxC751zO2k3P1LCRPKH9x0hBfybdPZ X3tLdpF1kvpDgBlHMVGCj58cAXd16iQVgWkTh9FKsk+PurF0cnfvi3TNLzS1xVaHzr oFprYzfQlBKR0xoEeBOflyjt2DmFizWPWWxOPzm+QMnSQjmBD2q5zrp2LcrqJUCKyg pdLdbKsFjL9XDg4Z5c1u4YsgBqxP5RQUkSFtZEc5rh7wbb92RJpUh5wglPIMR3dY+P VLnxCsDQvXmiA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 185F7C636BA; Sun, 22 Feb 2026 22:28:22 +0000 (UTC) From: Aaron Kling via B4 Relay Date: Sun, 22 Feb 2026 16:26:22 -0600 Subject: [PATCH RFC 1/2] dt-bindings: display: panel: Add ChipWealth CH13726A AMOLED driver bindings Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260222-ch13726a-v1-1-e501d78e105a@gmail.com> References: <20260222-ch13726a-v1-0-e501d78e105a@gmail.com> In-Reply-To: <20260222-ch13726a-v1-0-e501d78e105a@gmail.com> To: Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Teguh Sobirin , Aaron Kling X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1771799301; l=2215; i=webgeek1234@gmail.com; s=20250217; h=from:subject:message-id; bh=LoCx6cUkB7j9UBFth45SOpmS8Z22FgGUAq5sLoe92tk=; b=KabOWvLCznH0d05gJbqlA1f9LDsvD56nPTyPGK760xcC2Hy202B9FTmMkMpvpJveg5FZMt6U6 sqRUncm0Sk5B3WM8qem3s1/y3lxIs1LAj8p3X78tsxCdAl36akD4XFb X-Developer-Key: i=webgeek1234@gmail.com; a=ed25519; pk=TQwd6q26txw7bkK7B8qtI/kcAohZc7bHHGSD7domdrU= X-Endpoint-Received: by B4 Relay for webgeek1234@gmail.com/20250217 with auth_id=342 X-Original-From: Aaron Kling Reply-To: webgeek1234@gmail.com From: Aaron Kling The Chip Wealth Technology CH13726A display driver is a single chip solution for AMOLED using MIPI-DSI. This is used for the AYN Thor bottom panel. Signed-off-by: Aaron Kling --- .../display/panel/chipwealth,ch13726a.yaml | 66 ++++++++++++++++++++++ 1 file changed, 66 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/chipwealth,ch13726a.yaml b/Documentation/devicetree/bindings/display/panel/chipwealth,ch13726a.yaml new file mode 100644 index 0000000000000000000000000000000000000000..890984b00c341285066176995e6a973c5607cbde --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/chipwealth,ch13726a.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/chipwealth,ch13726a.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Chip Wealth Technology CH13726A display driver + +maintainers: + - Place Holder + +description: + Chip Wealth Technology CH13726A is a single-chip solution + for AMOLED connected using a MIPI-DSI video interface. + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + const: ayntec,thor-panel-bottom + + port: true + reg: + maxItems: 1 + description: DSI virtual channel + + vdd-supply: true + vddio-supply: true + vdd1v2-supply: true + avdd-supply: true + + reset-gpios: true + + rotation: true + +required: + - compatible + - reg + - vdd-supply + - vddio-supply + - vdd1v2-supply + - avdd-supply + - reset-gpios + +additionalProperties: false + +examples: + - | + #include + + dsi { + #address-cells = <1>; + #size-cells = <0>; + panel@0 { + compatible = "ayntec,thor-panel-bottom"; + reg = <0>; + vdd1v2-supply = <&vreg_l11b_1p2>; + vddio-supply = <&vdd_disp_1v8>; + vdd-supply = <&vreg_l13b_3p0>; + avdd-supply = <&vdd_disp2_2v8>; + reset-gpios = <&tlmm 133 GPIO_ACTIVE_HIGH>; + }; + }; + +... -- 2.52.0