Re: [PATCH 8/8] arm64: tegra: Add iommu-map and enable GPCDMA in Tegra264

[Akhil R <akhilrajeev@nvidia.com>]

On Tue, 17 Feb 2026 13:02:54 -0500, Frank Li wrote:
> On Tue, Feb 17, 2026 at 11:04:57PM +0530, Akhil R wrote:
>> Add iommu-map and remove iommus in the GPCDMA controller node so
>> that each channel uses separate stream ID and gets its own IOMMU
>> domain for memory. Also enable GPCDMA for Tegra264.
>>
>> Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
>> ---
>>  .../arm64/boot/dts/nvidia/tegra264-p3834.dtsi |  4 +++
>>  arch/arm64/boot/dts/nvidia/tegra264.dtsi      | 33 ++++++++++++++++++-
>>  2 files changed, 36 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi b/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi
>> index 7e2c3e66c2ab..c8beb616964a 100644
>> --- a/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi
>> +++ b/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi
>> @@ -16,6 +16,10 @@ serial@c4e0000 {
>>  		serial@c5a0000 {
>>  			status = "okay";
>>  		};
>> +
>> +		dma-controller@8400000 {
>> +			status = "okay";
>> +		};
>>  	};
>>
>>  	bus@8100000000 {
>> diff --git a/arch/arm64/boot/dts/nvidia/tegra264.dtsi b/arch/arm64/boot/dts/nvidia/tegra264.dtsi
>> index 7644a41d5f72..0317418c95d3 100644
>> --- a/arch/arm64/boot/dts/nvidia/tegra264.dtsi
>> +++ b/arch/arm64/boot/dts/nvidia/tegra264.dtsi
>> @@ -3243,7 +3243,38 @@ gpcdma: dma-controller@8400000 {
>> 				     <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>,
>> 				     <GIC_SPI 615 IRQ_TYPE_LEVEL_HIGH>;
>> 			#dma-cells = <1>;
>> -			iommus = <&smmu1 0x00000800>;
>> +			iommu-map =
>> +				<1  &smmu1 0x801 1>,
>> +				<2  &smmu1 0x802 1>,
>> +				<3  &smmu1 0x803 1>,
>> +				<4  &smmu1 0x804 1>,
>> +				<5  &smmu1 0x805 1>,
>> +				<6  &smmu1 0x806 1>,
>> +				<7  &smmu1 0x807 1>,
>> +				<8  &smmu1 0x808 1>,
>> +				<9  &smmu1 0x809 1>,
>> +				<10 &smmu1 0x80a 1>,
>> +				<11 &smmu1 0x80b 1>,
>> +				<12 &smmu1 0x80c 1>,
>> +				<13 &smmu1 0x80d 1>,
>> +				<14 &smmu1 0x80e 1>,
>> +				<15 &smmu1 0x80f 1>,
>> +				<16 &smmu1 0x810 1>,
>> +				<17 &smmu1 0x811 1>,
>> +				<18 &smmu1 0x812 1>,
>> +				<19 &smmu1 0x813 1>,
>> +				<20 &smmu1 0x814 1>,
>> +				<21 &smmu1 0x815 1>,
>> +				<22 &smmu1 0x816 1>,
>> +				<23 &smmu1 0x817 1>,
>> +				<24 &smmu1 0x818 1>,
>> +				<25 &smmu1 0x819 1>,
>> +				<26 &smmu1 0x81a 1>,
>> +				<27 &smmu1 0x81b 1>,
>> +				<28 &smmu1 0x81c 1>,
>> +				<29 &smmu1 0x81d 1>,
>> +				<30 &smmu1 0x81e 1>,
>> +				<31 &smmu1 0x81f 1>;
> 
> It is linear increase
> <1 &smmu1 0x801 31>;

Ack. I will update.

> 
> Frank
> 
>>  			dma-coherent;
>>  			dma-channel-mask = <0xfffffffe>;
>>  			status = "disabled";
>> --

Regards,
Akhil