From: Conor Dooley <conor@kernel.org>
To: linux-gpio@vger.kernel.org
Cc: conor@kernel.org, Conor Dooley <conor.dooley@microchip.com>,
Thomas Gleixner <tglx@linutronix.de>,
Herve Codina <herve.codina@bootlin.com>,
Daire McNamara <daire.mcnamara@microchip.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Linus Walleij <linusw@kernel.org>,
Bartosz Golaszewski <brgl@kernel.org>,
linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [RFC v11 0/4] PolarFire SoC GPIO interrupt support
Date: Fri, 27 Feb 2026 14:52:26 +0000 [thread overview]
Message-ID: <20260227-ajar-wolverine-7ce1ebd79821@spud> (raw)
From: Conor Dooley <conor.dooley@microchip.com>
In 2024 I sent a v7 of adding support for the GPIOs on PolarFire SoC,
which relied on an irqchip driver for a mux sitting between the GPIO
controllers and the main interrupt controller on the chip:
https://lore.kernel.org/all/20240723-flatworm-cornflake-8023212f6584@wendy/
Some feedback I got from Thomas there ended up being a complete black
hole for time spent, and I never managed to make the change he wanted,
as a house of cards collapsed whenever I tried it. I eventually
abandoned my attempt to upstream the GPIO driver with interrupt support
and cut it out of the driver to make progress. I've been carrying what
Thomas deemed incorrect downstream since.
Recently Hervé upstreamed a patchset for a Renesas chip that deals with
a mux sitting between a GPIO controller and the platform interrupt
controller by way of interrupt-map. I saw the opportunity to copy what
he did, so have gone from an irqchip driver that read the mux setting
that firmware had configured, to trivial driver that reads the mux
configuration from devicetree and sets the hardware up to match.
This gets rid entirely of the irqchip driver, so resolves Thomas'
complaint, but I don't love how the GPIO side of things turned out quite
as much. The hardware has 41 interrupts but 70 GPIO lines. 38 of these
are 1:1, direct connections to a dedicated line on the interrupt
controller and 3 are shared.
With the parent mux driver, the GPIO driver's interrupt handler was only
called either for specific direct interrupt or for only the subset that
are fed into the shared interrupt for that controller. Without the
parent irqchip from mux driver, and using interrupt-map, I lost the
ability to use mux driver to selectively call the handler, so now the
GPIO controller attempts to handle interrupts on all lines.
Probably this is ultimately not a big deal, it just feels bad to do.
Going RFC here, since it's an entirely different approach. The version
number is a continuation from before, since the patchset linked above
got merged at v10 when I stripped the interrupt support.
The mux driver has moved from irqchip to soc, since that's where Hervé's
ended up.
Cheers,
Conor.
CC: Thomas Gleixner <tglx@linutronix.de>
CC: Herve Codina <herve.codina@bootlin.com>
CC: Conor Dooley <conor.dooley@microchip.com>
CC: Daire McNamara <daire.mcnamara@microchip.com>
CC: Rob Herring <robh@kernel.org>
CC: Krzysztof Kozlowski <krzk+dt@kernel.org>
CC: Paul Walmsley <pjw@kernel.org>
CC: Palmer Dabbelt <palmer@dabbelt.com>
CC: Albert Ou <aou@eecs.berkeley.edu>
CC: Alexandre Ghiti <alex@ghiti.fr>
CC: Linus Walleij <linusw@kernel.org>
CC: Bartosz Golaszewski <brgl@kernel.org>
CC: linux-riscv@lists.infradead.org
CC: devicetree@vger.kernel.org
CC: linux-kernel@vger.kernel.org
CC: linux-gpio@vger.kernel.org
Conor Dooley (4):
gpio: mpfs: Add interrupt support
dt-bindings: soc: microchip: document PolarFire SoC's gpio interrupt
mux
soc: microchip: add mpfs gpio interrupt mux driver
riscv: dts: microchip: update mpfs gpio interrupts to better match the
SoC
.../soc/microchip/microchip,mpfs-irqmux.yaml | 76 ++++++++
.../microchip,mpfs-mss-top-sysreg.yaml | 4 +
MAINTAINERS | 2 +-
.../boot/dts/microchip/mpfs-beaglev-fire.dts | 29 +++
.../boot/dts/microchip/mpfs-disco-kit.dts | 43 +++--
.../dts/microchip/mpfs-icicle-kit-common.dtsi | 37 +++-
.../boot/dts/microchip/mpfs-m100pfsevp.dts | 41 +++--
.../boot/dts/microchip/mpfs-polarberry.dts | 29 +++
.../riscv/boot/dts/microchip/mpfs-sev-kit.dts | 37 +++-
.../riscv/boot/dts/microchip/mpfs-tysom-m.dts | 35 +++-
arch/riscv/boot/dts/microchip/mpfs.dtsi | 37 +++-
drivers/gpio/Kconfig | 1 +
drivers/gpio/gpio-mpfs.c | 125 ++++++++++++-
drivers/soc/microchip/Kconfig | 11 ++
drivers/soc/microchip/Makefile | 1 +
drivers/soc/microchip/mpfs-irqmux.c | 167 ++++++++++++++++++
16 files changed, 620 insertions(+), 55 deletions(-)
create mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-irqmux.yaml
create mode 100644 drivers/soc/microchip/mpfs-irqmux.c
--
2.51.0
next reply other threads:[~2026-02-27 14:53 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-27 14:52 Conor Dooley [this message]
2026-02-27 14:52 ` [RFC v11 1/4] gpio: mpfs: Add interrupt support Conor Dooley
2026-03-02 8:55 ` Herve Codina
2026-03-02 9:44 ` Linus Walleij
2026-02-27 14:52 ` [RFC v11 2/4] dt-bindings: soc: microchip: document PolarFire SoC's gpio interrupt mux Conor Dooley
2026-03-02 9:02 ` Herve Codina
2026-02-27 14:52 ` [RFC v11 3/4] soc: microchip: add mpfs gpio interrupt mux driver Conor Dooley
2026-03-02 9:58 ` Herve Codina
2026-03-02 11:22 ` Conor Dooley
2026-02-27 14:52 ` [RFC v11 4/4] riscv: dts: microchip: update mpfs gpio interrupts to better match the SoC Conor Dooley
2026-03-02 9:47 ` [RFC v11 0/4] PolarFire SoC GPIO interrupt support Linus Walleij
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