From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out-178.mta1.migadu.com (out-178.mta1.migadu.com [95.215.58.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B96D830DD0C for ; Sat, 28 Feb 2026 20:58:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.178 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772312335; cv=none; b=lSdkfEIEP+DB1hc0TP0pCaT1pszRFLyDZnohUS2lMNv8R7omzKPOrcQhES6oMRqdCHxD+ZCz69wIjIx+mnPWp4W5csl/kemEJcJD0NUBc3su+Dly5hO/tazJd1zKg7lfHnrUkdPVD+U4WL/whjVLOvYPd6UyFQ2syeRUL9XlnFk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772312335; c=relaxed/simple; bh=2c4OtPz5PwqBs3IYd2Is94lpJUes360Y2etHBS1IhEQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=IWSN3Nb4e3JuBxB3hxb9o50ZjqoBgb4Qzg1wN7xAlPqiiKGHXgevfvamU7TFgl6kAi6A4tkrVezyhnY+6yBk6ojQyxhZcn9fqX8Ur+SEKgBAM29AcJ3zhrThlDkNLD+6fqkVi5R5PnwIeOobV0DTyNFtPnzAWmUlr5X/Tiv2L3k= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool; spf=pass smtp.mailfrom=packett.cool; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b=ggAXqZgt; arc=none smtp.client-ip=95.215.58.178 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=packett.cool Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=packett.cool Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=packett.cool header.i=@packett.cool header.b="ggAXqZgt" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=packett.cool; s=key1; t=1772312332; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WlNLCqv2zMBCzP7vj8pI5OHmRQj1bOELwk4NcWYKsww=; b=ggAXqZgtIc7YbBmDmMhFPkfD/OPw2w6u3cpJfJLKZ5LkF5o28kR1E+GNCPPUC0B+9l2jOp zUjjOLVJh7Ja3peo0LuJlZ6bC5ozsoGm5PHR+W0ZemmdS8oPccIdlz0pA7Ns4a6Kvj9skv ugq8lQ44aALkKaqUgkMspDyN/E7EVesEcXUmqVxpGD+F7mnW8AGswyp/t8w5G1CQAshvgN +lG29oWr/jjkdb/dAIdDLIei/1lsZ5qL3+UKx3NqMrueDJ3YwBVk1o4tJ1LxYtCbJZ2olX afD6vyaeNWDSQxWKEXrNPn21RBDLgUbgRXV6rSyZ5KHpTOplj030ZehHgY8M5A== From: Val Packett To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Laurentiu Tudor , "Bryan O'Donoghue" , Val Packett Cc: Konrad Dybcio , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 2/2] arm64: dts: qcom: x1-dell-thena: remove i2c20 (battery SMBus) and reserve its pins Date: Sat, 28 Feb 2026 17:53:57 -0300 Message-ID: <20260228205818.13016-2-val@packett.cool> In-Reply-To: <20260228205818.13016-1-val@packett.cool> References: <20260228205818.13016-1-val@packett.cool> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Migadu-Flow: FLOW_OUT i2c20 is used by the battmgr service on the ADSP to communicate with the SBS interface of the battery. Initializing it from Linux would break the battmgr functionality when booted in EL2. Mark those pins as reserved. Fixes: e7733b42111c ("arm64: dts: qcom: Add support for Dell Inspiron 7441 / Latitude 7455") Reviewed-by: Konrad Dybcio Signed-off-by: Val Packett --- v3: Pull R-b.. and restore series versioning :) v2: https://lore.kernel.org/all/20260210175001.7691-2-val@packett.cool/ v1: doesn't exist. oops, at v1 this wasn't a series, just the PCIe GPIO patch --- arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi b/arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi index fcf2845beb3c..255728970c1d 100644 --- a/arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi +++ b/arch/arm64/boot/dts/qcom/x1-dell-thena.dtsi @@ -982,12 +982,6 @@ &i2c8 { status = "okay"; }; -&i2c20 { - clock-frequency = <400000>; - - status = "okay"; -}; - &lpass_tlmm { spkr_01_sd_n_active: spkr-01-sd-n-active-state { pins = "gpio12"; @@ -1308,6 +1302,7 @@ right_tweeter: speaker@0,1 { &tlmm { gpio-reserved-ranges = <44 4>, /* SPI11 (TPM) */ <76 4>, /* SPI19 (TZ Protected) */ + <80 2>, /* I2C20 (Battery SMBus) */ <238 1>; /* UFS Reset */ cam_rgb_default: cam-rgb-default-state { -- 2.52.0