From: Chen-Yu Tsai <wens@kernel.org>
To: Chen-Yu Tsai <wens@kernel.org>,
Jernej Skrabec <jernej@kernel.org>,
Samuel Holland <samuel@sholland.org>,
Mark Brown <broonie@kernel.org>
Cc: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org,
linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Subject: [PATCH v2 1/3] spi: dt-bindings: sun6i: Allow Dual SPI and Quad SPI for newer SoCs
Date: Mon, 2 Mar 2026 23:35:56 +0800 [thread overview]
Message-ID: <20260302153559.3199783-2-wens@kernel.org> (raw)
In-Reply-To: <20260302153559.3199783-1-wens@kernel.org>
Support for Dual SPI and Quad SPI was added to the Linux driver in
commit 0605d9fb411f ("spi: sun6i: add quirk for dual and quad SPI modes
support") and commit 25453d797d7a ("spi: sun6i: add dual and quad SPI
modes support for R329/D1/R528/T113s").
However the binding was never updated to allow these modes. Allow them
by adding 2 and 4 to the allowed bus widths for the newer variants.
While at it, also add 0 to the allowed bus widths. This signals that
RX or TX is not available, i.e. the MISO or MOSI pin is disconnected.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
---
Changes since v1:
- Moved "allOf:" block after "required:" block
- Dropped "type:" from child node in conditional block
---
.../bindings/spi/allwinner,sun6i-a31-spi.yaml | 29 +++++++++++++++----
1 file changed, 24 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml
index a6067030c5ed..6af4ff233158 100644
--- a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml
+++ b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml
@@ -6,9 +6,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A31 SPI Controller
-allOf:
- - $ref: spi-controller.yaml
-
maintainers:
- Chen-Yu Tsai <wens@csie.org>
- Maxime Ripard <mripard@kernel.org>
@@ -82,11 +79,11 @@ patternProperties:
spi-rx-bus-width:
items:
- - const: 1
+ enum: [0, 1, 2, 4]
spi-tx-bus-width:
items:
- - const: 1
+ enum: [0, 1, 2, 4]
required:
- compatible
@@ -95,6 +92,28 @@ required:
- clocks
- clock-names
+allOf:
+ - $ref: spi-controller.yaml
+ - if:
+ not:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - allwinner,sun50i-r329-spi
+ - allwinner,sun55i-a523-spi
+ then:
+ patternProperties:
+ "^.*@[0-9a-f]+":
+ properties:
+ spi-rx-bus-width:
+ items:
+ enum: [0, 1]
+
+ spi-tx-bus-width:
+ items:
+ enum: [0, 1]
+
unevaluatedProperties: false
examples:
--
2.47.3
next prev parent reply other threads:[~2026-03-02 15:36 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-02 15:35 [PATCH v2 0/3] arm64: allwinner: sun55i-t527: avaota-a1: Add SPI NAND Chen-Yu Tsai
2026-03-02 15:35 ` Chen-Yu Tsai [this message]
2026-03-02 15:35 ` [PATCH v2 2/3] arm64: dts: allwinner: sun55i-a523: Add pinmux for spi0 on PJ pins Chen-Yu Tsai
2026-03-02 15:35 ` [PATCH v2 3/3] arm64: dts: allwinner: sun55i-t527: avaota-a1: Add SPI NAND Chen-Yu Tsai
2026-03-10 19:41 ` [PATCH v2 0/3] arm64: " Chen-Yu Tsai
2026-03-10 19:42 ` Mark Brown
2026-03-10 19:44 ` Chen-Yu Tsai
2026-03-10 19:47 ` Mark Brown
2026-03-10 19:49 ` Chen-Yu Tsai
2026-03-11 18:57 ` (subset) " Mark Brown
2026-03-14 21:59 ` Mark Brown
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